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path: root/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
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* [COFF, ARM64] Implement support for SEH extensions __try/__except/__finallyMandeep Singh Grang2019-01-161-0/+7
* Introduce control flow speculation tracking pass for AArch64Kristof Beyls2018-12-181-0/+4
* [ARM64] [Windows] Handle funcletsEli Friedman2018-11-091-4/+9
* [ARM64] [Windows] Exception handling support in frame loweringSanjin Sijaric2018-10-311-0/+2
* [Aarch64] Fix memcpy that was copying 4x too many bytesBenjamin Kramer2018-09-231-1/+1
* [AArch64] Support adding X[8-15,18] registers as CSRs.Tri Vo2018-09-221-0/+37
* [AArch64] Implement aarch64_vector_pcs codegen support.Sander de Smalen2018-09-121-4/+2
* [AArch64] Add parsing of aarch64_vector_pcs attribute.Sander de Smalen2018-09-121-0/+6
* [AArch64] Support reserving x1-7 registers.Nick Desaulniers2018-09-071-32/+21
* [CodeGen] emit inline asm clobber list warnings for reserved (cont)Ties Stuij2018-08-301-0/+5
* [AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existin...Luke Geeson2018-06-271-0/+13
* [AArch64] Support reserving x20 registerPetr Hosek2018-06-121-3/+11
* AArch64: Implement support for the shadowcallstack attribute.Peter Collingbourne2018-04-041-6/+10
* [AArch64] Implement dynamic stack probing for windowsMartin Storsjo2018-02-171-0/+4
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-191-5/+7
* Revert "AArch64: Fix emergency spillslot being out of reach for large callfra...Matthias Braun2018-01-101-7/+5
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-101-5/+7
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-7/+7
* Move TargetFrameLowering.h to CodeGen where it's implementedDavid Blaikie2017-11-031-1/+1
* [COFF, ARM64, CodeView] Add support to emit CodeView debug info for ARM64 COFFMandeep Singh Grang2017-07-201-1/+3
* fix typos in comments; NFCHiroshi Inoue2017-07-161-1/+1
* [AArch64] Avoid selecting XZR inline ASM memory operandYi Kong2017-07-141-1/+1
* [AArch64] Make assert messages uniform and general [NFC]Mandeep Singh Grang2017-06-281-1/+1
* AArch64RegisterInfo: Simplify getReservedReg(); NFCMatthias Braun2017-02-021-12/+4
* Clarify rules for reserved regs, fix aarch64 ones.Matthias Braun2016-11-301-10/+11
* [TargetRegisterInfo, AArch64] Add target hook for isConstantPhysReg().Geoff Berry2016-09-271-0/+4
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-10/+10
* AArch64: Remove unnecessary namespace llvm; NFCMatthias Braun2016-06-281-4/+0
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
* Swift Calling Convention: swifterror target support.Manman Ren2016-04-111-0/+9
* Add support for a preserve_most calling convention to the AArch64 backend.Roman Levenstein2016-03-101-0/+4
* [AArch64] Enable non-leaf frame pointer elimination.Geoff Berry2016-03-021-3/+1
* Simplify some boolean conditional return statements in AArch64.Eric Christopher2016-02-291-3/+1
* CXX_FAST_TLS calling convention: performance improvement for AArch64.Manman Ren2015-12-161-1/+13
* [CXX TLS calling convention] Add support for AArch64.Manman Ren2015-12-081-0/+4
* [AArch64] Remove check for Darwin that was needed to decide if x18 shouldAkira Hatanaka2015-07-271-9/+7
* [AArch64] Define subtarget feature "reserve-x18", which is used to decideAkira Hatanaka2015-07-251-9/+8
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-23/+0
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-12/+8
* [AArch64] Add support for dynamic stack alignmentKristof Beyls2015-04-091-0/+30
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-2/+3
* Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"Eric Christopher2015-03-181-2/+2
* Migrate the AArch64 TargetRegisterInfo to its TargetMachineEric Christopher2015-03-121-2/+2
* Remove the need to cache the subtarget in the AArch64 TargetRegisterInfoEric Christopher2015-03-121-15/+21
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-2/+4
* AArch64: add backend option to reserve x18 (platform register)Tim Northover2015-01-211-3/+7
* [AArch64] Implement GHC calling conventionGreg Fitzgerald2015-01-191-1/+9
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-11/+6
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-6/+11
* AArch64: implement copies to/from NZCV as a last ditch effort.Tim Northover2014-05-271-1/+1
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