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path: root/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
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* AArch64: Use DeadRegisterDefinitionsPass before regalloc.Matthias Braun2016-11-161-30/+22
| | | | | | | | | Doing this before register allocation reduces register pressure as we do not even have to allocate a register for those dead definitions. Differential Revision: https://reviews.llvm.org/D26111 llvm-svn: 287076
* AArch64DeadRegisterDefinitionsPass: Fix Changed flagMatthias Braun2016-11-081-1/+0
| | | | | | Fix a bug in the calculation of the changed flag introduced in r285488. llvm-svn: 286293
* AArch64DeadRegisterDefinitionsPass: Cleanup; NFCMatthias Braun2016-10-291-54/+53
| | | | | | | | | | | - Fix doxygen file comment - reduce indentation in loop - Factor out some common subexpressions - Move independent helper function out of class - Fix Changed flag (this is not strictly NFC but a bugfix, but the flag seems ignored anyway) llvm-svn: 285488
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* [AArch64] Register passes so they can be run by llcDiana Picus2016-08-011-4/+0
| | | | | | | | | | | | | | Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) llvm-svn: 277322
* Add optimization bisect opt-in calls for AArch64 passesAndrew Kaylor2016-04-251-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19394 llvm-svn: 267479
* AArch64: don't create instructions that write to xzr/wzr twice.Tim Northover2016-04-131-0/+8
| | | | | | | | These are unpredictable even on AArch64. Patch by Yichao Yu. llvm-svn: 266206
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+5
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* [AArch64] Fix a typo. NFC.Chad Rosier2016-04-011-1/+1
| | | | llvm-svn: 265160
* [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager.Chad Rosier2015-08-051-2/+14
| | | | llvm-svn: 244067
* Remove 'virtual' keyword from methods markedwith 'override' keyword.Craig Topper2014-08-301-2/+2
| | | | llvm-svn: 216823
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-1/+1
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+2
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Run sort_includes.py on the AArch64 backend.Benjamin Kramer2014-07-251-1/+1
| | | | | | No functionality change. llvm-svn: 213938
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+134
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
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