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path: root/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
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* Add optimization bisect opt-in calls for AArch64 passesAndrew Kaylor2016-04-251-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19394 llvm-svn: 267479
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Fix AArch64ConditionOptimizerWeiming Zhao2016-01-151-0/+8
| | | | | | | | | | | | | | Summary: This pass may modify the Cmp operands. However, the flag reg may be used by both the branch and CSEL. Modifying CMP will have side effect on CSEL. Reviewers: t.p.northover Subscribers: llvm-commits, aemerson, rengolin Differential Revision: http://reviews.llvm.org/D16147 llvm-svn: 257844
* AArch64: use AddressingModes.h accessors for compare shiftsTim Northover2015-07-291-4/+5
| | | | | | | No functional change because "lsl #12" is actually encoded as 12, but one less bug if someone ever decides to change that for the giggles. llvm-svn: 243536
* AArch64: be careful of large immediates when optimising cmps.Tim Northover2015-07-281-5/+12
| | | | llvm-svn: 243492
* MachineInstr: Change return value of getOpcode() to unsigned.Matthias Braun2015-05-181-3/+3
| | | | | | | | | This was previously returning int. However there are no negative opcode numbers and more importantly this was needlessly different from MCInstrDesc::getOpcode() (which even is the value returned here) and SDValue::getOpcode()/SDNode::getOpcode(). llvm-svn: 237611
* [AArch64] Use MachineRegisterInfo instead of LiveIntervals to calculate ↵Pete Cooper2015-04-221-4/+4
| | | | | | | | | | | | liveness. NFC. The CondOpt pass currently uses LiveIntervals to set the dead flag on a def. This patch uses MachineRegisterInfo::use_empty instead as that is equivalent to the def being dead. This removes an instance of LiveIntervals in the pass manager pipeline and saves 3.8% of compile time on llc conpiled for AArch64. Reviewed by Chad Rosier and Zhaoshi. llvm-svn: 235532
* Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.Eric Christopher2015-01-281-1/+1
| | | | llvm-svn: 227293
* [AArch64] Check Dest Register Liveness in CondOpt pass.Chad Rosier2014-10-311-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Our internal test reveals such case should not be transformed: cmp x17, #3 b.lt .LBB10_15 ... subs x12, x12, #1 b.gt .LBB10_1 where x12 is a liveout, becomes: cmp x17, #2 b.le .LBB10_15 ... subs x12, x12, #2 b.ge .LBB10_1 Unable to provide test case as it's difficult to reproduce on community branch. http://reviews.llvm.org/D6048 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! llvm-svn: 220987
* [AArch64] CondOpt pass is missing FCMP instructions when searching backward forChad Rosier2014-10-311-0/+11
| | | | | | | | | a CMP which defines the flags used by B.CC. http://reviews.llvm.org/D6047 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! llvm-svn: 220961
* [AArch64] Add pass to enable additional comparison optimizations by CSE.Jiangning Liu2014-09-051-0/+405
Patched by Sergey Dmitrouk. This pass tries to make consecutive compares of values use same operands to allow CSE pass to remove duplicated instructions. For this it analyzes branches and adjusts comparisons with immediate values by converting: GE -> GT GT -> GE LT -> LE LE -> LT and adjusting immediate values appropriately. It basically corrects two immediate values towards each other to make them equal. llvm-svn: 217220
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