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* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-4/+4
| | | | | | | | | | | Rename from addOperand to just add, to match the other method that has been added to MachineInstrBuilder for adding more than just 1 operand. See https://reviews.llvm.org/D28057 for the whole discussion. Differential Revision: https://reviews.llvm.org/D28556 llvm-svn: 291891
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* [AArch64] Register passes so they can be run by llcDiana Picus2016-08-011-5/+3
| | | | | | | | | | | | | | Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) llvm-svn: 277322
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-2/+2
| | | | | | | | | | | | Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect. Reviewers: tstellarAMD, mcrosier Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai Differential Revision: https://reviews.llvm.org/D22409 llvm-svn: 275564
* AArch64: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-1/+1
| | | | | | | | Avoid implicit conversions from MachineInstrBundleInstr to MachineInstr* in the AArch64 backend, mainly by preferring MachineInstr& over MachineInstr* when a pointer isn't nullable. llvm-svn: 274924
* Target: Avoid getFirstTerminator() => pointer, NFCDuncan P. N. Exon Smith2016-07-081-4/+4
| | | | | | | | | | | | | | Stop using an implicit conversion from the return of MachineBasicBlock::getFirstTerminator to MachineInstr*. In two cases, directly dereference to a MachineInstr& since later code assumes it's valid. In a third case, change to an iterator since later code checks against MachineBasicBlock::end. Although the fix for the third case avoids undefined behaviour, I expect this doesn't cause a functionality change in practice (since the basic block already has a terminator). llvm-svn: 274898
* Add optimization bisect opt-in calls for AArch64 passesAndrew Kaylor2016-04-251-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19394 llvm-svn: 267479
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Fix AArch64ConditionOptimizerWeiming Zhao2016-01-151-0/+8
| | | | | | | | | | | | | | Summary: This pass may modify the Cmp operands. However, the flag reg may be used by both the branch and CSEL. Modifying CMP will have side effect on CSEL. Reviewers: t.p.northover Subscribers: llvm-commits, aemerson, rengolin Differential Revision: http://reviews.llvm.org/D16147 llvm-svn: 257844
* AArch64: use AddressingModes.h accessors for compare shiftsTim Northover2015-07-291-4/+5
| | | | | | | No functional change because "lsl #12" is actually encoded as 12, but one less bug if someone ever decides to change that for the giggles. llvm-svn: 243536
* AArch64: be careful of large immediates when optimising cmps.Tim Northover2015-07-281-5/+12
| | | | llvm-svn: 243492
* MachineInstr: Change return value of getOpcode() to unsigned.Matthias Braun2015-05-181-3/+3
| | | | | | | | | This was previously returning int. However there are no negative opcode numbers and more importantly this was needlessly different from MCInstrDesc::getOpcode() (which even is the value returned here) and SDValue::getOpcode()/SDNode::getOpcode(). llvm-svn: 237611
* [AArch64] Use MachineRegisterInfo instead of LiveIntervals to calculate ↵Pete Cooper2015-04-221-4/+4
| | | | | | | | | | | | liveness. NFC. The CondOpt pass currently uses LiveIntervals to set the dead flag on a def. This patch uses MachineRegisterInfo::use_empty instead as that is equivalent to the def being dead. This removes an instance of LiveIntervals in the pass manager pipeline and saves 3.8% of compile time on llc conpiled for AArch64. Reviewed by Chad Rosier and Zhaoshi. llvm-svn: 235532
* Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.Eric Christopher2015-01-281-1/+1
| | | | llvm-svn: 227293
* [AArch64] Check Dest Register Liveness in CondOpt pass.Chad Rosier2014-10-311-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Our internal test reveals such case should not be transformed: cmp x17, #3 b.lt .LBB10_15 ... subs x12, x12, #1 b.gt .LBB10_1 where x12 is a liveout, becomes: cmp x17, #2 b.le .LBB10_15 ... subs x12, x12, #2 b.ge .LBB10_1 Unable to provide test case as it's difficult to reproduce on community branch. http://reviews.llvm.org/D6048 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! llvm-svn: 220987
* [AArch64] CondOpt pass is missing FCMP instructions when searching backward forChad Rosier2014-10-311-0/+11
| | | | | | | | | a CMP which defines the flags used by B.CC. http://reviews.llvm.org/D6047 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! llvm-svn: 220961
* [AArch64] Add pass to enable additional comparison optimizations by CSE.Jiangning Liu2014-09-051-0/+405
Patched by Sergey Dmitrouk. This pass tries to make consecutive compares of values use same operands to allow CSE pass to remove duplicated instructions. For this it analyzes branches and adjusts comparisons with immediate values by converting: GE -> GT GT -> GE LT -> LE LE -> LT and adjusting immediate values appropriately. It basically corrects two immediate values towards each other to make them equal. llvm-svn: 217220
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