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* Revert r343192 as an ubsan build is currently failingLuke Cheeseman2018-09-273-20/+0
| | | | llvm-svn: 343235
* Reapply changes reverted in r343114, lldb patch to follow shortlyLuke Cheeseman2018-09-273-0/+20
| | | | llvm-svn: 343192
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-272-6/+5
| | | | | | | | | | | | Summary: The convenience wrapper in STLExtras is available since rL342102. Reviewers: dblaikie, javed.absar, JDevlieghere, andreadb Subscribers: MatzeB, sanjoy, arsenm, dschuff, mehdi_amini, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, javed.absar, gbedwell, jrtc27, mgrang, atanasyan, steven_wu, george.burgess.iv, dexonsmith, kristina, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D52573 llvm-svn: 343163
* Revert r343112 as CallFrameString API change has broken lldb buildsLuke Cheeseman2018-09-263-20/+0
| | | | llvm-svn: 343114
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-263-0/+20
| | | | | | - Reapply r343089 with a fix for DebugInfo/Sparc/gnu-window-save.ll llvm-svn: 343112
* Revert r343089 "[AArch64] - Return address signing dwarf support"Hans Wennborg2018-09-263-20/+0
| | | | | | | | | | | | | | | | | | | This caused the DebugInfo/Sparc/gnu-window-save.ll test to fail. > Functions that have signed return addresses need additional dwarf support: > - After signing the LR, and before authenticating it, the LR register is in a > state the is unusable by a debugger or unwinder > - To account for this a new directive, .cfi_negate_ra_state, is added > - This directive says the signed state of the LR register has now changed, > i.e. unsigned -> signed or signed -> unsigned > - This directive has the same CFA code as the SPARC directive GNU_window_save > (0x2d), adding a macro to account for multiply defined codes > - This patch matches the gcc implementation of this support: > https://patchwork.ozlabs.org/patch/800271/ > > Differential Revision: https://reviews.llvm.org/D50136 llvm-svn: 343103
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-263-0/+20
| | | | | | | | | | | | | | | | | Functions that have signed return addresses need additional dwarf support: - After signing the LR, and before authenticating it, the LR register is in a state the is unusable by a debugger or unwinder - To account for this a new directive, .cfi_negate_ra_state, is added - This directive says the signed state of the LR register has now changed, i.e. unsigned -> signed or signed -> unsigned - This directive has the same CFA code as the SPARC directive GNU_window_save (0x2d), adding a macro to account for multiply defined codes - This patch matches the gcc implementation of this support: https://patchwork.ozlabs.org/patch/800271/ Differential Revision: https://reviews.llvm.org/D50136 llvm-svn: 343089
* [MCAsmParser] Move AltMacroMode tracking out of MCAsmLexerCraig Topper2018-09-252-10/+9
| | | | | | | | The Lexer doesn't use this state itself. It is only set and used by AsmParser so it seems like it should just be part of AsmParser. Differential Revision: https://reviews.llvm.org/D52515 llvm-svn: 343027
* [MC] Return a std::string instead of taking it as an out parameter. Make two ↵Craig Topper2018-09-251-7/+5
| | | | | | parser methods into static functions at file scope. NFC llvm-svn: 343020
* [MC] Fix bad indentation and 80 column violations. Use StringRef::front ↵Craig Topper2018-09-251-29/+34
| | | | | | instead of dereferencing StringRef::begin. NFC llvm-svn: 343010
* [MC] Replace NULL constant in code with nullptr.Craig Topper2018-09-251-1/+1
| | | | llvm-svn: 343003
* [lib/MC] - Set SHF_EXCLUDE flag for .dwo sections.George Rimar2018-09-221-11/+11
| | | | | | | | | | | | | | | | | DWARF5 spec says about single file split case: "The sections that do not require relocation, however, can be written to the relocatable object (.o) file but ignored by the the linker or they can be written to a separate DWARF object (.dwo) file that need not be accessed by the linker." Nice way to make linker to ignore them is to set SHF_EXCLUDE flag. It seems to be not harmful to always set it for .dwo sections. That is what this patch does. Differential revision: https://reviews.llvm.org/D52303 llvm-svn: 342800
* Fix for bug 34002 - label generated before it block is finalized. ↵Maya Madhavan2018-09-201-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D52258 llvm-svn: 342615
* [TableGen][SubtargetEmitter] Add the ability for processor models to ↵Andrea Di Biagio2018-09-191-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | describe dependency breaking instructions. This patch adds the ability for processor models to describe dependency breaking instructions. Different processors may specify a different set of dependency-breaking instructions. That means, we cannot assume that all processors of the same target would use the same rules to classify dependency breaking instructions. The main goal of this patch is to provide the means to describe dependency breaking instructions directly via tablegen, and have the following TargetSubtargetInfo hooks redefined in overrides by tabegen'd XXXGenSubtargetInfo classes (here, XXX is a Target name). ``` virtual bool isZeroIdiom(const MachineInstr *MI, APInt &Mask) const { return false; } virtual bool isDependencyBreaking(const MachineInstr *MI, APInt &Mask) const { return isZeroIdiom(MI); } ``` An instruction MI is a dependency-breaking instruction if a call to method isDependencyBreaking(MI) on the STI (TargetSubtargetInfo object) evaluates to true. Similarly, an instruction MI is a special case of zero-idiom dependency breaking instruction if a call to STI.isZeroIdiom(MI) returns true. The extra APInt is used for those targets that may want to select which machine operands have their dependency broken (see comments in code). Note that by default, subtargets don't know about the existence of dependency-breaking. In the absence of external information, those method calls would always return false. A new tablegen class named STIPredicate has been added by this patch to let processor models classify instructions that have properties in common. The idea is that, a MCInstrPredicate definition can be used to "generate" an instruction equivalence class, with the idea that instructions of a same class all have a property in common. STIPredicate definitions are essentially a collection of instruction equivalence classes. Also, different processor models can specify a different variant of the same STIPredicate with different rules (i.e. predicates) to classify instructions. Tablegen backends (in this particular case, the SubtargetEmitter) will be able to process STIPredicate definitions, and automatically generate functions in XXXGenSubtargetInfo. This patch introduces two special kind of STIPredicate classes named IsZeroIdiomFunction and IsDepBreakingFunction in tablegen. It also adds a definition for those in the BtVer2 scheduling model only. This patch supersedes the one committed at r338372 (phabricator review: D49310). The main advantages are: - We can describe subtarget predicates via tablegen using STIPredicates. - We can describe zero-idioms / dep-breaking instructions directly via tablegen in the scheduling models. In future, the STIPredicates framework can be used for solving other problems. Examples of future developments are: - Teach how to identify optimizable register-register moves - Teach how to identify slow LEA instructions (each subtarget defining its own concept of "slow" LEA). - Teach how to identify instructions that have undocumented false dependencies on the output registers on some processors only. It is also (in my opinion) an elegant way to expose knowledge to both external tools like llvm-mca, and codegen passes. For example, machine schedulers in LLVM could reuse that information when internally constructing the data dependency graph for a code region. This new design feature is also an "opt-in" feature. Processor models don't have to use the new STIPredicates. It has all been designed to be as unintrusive as possible. Differential Revision: https://reviews.llvm.org/D52174 llvm-svn: 342555
* [MC] Avoid inlining constant symbols with variants.Nirav Dave2018-09-171-1/+1
| | | | | | | | | | | | | | Summary: Defer unnecessary early inlining of constants to symbol variants. Fixes PR38945. Reviewers: nickdesaulniers, rnk Subscribers: nemanjai, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D52188 llvm-svn: 342412
* [MC/Dwarf] Unclamp DWARF linetables format on Darwin.Jonas Devlieghere2018-09-131-7/+1
| | | | | | | | | | | In r319995, we fixed the line table format to version 2 on Darwin because dsymutil didn't yet understand the new format which caused test failures for the LLDB bots. This has been resolved in the meantime so there's no reason to keep this limitation. rdar://problem/35968332 llvm-svn: 342136
* Fix typos. NFCFangrui Song2018-09-081-1/+1
| | | | llvm-svn: 341740
* [codeview] Add .cv_string directive for testing purposesReid Kleckner2018-09-071-1/+20
| | | | | | | | | | | The main use case for this directive is to allow assembly writers to write their own FPO data strings without going through the .cv_fpo* directive family. I'm experimenting with different RPN programs to fix PR38857, and I figured I should go ahead and make this directive permanent. llvm-svn: 341712
* The initial .text section generated in object files was missing theEric Christopher2018-09-064-1/+14
| | | | | | | | | | | | | | | | | | | | SHF_ARM_PURECODE flag when being built with the -mexecute-only flag. All code sections of an ELF must have the flag set for the final .text section to be execute-only, otherwise the flag gets removed. A HasData flag is added to MCSection to aid in the determination that the section is empty. A virtual setTargetSectionFlags is added to MCELFObjectTargetWriter to allow subclasses to set target specific section flags to be added to sections which we then use in the ARM backend to set SHF_ARM_PURECODE. Patch by Ivan Lozano! Reviewed By: echristo Differential Revision: https://reviews.llvm.org/D48792 llvm-svn: 341593
* [WebAssembly] clang-format (NFC)Heejin Ahn2018-09-052-36/+36
| | | | | | | | | | | | Summary: This patch runs clang-format on all wasm-only files. Reviewers: aardappel, dschuff, sunfish, tlively Subscribers: MatzeB, sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D51447 llvm-svn: 341439
* [MC] - ConstantPools.cpp: Style consistency, remove redundant braces. NFC.Kristina Brooks2018-09-031-4/+2
| | | | | | | Remove braces around two, single statement "if" blocks in line with rest of the file and the general LLVM code style. NFC, testing commit access. llvm-svn: 341294
* [MC] fix a clang-tidy warning, NFCKrasimir Georgiev2018-08-291-2/+2
| | | | | | | | | | | | | | | | | | | | Summary: Per clang-tidy: function 'llvm::MCStreamer::checkCVLocSection' has a definition with different parameter names .../llvm/lib/MC/MCStreamer.cpp:275:18: the definition seen here .../llvm/include/llvm/MC/MCStreamer.h:235:8: differing parameters are named here: ('FuncId'), in definition: ('FunctionId') Reviewers: bkramer Reviewed By: bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D51406 llvm-svn: 340912
* Revert r340904 "[llvm-mc] - Allow to set custom flags for debug sections."George Rimar2018-08-291-12/+4
| | | | | | | It broke PPC64 BB: http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/23252 llvm-svn: 340906
* [llvm-mc] - Allow to set custom flags for debug sections.George Rimar2018-08-291-4/+12
| | | | | | | | | | | | | | | | | | | | | | I am experimenting with a single split dwarf (.dwo sections in .o files). I want to make linker to ignore .dwo sections in .o, for that I am trying to add SHF_EXCLUDE flag ("E") for them in my asm sample. I found that currently, it is impossible to add any flag for debug sections using llvm-mc. That happens because we have a set of predefined unique sections created early with default flags: https://github.com/llvm-mirror/llvm/blob/master/lib/MC/MCObjectFileInfo.cpp#L391 This patch allows a user to add any flags he wants. I had to edit TargetLoweringObjectFileImpl.cpp to set MetaData type for debug sections. Their kind was Data by default (so they were allocatable) and so after changes introduced by this patch the SHF_ALLOC flag was applied for them, what does not make sense for debug sections. One of OrcJITTests tests failed because of that. Differential revision: https://reviews.llvm.org/D51361 llvm-svn: 340904
* [codeview] Clean up machinery for deferring .cv_loc emissionReid Kleckner2018-08-285-76/+53
| | | | | | | | | | | Now that we create the label at the point of the directive, we don't need to set the "current CV location", and then later when we emit the next instruction, create a label for it and emit it. DWARF still defers the labels used in .debug_loc until the next instruction or value, for reasons unknown. llvm-svn: 340883
* [codeview] Emit labels for .cv_loc immediatelyReid Kleckner2018-08-281-4/+4
| | | | | | | | | | | | | | | Previously we followed the DWARF implementation, which waits until the next instruction or data to emit the label to use in the .debug_loc section. We might want to consider re-evaluating that design choice as well, since it means the .loc skips alignment padding, for better or worse. This was the most minimal fix I could come up with, but we should be able to do a lot of cleanups now that we don't need to save a pending CV location on the CodeViewContext. I plan to do those next, but this immediately fixes an assertion for some of our users. llvm-svn: 340878
* [debuginfo] generate debug info with asm+.fileBrian Cain2018-08-281-8/+8
| | | | | | | | | | | | | | | Summary: For assembly input files, generate debug info even when the .file directive is present, provided it does not include a file-number argument. Fixes PR38695. Reviewers: probinson, sidneym Subscribers: aprantl, hiraditya, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D51315 llvm-svn: 340839
* [MC, RISCV] Fixed StringRef Assertion `Index < Length && "Invalid index!"'Ana Pazos2018-08-251-1/+1
| | | | | | | | | | | | | | | | | | Summary: Handle the case IDVal is an empty string. This bug was uncovered by a LLVM MC Assembler Protocol Buffer Fuzzer for the RISC-V assembly language. Reviewers: rnk Reviewed By: rnk Subscribers: rnk, niravd, pcc, peter.smith, asb, grosbach, llvm-commits, bcain, kito-cheng, shiva0217, rogfer01, PkmX Differential Revision: https://reviews.llvm.org/D50808 llvm-svn: 340678
* Initialize the address-significance table fragment's layout order.Peter Collingbourne2018-08-231-0/+1
| | | | | | | | | This fragment is created after layout, which is where the order normally gets set. Should fix a test failure under msan. llvm-svn: 340516
* MC: Don't align COFF section contents.Peter Collingbourne2018-08-231-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Aligning section contents is not required, but only recommended, by the specification. Microsoft's documentation says (https://docs.microsoft.com/en-us/windows/desktop/debug/pe-format#section-table-section-headers): "For object files, the value should be aligned on a 4-byte boundary for best performance." However, according to my measurements, aligning section contents has a neutral to negative effect on performance. I measured the median run time of 100 links of Chromium's base_unittests on Linux with lld-link and on Windows with link.exe with both aligned and unaligned sections. On Linux I didn't see a measurable performance difference, and on Windows the link was slightly faster with unaligned sections (presumably because on Windows the bottleneck is I/O). Also, the sections created by cl.exe are unaligned, so we should expect tools to broadly accept unaligned sections. Differential Revision: https://reviews.llvm.org/D51149 llvm-svn: 340514
* MC: Teach the COFF object writer to write address-significance tables.Peter Collingbourne2018-08-221-0/+35
| | | | | | | | | The format is the same as in ELF: a sequence of ULEB128-encoded symbol indexes. Differential Revision: https://reviews.llvm.org/D51047 llvm-svn: 340499
* [WebAssembly] Ensure relocation entries are ordered by offsetSam Clegg2018-08-221-5/+17
| | | | | | | | | | | | | wasm-lld expects relocation entries to be sorted by offset. In most cases llvm produces them in order, but the CODE section (which combines many MCSections) is an exception because we order the functions in Symbol order, not in section order. What is more, its not clear weather `recordRelocation` is guaranteed to be called in offset order so this sort of most likely needed in the general case too. Differential Revision: https://reviews.llvm.org/D51065 llvm-svn: 340423
* MC: Remove dead code from WinCOFFObjectWriter.cpp. NFCI.Peter Collingbourne2018-08-181-20/+0
| | | | | | | | Remove code for writing auxiliary symbols of type function definition and begin function. These types of symbols are associated with pre-CodeView debug info and we never emit them. llvm-svn: 340113
* [MC] Improve error message when a codeview register is unknownReid Kleckner2018-08-171-1/+4
| | | | | | This is in MCRegisterInfo, we can print the actual register name easily. llvm-svn: 340089
* [MC] Improve COFF associative section lookupReid Kleckner2018-08-161-11/+17
| | | | | | | | | | | | | | | Handle the case when the symbol is private. Private symbols are not in the COFF object file symbol table, so they aren't inserted into SymbolMap. We can't look up the section of the symbol that way. Instead, get the MCSection from the MCSymbol and map that to the object file section. Print a better error message when the symbol has no section, like when the symbol is undefined. Fixes PR38607 llvm-svn: 339942
* [MC] Cleanup noop default case spelling. NFC.Nirav Dave2018-08-161-1/+1
| | | | llvm-svn: 339906
* [MC] Remove unused variableBenjamin Kramer2018-08-161-1/+0
| | | | llvm-svn: 339896
* [MC][X86] Enhance X86 Register expression handling to more closely match GCC.Nirav Dave2018-08-162-14/+25
| | | | | | | | | | | | | | | | Allow the comparison of x86 registers in the evaluation of assembler directives. This generalizes and simplifies the extension from r334022 to catch another case found in the Linux kernel. Reviewers: rnk, void Reviewed By: rnk Subscribers: hiraditya, nickdesaulniers, llvm-commits Differential Revision: https://reviews.llvm.org/D50795 llvm-svn: 339895
* [RISCV][MC] Don't fold symbol differences if ↵Alex Bradbury2018-08-161-4/+7
| | | | | | | | | | | | | | | | | | | | | | requiresDiffExpressionRelocations is true When emitting the difference between two symbols, the standard behavior is that the difference will be resolved to an absolute value if both of the symbols are offsets from the same data fragment. This is undesirable on architectures such as RISC-V where relaxation in the linker may cause the computed difference to become invalid. This caused an issue when compiling to object code, where the size of a function in the debug information was already calculated even though it could change as a consequence of relaxation in the subsequent linking stage. This patch inhibits the resolution of symbol differences to absolute values where the target's AsmBackend has declared that it does not want these to be folded. Differential Revision: https://reviews.llvm.org/D45773 Patch by Edward Jones. llvm-svn: 339864
* Fix -Wimplicit-fallthrough warning introduced in rL339397.Simon Pilgrim2018-08-101-0/+1
| | | | llvm-svn: 339422
* [MC] Move EH DWARF encodings from MC to CodeGen, NFCReid Kleckner2018-08-091-157/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The TType encoding, LSDA encoding, and personality encoding are all passed explicitly by CodeGen to the assembler through .cfi_* directives, so only the AsmPrinter needs to know about them. The FDE CFI encoding however, controls the encoding of the label implicitly created by the .cfi_startproc directive. That directive seems to be special in that it doesn't take an encoding, so the assembler just has to know how to encode one DSO-local label reference from .eh_frame to .text. As a result, it looks like MC will continue to have to know when the large code model is in use. Perhaps we could invent a '.cfi_startproc [large]' flag so that this knowledge doesn't need to pollute the assembler. Reviewers: davide, lliu0, JDevlieghere Subscribers: hiraditya, fedor.sergeev, llvm-commits Differential Revision: https://reviews.llvm.org/D50533 llvm-svn: 339397
* [DWARF] Unclamp line table version on Darwin for v5 and later.Jonas Devlieghere2018-08-081-3/+6
| | | | | | | | | On Darwin we pin the DWARF line tables to version 2. Stop doing so for DWARF v5 and later. Differential revision: https://reviews.llvm.org/D49381 llvm-svn: 339288
* MC: Redirect .addrsig directives referring to private (.L) symbols to the ↵Peter Collingbourne2018-08-061-0/+2
| | | | | | | | | | | | | section symbol. This matches our behaviour for regular (i.e. relocated) references to private symbols and therefore avoids needing to unnecessarily write address-significant .L symbols to the object file's symbol table, which can interfere with stack traces. Fixes check-cfi after r339050. llvm-svn: 339066
* Revert "Add a warning if someone attempts to add extra section flags to ↵Eric Christopher2018-08-051-36/+16
| | | | | | | | | | | sections" There are a bunch of edge cases and inconsistencies in how we're emitting sections cause this warning to fire and it needs more work. This reverts commit r335558. llvm-svn: 338968
* [WebAssembly] Cleanup of the way globals and global flags are handledNicholas Wilson2018-08-032-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D44030 llvm-svn: 338894
* Fix "not all control paths return a value" MSVC warning.Simon Pilgrim2018-08-011-0/+1
| | | | llvm-svn: 338529
* [MC] Report fatal error for DWARF types for non-ELF object filesJonas Devlieghere2018-08-011-2/+12
| | | | | | | | | | | | | | Getting the DWARF types section is only implemented for ELF object files. We already disabled emitting debug types in clang (r337717), but now we also report an fatal error (rather than crashing) when trying to obtain this section in MC. Additionally we ignore the generate debug types flag for unsupported target triples. See PR38190 for more information. Differential revision: https://reviews.llvm.org/D50057 llvm-svn: 338527
* [DebugInfo] Fix build failed in clang-x86_64-linux-selfhost-modules.Hsiangkai Wang2018-08-011-1/+7
| | | | | | Only generate symbol difference expression if needed. llvm-svn: 338484
* [DebugInfo] Generate fixups as emitting DWARF .debug_line.Hsiangkai Wang2018-08-012-6/+81
| | | | | | | | | | | | | | | | It is necessary to generate fixups in .debug_line as relaxation is enabled due to the address delta may be changed after relaxation. DWARF will record the mappings of lines and addresses in .debug_line section. It will encode the information using special opcodes, standard opcodes and extended opcodes in Line Number Program. I use DW_LNS_fixed_advance_pc to encode fixed length address delta and DW_LNE_set_address to encode absolute address to make it possible to generate fixups in .debug_line section. Differential Revision: https://reviews.llvm.org/D46850 llvm-svn: 338477
* [llvm-mca][BtVer2] Teach how to identify dependency-breaking idioms.Andrea Di Biagio2018-07-311-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch teaches llvm-mca how to identify dependency breaking instructions on btver2. An example of dependency breaking instructions is the zero-idiom XOR (example: `XOR %eax, %eax`), which always generates zero regardless of the actual value of the input register operands. Dependency breaking instructions don't have to wait on their input register operands before executing. This is because the computation is not dependent on the inputs. Not all dependency breaking idioms are also zero-latency instructions. For example, `CMPEQ %xmm1, %xmm1` is independent on the value of XMM1, and it generates a vector of all-ones. That instruction is not eliminated at register renaming stage, and its opcode is issued to a pipeline for execution. So, the latency is not zero. This patch adds a new method named isDependencyBreaking() to the MCInstrAnalysis interface. That method takes as input an instruction (i.e. MCInst) and a MCSubtargetInfo. The default implementation of isDependencyBreaking() conservatively returns false for all instructions. Targets may override the default behavior for specific CPUs, and return a value which better matches the subtarget behavior. In future, we should teach to Tablegen how to automatically generate the body of isDependencyBreaking from scheduling predicate definitions. This would allow us to expose the knowledge about dependency breaking instructions to the machine schedulers (and, potentially, other codegen passes). Differential Revision: https://reviews.llvm.org/D49310 llvm-svn: 338372
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