summaryrefslogtreecommitdiffstats
path: root/llvm/lib/MC
Commit message (Collapse)AuthorAgeFilesLines
...
* MC: Have the object writers return the number of bytes written. NFCI.Peter Collingbourne2018-05-215-17/+27
| | | | | | | | | | This removes the last external use of the stream. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47042 llvm-svn: 332863
* MC: Change object writers to use endian::Writer. NFCI.Peter Collingbourne2018-05-215-355/+364
| | | | | | | | Part of PR37466. Differential Revision: https://reviews.llvm.org/D47040 llvm-svn: 332861
* MC: Change MCAssembler::writeSectionData and writeFragmentPadding to take a ↵Peter Collingbourne2018-05-216-65/+50
| | | | | | | | | | | | | | raw_ostream. NFCI. Also clean up a couple of hacks where we were writing the section contents to another stream by setting the object writer's stream, writing and setting it back. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47038 llvm-svn: 332858
* MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an ↵Peter Collingbourne2018-05-212-8/+6
| | | | | | | | | | | | | MCObjectWriter. NFCI. To make this work I needed to add an endianness field to MCAsmBackend so that writeNopData() implementations know which endianness to use. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47035 llvm-svn: 332857
* Support: Simplify endian stream interface. NFCI.Peter Collingbourne2018-05-183-13/+7
| | | | | | | | | | | | Provide some free functions to reduce verbosity of endian-writing a single value, and replace the endianness template parameter with a field. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47032 llvm-svn: 332757
* MC: Change the streamer ctors to take an object writer instead of a stream. ↵Peter Collingbourne2018-05-185-16/+20
| | | | | | | | | | | | | | NFCI. The idea is that a client that wants split dwarf would create a specific kind of object writer that creates two files, and use it to create the streamer. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47050 llvm-svn: 332749
* [MC] Relax .fill size requirementsNirav Dave2018-05-184-33/+60
| | | | | | | | | | | | | | | Avoid requirement that number of values must be known at assembler time. Fixes PR33586. Reviewers: rnk, peter.smith, echristo, jyknight Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D46703 llvm-svn: 332741
* [RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvancedShiva Chen2018-05-182-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | For RISCV branch instructions, we need to preserve relocation types when linker relaxation enabled, so then linker could modify offset when the branch offsets changed. We preserve relocation types by define shouldForceRelocation. IsResolved return by evaluateFixup will always false when shouldForceRelocation return true. It will make RISCV MC Branch Relaxation always relax 16-bit branches to 32-bit form, even if the symbol actually could be resolved. To avoid 16-bit branches always relax to 32-bit form when linker relaxation enabled, we add a new parameter WasForced to indicate that the symbol actually couldn't be resolved and not forced by shouldForceRelocation return true. RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with unresolved symbols by (!IsResolved && !WasForced). RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit to 16-bit transformation in MC layer. Differential Revision: https://reviews.llvm.org/D46350 llvm-svn: 332696
* [WebAssembly] MC: Fix typo in commentSam Clegg2018-05-171-1/+1
| | | | llvm-svn: 332632
* [WebAssembly] Remove unused headers in MCWasmObjectWriterSam Clegg2018-05-161-3/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D46969 llvm-svn: 332535
* [WebAssembly] MC: Ensure that FUNCTION_OFFSET relocations are always against ↵Sam Clegg2018-05-161-1/+17
| | | | | | | | | | | | | | | | | function symbols. The getAtom() method wasn't doing what we needed in all cases. We want the symbols for the function which defines that section. We can compute this easily enough and we know that we have at most one function in each section. Once this lands I will revert rL331412 which is no longer needed. Fixes PR37409 Differential Revision: https://reviews.llvm.org/D46970 llvm-svn: 332517
* [WebAssembly] Move toString helpers to BinaryFormatSam Clegg2018-05-142-28/+2
| | | | | | | | Subscribers: dschuff, mgorny, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46847 llvm-svn: 332305
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-142-35/+35
| | | | | | | | | | | | | | | | The DEBUG() macro is very generic so it might clash with other projects. The renaming was done as follows: - git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g' - git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM - Manual change to APInt - Manually chage DOCS as regex doesn't match it. In the transition period the DEBUG() macro is still present and aliased to the LLVM_DEBUG() one. Differential Revision: https://reviews.llvm.org/D43624 llvm-svn: 332240
* Correct compatibility with the GNU Assembler's handling of comparison opsBill Wendling2018-05-141-2/+20
| | | | | | | | GAS returns -1 for a comparison operator if the result is true and 0 if false. https://www.sourceware.org/binutils/docs-2.12/as.info/Infix-Ops.html#Infix%20Ops llvm-svn: 332215
* [WebAssembly] Create section start symbols automatically for all sectionsSam Clegg2018-05-104-22/+39
| | | | | | | | | | | These symbols only get included in the output symbols table if they are used in a relocation. This behaviour matches more closely the ELF object writer. Differential Revision: https://reviews.llvm.org/D46561 llvm-svn: 332005
* MC: Remove dead code. NFCI.Peter Collingbourne2018-05-081-1/+0
| | | | | | We should never emit an SHT_DYNSYM into an object file. llvm-svn: 331821
* [WebAssembly] MC: Use existing MCSymbol.Index field rather than inventing ↵Sam Clegg2018-05-081-15/+11
| | | | | | | | | | | | | extra mapping MCSymbol has getIndex/setIndex which are implementation defined and on other platforms are used to store the symbol table index. It makes sense to use this rather than invent a new mapping. Differential Revision: https://reviews.llvm.org/D46555 llvm-svn: 331705
* [MC] ELFObjectWriter: Removing unneeded variable and castSam Clegg2018-05-071-5/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D46289 llvm-svn: 331704
* [WebAssembly] Ensure all .debug_XXX section has proper symbol namesSam Clegg2018-05-072-4/+11
| | | | | | | | | | | Updated wasm section symbols names to match section name, and ensure all referenced sections will have a symbol (per DWARF spec v3, Figure 43) Patch by Yury Delendik! Differential Revision: https://reviews.llvm.org/D46543 llvm-svn: 331664
* [WebAssembly] MC: Create and use first class section symbolsSam Clegg2018-05-024-162/+117
| | | | | | Differential Revision: https://reviews.llvm.org/D46335 llvm-svn: 331413
* [MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer.Sam Clegg2018-05-023-24/+30
| | | | | | | | | This code previously existed only in MCMachOStreamer but is useful for WebAssembly too. See: D46335 Differential Revision: https://reviews.llvm.org/D46297 llvm-svn: 331412
* Fix release build breakageSam Clegg2018-05-021-0/+2
| | | | | | | This function was added in rL331220 but wasn't testing in release configurations. llvm-svn: 331320
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-015-47/+47
| | | | | | | | | | | | | | | | We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46290 llvm-svn: 331272
* [MC] Add llvm_unreachable to toString to fix compile time warning.Florian Hahn2018-05-011-2/+1
| | | | | | | | | | | | | Without this change, GCC 7 raises the warning below: control reaches end of non-void function Reviewers: sbc100, andreadb Reviewed By: andreadb Differential Revision: https://reviews.llvm.org/D46304 llvm-svn: 331255
* NFC, Avoid a warning in WasmObjectWriterGabor Buella2018-05-011-0/+2
| | | | | | | | | | The warning was (introduced in r331220): lib/MC/WasmObjectWriter.cpp:51:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ llvm-svn: 331251
* [WebAssembly] MC: Improve debug outputSam Clegg2018-04-301-8/+33
| | | | llvm-svn: 331220
* [MC] Change AsmParser to leverage Assembler during evaluationNirav Dave2018-04-305-20/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | Teach AsmParser to check with Assembler for when evaluating constant expressions. This improves the handing of preprocessor expressions that must be resolved at parse time. This idiom can be found as assembling-time assertion checks in source-level assemblers. Note that this relies on the MCStreamer to keep sufficient tabs on Section / Fragment information which the MCAsmStreamer does not. As a result the textual output may fail where the equivalent object generation would pass. This can most easily be resolved by folding the MCAsmStreamer and MCObjectStreamer together which is planned for in a separate patch. Currently, this feature is only enabled for assembly input, keeping IR compilation consistent between assembly and object generation. Reviewers: echristo, rnk, probinson, espindola, peter.smith Reviewed By: peter.smith Subscribers: eraman, peter.smith, arichardson, jyknight, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D45164 llvm-svn: 331218
* IWYU for llvm-config.h in llvm, additions.Nico Weber2018-04-3010-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | See r331124 for how I made a list of files missing the include. I then ran this Python script: for f in open('filelist.txt'): f = f.strip() fl = open(f).readlines() found = False for i in xrange(len(fl)): p = '#include "llvm/' if not fl[i].startswith(p): continue if fl[i][len(p):] > 'Config': fl.insert(i, '#include "llvm/Config/llvm-config.h"\n') found = True break if not found: print 'not found', f else: open(f, 'w').write(''.join(fl)) and then looked through everything with `svn diff | diffstat -l | xargs -n 1000 gvim -p` and tried to fix include ordering and whatnot. No intended behavior change. llvm-svn: 331184
* ELFObjectWriter: Allow one unique symver per symbolVlad Tsyrklevich2018-04-271-0/+4
| | | | | | | | | | | | | | | | | Summary: Only allow a single unique .symver alias per symbol. This matches the behavior of gas. I noticed that we ignored multiple mismatched symver directives looking at https://reviews.llvm.org/D45798 Reviewers: pcc, tejohnson, espindola Reviewed By: pcc Subscribers: emaste, arichardson, llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D45845 llvm-svn: 331078
* [MC] Undo spurious commit added into r331052.Nirav Dave2018-04-275-40/+20
| | | | llvm-svn: 331055
* [MC] Provide default value for IsResolved.Nirav Dave2018-04-276-21/+41
| | | | llvm-svn: 331052
* [MC] Modify MCAsmStreamer to always build MCAssembler. NFCI.Nirav Dave2018-04-272-18/+33
| | | | llvm-svn: 331048
* [MC] Allow MCAssembler to be constructed without all subcomponents. NFCI.Nirav Dave2018-04-272-16/+35
| | | | llvm-svn: 331047
* [WebAssembly] Section symbols must have local bindingSam Clegg2018-04-271-1/+1
| | | | | | | | | | Summary: Also test for symbols information in test/MC/WebAssembly/debug-info.ll. Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46160 llvm-svn: 331005
* [WebAssembly] Write DWARF data into wasm object fileSam Clegg2018-04-261-25/+164
| | | | | | | | | | | - Writes ".debug_XXX" into corresponding custom sections. - Writes relocation records into "reloc.debug_XXX" sections. Patch by Yury Delendik! Differential Revision: https://reviews.llvm.org/D44184 llvm-svn: 330982
* [WebAssembly] Add version to object file metadataSam Clegg2018-04-261-1/+2
| | | | | | | | | | Summary: See https://github.com/WebAssembly/tool-conventions/issues/54 Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46069 llvm-svn: 330969
* [codeview] Ignore .cv_loc directives at the end of a functionReid Kleckner2018-04-253-0/+19
| | | | | | | | | | If no data or instructions are emitted after a location directive, we should clear the cv_loc when we change sections, or it will be emitted at the beginning of the next section. This violates our invariant that all .cv_loc directives belong to the same section. Add clearer assertions for this. llvm-svn: 330884
* [wasm] Fix uninitialized memory introduced in r330749.Chandler Carruth2018-04-241-1/+1
| | | | | | | Found with MSan. This was causing all the WASM MC tests to fail about 10% of the time. llvm-svn: 330764
* [WebAssembly] Use section index in relocation section headerSam Clegg2018-04-241-49/+31
| | | | | | | | | | | Rather than referring to sections my their code, use the absolute index of the target section within the module. See https://github.com/WebAssembly/tool-conventions/issues/52 Differential Revision: https://reviews.llvm.org/D45980 llvm-svn: 330749
* Reflow formatting after previous NFC commit.Eric Christopher2018-04-241-6/+6
| | | | llvm-svn: 330676
* Change if-conditionals to else-if as they should all be mutually exclusive.Eric Christopher2018-04-241-3/+3
| | | | | | No functional change intended. llvm-svn: 330675
* [WebAssembly] MC: Refactor section creation codeSam Clegg2018-04-231-17/+14
| | | | | | | | | Remove the use of default argument in favor of a separate startCustomSection method. Differential Revision: https://reviews.llvm.org/D45794 llvm-svn: 330632
* [WebAssembly] Enabled -triple=wasm32-unknown-unknown-wasm path using ELF ↵Sam Clegg2018-04-191-3/+7
| | | | | | | | | | | | | | | | directive parser. This is a temporary solution until a proper WASM implementation of MCAsmParserExtension is in place, but at least for now will unblock this path. Added test to make sure this path works with the WASM Assembler. Patch By Wouter van Oortmerssen! Differential Revision: https://reviews.llvm.org/D45386 llvm-svn: 330370
* [MC] Moved all the remaining logic that computed instruction latency and ↵Andrea Di Biagio2018-04-151-15/+36
| | | | | | | | | | reciprocal throughput from TargetSchedModel to MCSchedModel. TargetSchedModel now always delegates to MCSchedModel the computation of instruction latency and reciprocal throughput. No functional change intended. llvm-svn: 330099
* [MC] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-04-132-6/+6
| | | | | | | | | | | | | | | | | | | | | | Summary: r327219 added wrappers to std::sort which randomly shuffle the container before sorting. This will help in uncovering non-determinism caused due to undefined sorting order of objects having the same key. To make use of that infrastructure we need to invoke llvm::sort instead of std::sort. Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort. Refer the comments section in D44363 for a list of all the required patches. Reviewers: grosbach, void, ruiu Reviewed By: ruiu Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45138 llvm-svn: 330058
* [DWARFv5] Fuss with asm syntax for conveying MD5 checksum.Paul Robinson2018-04-112-28/+32
| | | | | | | | | | Previously the MD5 option of the .file directive provided the checksum as a quoted hex string; now it's a normal hex number with 0x prefix, same as the .octa directive accepts. Differential Revision: https://reviews.llvm.org/D45459 llvm-svn: 329820
* [MachO] Emit Weak ReadOnlyWithRel to ConstDataSectionSteven Wu2018-04-101-3/+6
| | | | | | | | | | | | | | | | | Summary: Darwin dynamic linker can handle weak symbols in ConstDataSection. ReadonReadOnlyWithRel symbols should be emitted in ConstDataSection instead of normal DataSection. rdar://problem/39298457 Reviewers: dexonsmith, kledzik Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45472 llvm-svn: 329752
* [Support] Make line-number cache robust against access patterns.Graydon Hoare2018-04-071-22/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The LLVM SourceMgr class (which is used indirectly by Swift, though not Clang) has a routine for looking up line numbers of SMLocs. This routine uses a shared, special-purpose cache that handles exactly one access pattern efficiently: looking up the line number of an SMLoc that points into the same buffer as the last query made to the SourceMgr, at a location in the buffer at or ahead of the last query. When this works it's fine, but when it fails it's catastrophic for performancer: one recent out-of-order access from a Swift utility routine ran for tens of seconds, spending 99% of its time repeatedly scanning buffers for '\n'. This change removes the shared cache from the SourceMgr and installs a new cache in each SrcBuffer. The per-SrcBuffer caches are also "full", in the sense that rather than caching a single last-query pointer, they cache _all_ the line-ending offsets, in a binary-searchable array, such that once it's populated (on first access), all subsequent access patterns run at the same speed. Performance measurements I've done show this is actually a little bit faster on real codebases (though only a couple fractions of a percent). Memory usage is up by a few tens to hundreds of bytes per SrcBuffer that has a line lookup done on it; I've attempted to minimize this by using dynamic selection of integer sized when storing offset arrays. But the main motive here is to make-impossible the cases we don't always see, that show up by surprise when there is an out-of-order access pattern. Reviewers: jordan_rose Reviewed By: jordan_rose Subscribers: probinson, llvm-commits Differential Revision: https://reviews.llvm.org/D45003 llvm-svn: 329470
* [RISCV] Tablegen-driven Instruction Compression.Sameer AbuAsal2018-04-061-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch implements a tablegen-driven Instruction Compression mechanism for generating RISCV compressed instructions (C Extension) from the expanded instruction form. This tablegen backend processes CompressPat declarations in a td file and generates all the compile-time and runtime checks required to validate the declarations, validate the input operands and generate correct instructions. The checks include validating register operands, immediate operands, fixed register operands and fixed immediate operands. Example: class CompressPat<dag input, dag output> { dag Input = input; dag Output = output; list<Predicate> Predicates = []; } let Predicates = [HasStdExtC] in { def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs1, GPRNoX0:$rs2), (C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>; } The result is an auto-generated header file 'RISCVGenCompressEmitter.inc' which exports two functions for compressing/uncompressing MCInst instructions, plus some helper functions: bool compressInst(MCInst& OutInst, const MCInst &MI, const MCSubtargetInfo &STI, MCContext &Context); bool uncompressInst(MCInst& OutInst, const MCInst &MI, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI); The clients that include this auto-generated header file and invoke these functions can compress an instruction before emitting it, in the target-specific ASM or ELF streamer, or can uncompress an instruction before printing it, when the expanded instruction format aliases is favored. The following clients were added to implement compression\uncompression for RISCV: 1) RISCVAsmParser::MatchAndEmitInstruction: Inserted a call to compressInst() to compresses instructions parsed by llvm-mc coming from an ASM input. 2) RISCVAsmPrinter::EmitInstruction: Inserted a call to compressInst() to compress instructions that were lowered from Machine Instructions (MachineInstr). 3) RVInstPrinter::printInst: Inserted a call to uncompressInst() to print the expanded version of the instruction instead of the compressed one (e.g, add s0, s0, a5 instead of c.add s0, a5) when -riscv-no-aliases is not passed. This patch squashes D45119, D42780 and D41932. It was reviewed in smaller patches by asb, efriedma, apazos and mgrang. Reviewers: asb, efriedma, apazos, llvm-commits, sabuasal Reviewed By: sabuasal Subscribers: mgorny, eraman, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, niosHD, kito-cheng, shiva0217, zzheng Differential Revision: https://reviews.llvm.org/D45385 llvm-svn: 329455
* [WebAssembly] Allow for the creation of user-defined custom sectionsSam Clegg2018-04-051-1/+43
| | | | | | | | | | | | | This patch adds a way for users to create their own custom sections to be added to wasm files. At the LLVM IR layer, they are defined through the "wasm.custom_sections" named metadata. The expected use case for this is bindings generators such as wasm-bindgen. Patch by Dan Gohman Differential Revision: https://reviews.llvm.org/D45297 llvm-svn: 329315
OpenPOWER on IntegriCloud