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llvm-svn: 164182
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llvm-svn: 164181
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Patch by Adhemerval Zanella.
llvm-svn: 164141
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Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.
llvm-svn: 164105
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llvm-svn: 164098
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model.
llvm-svn: 164092
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I have to work out the Target/CodeGen header dependencies
before putting this back.
llvm-svn: 164072
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llvm-svn: 164066
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llvm-svn: 164065
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model.
llvm-svn: 164061
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llvm-svn: 163970
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llvm-svn: 163934
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llvm-svn: 163933
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* wrap code blocks in \code ... \endcode;
* refer to parameter names in paragraphs correctly (\arg is not what most
people want -- it starts a new paragraph);
* use \param instead of \arg to document parameters in order to be consistent
with the rest of the codebase.
llvm-svn: 163902
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For gas compatibility.
rdar://12219394
llvm-svn: 163854
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.set a, b - c + CONSTANT
d = b - c + CONSTANT
Both 'a' and 'd' should be marked as absolute symbols (N_ABS).
rdar://12219394
llvm-svn: 163853
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"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"
No functional change. Update r163344.
llvm-svn: 163679
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Apparently, NumSubRegIndices was completely unused before. Adjust it by
one to include the null subreg index, just like getNumRegs() includes
the null register.
llvm-svn: 163628
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llvm-svn: 163547
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For some reason .lcomm uses byte alignment and .comm log2 alignment so we can't
use the same setting for both. Fix this by reintroducing the LCOMM enum.
I verified this against mingw's gcc.
llvm-svn: 163420
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bytes, not power of 2.
llvm-svn: 163405
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- Darwin lied about not supporting .lcomm and turned it into zerofill in the
asm parser. Push the zerofill-conversion down into macho-specific code.
- This makes the tri-state LCOMMType enum superfluous, there are no targets
without .lcomm.
- Do proper error reporting when trying to use .lcomm with alignment on a target
that doesn't support it.
- .comm and .lcomm alignment was parsed in bytes on COFF, should be power of 2.
- Fixes PR13755 (.lcomm crashes on ELF).
llvm-svn: 163395
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No functional change.
llvm-svn: 163344
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the SubtargetInfoKV tables. Found by gcc48 -Wcast-qual.
llvm-svn: 163251
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padding. If the desired padding is smaller than the supported NOP size,
we will enlarge the padding to make it work.
llvm-svn: 162870
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llvm-svn: 162826
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llvm-svn: 162678
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In collaboration with Adhemerval Zanella.
llvm-svn: 162562
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llvm-svn: 162446
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llvm-svn: 162362
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within the codegen EK_GPRel64BlockAddress. This was not
supported for direct object output and resulted in an assertion.
This change adds support for EK_GPRel64BlockAddress for
direct object.
One fallout from this is to turn on rela relocations
for mips64 to match gas.
llvm-svn: 162334
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on a patch by Andy/PaX. I added the support for dot and dollar.
llvm-svn: 162298
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consistent with the other "expected identifier" errors.
Extracted from the Andy/PaX patch. I added the test.
llvm-svn: 162291
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llvm-svn: 162283
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llvm-svn: 162282
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llvm-svn: 162281
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of the range. Fixes PR13581!
llvm-svn: 161739
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These functions are very generic. There's no reason for them to
be tied to MCObjectWriter.
llvm-svn: 161545
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Committing it first as it makes the "real" patch a lot easier to read.
llvm-svn: 161491
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Patch by kai@redstar.de !
llvm-svn: 161487
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There are situations where inline ASM may want to change the section -- for
instance, to create a variable in the .data section. However, it cannot do this
without (potentially) restoring to the wrong section. E.g.:
asm volatile (".section __DATA, __data\n\t"
".globl _fnord\n\t"
"_fnord: .quad 1f\n\t"
".text\n\t"
"1:" :::);
This may be wrong if this is inlined into a function that has a "section"
attribute. The user should use `.pushsection' and `.popsection' here instead.
The addition of `.previous' is added for completeness.
<rdar://problem/12048387>
llvm-svn: 161477
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Empty macro arguments at the end of the list should be as-if not specified at
all, but those in the middle of the list need to be kept so as not to screw
up the positional numbering. E.g.:
.macro foo
foo_-bash___:
nop
.endm
foo 1, 2, 3, 4
foo 1, , 3, 4
Should create two labels, "foo_1_2_3_4" and "foo_1__3_4".
rdar://11948769
llvm-svn: 161002
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Move some functions from MCRegisterInfo.h that don't need to be inline.
This shrinks llc by 8K.
llvm-svn: 160865
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llvm-svn: 160621
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Test case will be added later when long branch patch is checked in.
llvm-svn: 160597
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llvm-svn: 160475
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llvm-svn: 160445
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subtarget CPU descriptions and support new features of
MachineScheduler.
MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.
These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.
This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.
llvm-svn: 159891
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llvm-svn: 159889
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AsmParser::ParseStatement.
Patch by Vladimir Medic.
llvm-svn: 159768
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