summaryrefslogtreecommitdiffstats
path: root/llvm/lib/MC/MCELFObjectTargetWriter.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Initial TOC support for PowerPC64 object creationAdhemerval Zanella2012-10-251-0/+8
| | | | | | | | | | | | | | This patch adds initial PPC64 TOC MC object creation using the small mcmodel (a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC, R_PPC64_TOC16, and R_PPC64_TOC16DS). The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter' is meant to avoid the creation of an unreferenced ".TOC." symbol (used in the .odp creation) as well to set the R_PPC64_TOC relocation target as the temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should not point to any symbol. llvm-svn: 166677
* The ELF relocation record format is different for N64 Jack Carter2012-06-271-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | which many Mips 64 ABIs use than for O64 which many if not all other target ABIs use. Most architectures have the following 64 bit relocation record format: typedef struct { Elf64_Addr r_offset; /* Address of reference */ Elf64_Xword r_info; /* Symbol index and type of relocation */ } Elf64_Rel; typedef struct { Elf64_Addr r_offset; Elf64_Xword r_info; Elf64_Sxword r_addend; } Elf64_Rela; Whereas N64 has the following format: typedef struct { Elf64_Addr r_offset;/* Address of reference */ Elf64_Word r_sym; /* Symbol index */ Elf64_Byte r_ssym; /* Special symbol */ Elf64_Byte r_type3; /* Relocation type */ Elf64_Byte r_type2; /* Relocation type */ Elf64_Byte r_type; /* Relocation type */ } Elf64_Rel; typedef struct { Elf64_Addr r_offset;/* Address of reference */ Elf64_Word r_sym; /* Symbol index */ Elf64_Byte r_ssym; /* Special symbol */ Elf64_Byte r_type3; /* Relocation type */ Elf64_Byte r_type2; /* Relocation type */ Elf64_Byte r_type; /* Relocation type */ Elf64_Sxword r_addend; } Elf64_Rela; The structure is the same size, but the r_info data element is now 5 separate elements. Besides the content aspects, endian byte reordering will be different for the area with each element being endianized separately. I treat this as generic and continue to pass r_type as an integer masking and unmasking the byte sized N64 values for N64 mode. I've implemented this and it causes no affect on other current targets. This passes make check. Jack llvm-svn: 159299
* Add a hook in MCELFObjectTargetWriter to allow targets to sort relocationAkira Hatanaka2012-03-231-0/+8
| | | | | | entries in the relocation table before they are written out to the file. llvm-svn: 153345
* Define trivial destructor inline.Rafael Espindola2011-12-241-3/+0
| | | | llvm-svn: 147230
* Make GetRelocType pure virtual.Rafael Espindola2011-12-241-8/+0
| | | | llvm-svn: 147229
* Move PPC bits to lib/Target/PowerPC.Rafael Espindola2011-12-221-0/+4
| | | | llvm-svn: 147124
* Move the ARM specific parts of the ELF writer to Target/ARM.Rafael Espindola2011-12-221-0/+14
| | | | llvm-svn: 147115
* Move the X86 specific bits of the ELF writer to the Target/X86 directory.Rafael Espindola2011-12-211-0/+8
| | | | | | Other targets will follow shortly. llvm-svn: 147060
* Reduce the exposure of Triple::OSType in the ELF object writer. This willRafael Espindola2011-12-211-2/+2
| | | | | | | avoid including ADT/Triple.h in many places when the target specific bits are moved. llvm-svn: 147059
* Move some data to the TargetWriter.Rafael Espindola2010-12-181-1/+6
| | | | llvm-svn: 122134
* Stub out explicit MCELFObjectTargetWriter interface.Rafael Espindola2010-12-171-0/+18
llvm-svn: 122067
OpenPOWER on IntegriCloud