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* [DebugInfo] Fix build failed in clang-x86_64-linux-selfhost-modules.Hsiangkai Wang2018-08-011-1/+7
| | | | | | Only generate symbol difference expression if needed. llvm-svn: 338484
* [DebugInfo] Generate fixups as emitting DWARF .debug_line.Hsiangkai Wang2018-08-011-6/+30
| | | | | | | | | | | | | | | | It is necessary to generate fixups in .debug_line as relaxation is enabled due to the address delta may be changed after relaxation. DWARF will record the mappings of lines and addresses in .debug_line section. It will encode the information using special opcodes, standard opcodes and extended opcodes in Line Number Program. I use DW_LNS_fixed_advance_pc to encode fixed length address delta and DW_LNE_set_address to encode absolute address to make it possible to generate fixups in .debug_line section. Differential Revision: https://reviews.llvm.org/D46850 llvm-svn: 338477
* Remove trailing spaceFangrui Song2018-07-301-1/+1
| | | | | | sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h} llvm-svn: 338293
* [MC] Move bundling and MCSubtargetInfo to MCEncodedFragment [NFC]Peter Smith2018-06-151-12/+15
| | | | | | | | | | | | | | Instruction bundling is only supported on descendants of the MCEncodedFragment type. By moving the bundling functionality and MCSubtargetInfo to this class it makes it easier to set and extract the MCSubtargetInfo when it is necessary. This is a refactoring change that will make it easier to pass the MCSubtargetInfo through to writeNops when nop padding is required. Differential Revision: https://reviews.llvm.org/D45959 llvm-svn: 334814
* [MC] Move MCAssembler::dump into the correct cpp file. NFCSam Clegg2018-06-141-0/+24
| | | | | | Differential Revision: https://reviews.llvm.org/D46556 llvm-svn: 334713
* [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixupPeter Smith2018-06-061-4/+9
| | | | | | | | | | | | | | | | | | On targets like Arm some relaxations may only be performed when certain architectural features are available. As functions can be compiled with differing levels of architectural support we must make a judgement on whether we can relax based on the MCSubtargetInfo for the function. This change passes through the MCSubtargetInfo for the function to fixupNeedsRelaxation so that the decision on whether to relax can be made per function. In this patch, only the ARM backend makes use of this information. We must also pass the MCSubtargetInfo to applyFixup because some fixups skip error checking on the assumption that relaxation has occurred, to prevent code-generation errors applyFixup must see the same MCSubtargetInfo as fixupNeedsRelaxation. Differential Revision: https://reviews.llvm.org/D44928 llvm-svn: 334078
* [RISCV] Add symbol diff relocation support for RISC-VAlex Bradbury2018-05-231-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For RISC-V it is desirable to have relaxation happen in the linker once addresses are known, and as such the size between two instructions/byte sequences in a section could change. For most assembler expressions, this is fine, as the absolute address results in the expression being converted to a fixup, and finally relocations. However, for expressions such as .quad .L2-.L1, the assembler folds this down to a constant once fragments are laid out, under the assumption that the difference can no longer change, although in the case of linker relaxation the differences can change at link time, so the constant is incorrect. One place where this commonly appears is in debug information, where the size of a function expression is in a form similar to the above. This patch extends the assembler to allow an AsmBackend to declare that it does not want the assembler to fold down this expression, and instead generate a pair of relocations that allow the linker to carry out the calculation. In this case, the expression is not folded, but when it comes to emitting a fixup, the generic FK_Data_* fixups are converted into a pair, one for the addition half, one for the subtraction, and this is passed to the relocation generating methods as usual. I have named these FK_Data_Add_* and FK_Data_Sub_* to indicate which half these are for. For RISC-V, which supports this via e.g. the R_RISCV_ADD64, R_RISCV_SUB64 pair of relocations, these are also set to always emit relocations relative to local symbols rather than section offsets. This is to deal with the fact that if relocations were calculated on e.g. .text+8 and .text+4, the result 12 would be stored rather than 4 as both addends are added in the linker. Differential Revision: https://reviews.llvm.org/D45181 Patch by Simon Cook. llvm-svn: 333079
* MC: Have the object writers return the number of bytes written. NFCI.Peter Collingbourne2018-05-211-6/+1
| | | | | | | | | | This removes the last external use of the stream. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47042 llvm-svn: 332863
* MC: Change MCAssembler::writeSectionData and writeFragmentPadding to take a ↵Peter Collingbourne2018-05-211-41/+42
| | | | | | | | | | | | | | raw_ostream. NFCI. Also clean up a couple of hacks where we were writing the section contents to another stream by setting the object writer's stream, writing and setting it back. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47038 llvm-svn: 332858
* MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an ↵Peter Collingbourne2018-05-211-4/+4
| | | | | | | | | | | | | MCObjectWriter. NFCI. To make this work I needed to add an endianness field to MCAsmBackend so that writeNopData() implementations know which endianness to use. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47035 llvm-svn: 332857
* [MC] Relax .fill size requirementsNirav Dave2018-05-181-13/+32
| | | | | | | | | | | | | | | Avoid requirement that number of values must be known at assembler time. Fixes PR33586. Reviewers: rnk, peter.smith, echristo, jyknight Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D46703 llvm-svn: 332741
* [RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvancedShiva Chen2018-05-181-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | For RISCV branch instructions, we need to preserve relocation types when linker relaxation enabled, so then linker could modify offset when the branch offsets changed. We preserve relocation types by define shouldForceRelocation. IsResolved return by evaluateFixup will always false when shouldForceRelocation return true. It will make RISCV MC Branch Relaxation always relax 16-bit branches to 32-bit form, even if the symbol actually could be resolved. To avoid 16-bit branches always relax to 32-bit form when linker relaxation enabled, we add a new parameter WasForced to indicate that the symbol actually couldn't be resolved and not forced by shouldForceRelocation return true. RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with unresolved symbols by (!IsResolved && !WasForced). RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit to 16-bit transformation in MC layer. Differential Revision: https://reviews.llvm.org/D46350 llvm-svn: 332696
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-1/+1
| | | | | | | | | | | | | | | | We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46290 llvm-svn: 331272
* [MC] Provide default value for IsResolved.Nirav Dave2018-04-271-1/+1
| | | | llvm-svn: 331052
* [MC] Modify MCAsmStreamer to always build MCAssembler. NFCI.Nirav Dave2018-04-271-2/+2
| | | | llvm-svn: 331048
* [MC] Allow MCAssembler to be constructed without all subcomponents. NFCI.Nirav Dave2018-04-271-12/+31
| | | | llvm-svn: 331047
* [MC] Fix assembler infinite loop on EH table using LEB padding.Rafael Espindola2018-02-011-2/+6
| | | | | | | | | | | | | Fix the infinite loop reported in PR35809. It can occur with GCC-style EH table assembly, where the compiler relies on the assembler to calculate the offsets in the EH table. Also see https://sourceware.org/bugzilla/show_bug.cgi?id=4029 for the equivalent issue in the GNU assembler. Patch by Ryan Prichard! llvm-svn: 323934
* Use a MCExpr for the size of MCFillFragment.Rafael Espindola2018-01-091-3/+13
| | | | | | | This allows the size to be found during ralaxation. This fixes pr35858. llvm-svn: 322131
* MC: Add support for mach-o build_versionMatthias Braun2017-12-141-2/+2
| | | | | | | | LC_BUILD_VERSION is a new load command superseding the previously used LC_XXX_MIN_VERSION commands. This adds an assembler directive along with encoding/streaming support. llvm-svn: 320661
* NFC: Rename MCSafeSEHFragment to MCSymbolIdFragmentAdrian McCarthy2017-11-081-3/+3
| | | | | | | | | | | | | | | Summary: This fragment emits a symbol ID and will be useful for more than just Safe SEH tables (e.g., I plan to re-use it for Control Flow Guard tables). This is simply a rename refactor. Reviewers: rnk Subscribers: llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D39770 llvm-svn: 317703
* [MC] Adding code padding for performance stability - infrastructure. NFC.Omer Paparo Bivas2017-10-241-0/+30
| | | | | | | | | | | | | | | | | Infrastructure designed for padding code with nop instructions in key places such that preformance improvement will be achieved. The infrastructure is implemented such that the padding is done in the Assembler after the layout is done and all IPs and alignments are known. This patch by itself in a NFC. Future patches will make use of this infrastructure to implement required policies for code padding. Reviewers: aaboud zvi craig.topper gadi.haber Differential revision: https://reviews.llvm.org/D34393 Change-Id: I92110d0c0a757080a8405636914a93ef6f8ad00e llvm-svn: 316413
* Simplify interface now that we don't need to pass IsPCRel. NFC.Rafael Espindola2017-07-111-4/+1
| | | | llvm-svn: 307734
* Fully fix the movw/movt addend.Rafael Espindola2017-07-111-5/+6
| | | | | | | | | | The issue is not if the value is pcrel. It is whether we have a relocation or not. If we have a relocation, the static linker will select the upper bits. If we don't have a relocation, we have to do it. llvm-svn: 307730
* Rename and adjust processFixupValue.Rafael Espindola2017-06-301-3/+3
| | | | | | | It was not processing any value. All that it ever did was force relocations, so name it shouldForceRelocation. llvm-svn: 306906
* Simplify the processFixupValue interface. NFC.Rafael Espindola2017-06-241-2/+1
| | | | llvm-svn: 306202
* Remove redundant argument.Rafael Espindola2017-06-241-1/+1
| | | | llvm-svn: 306189
* ARM: move some logic from processFixupValue to applyFixup.Rafael Espindola2017-06-231-7/+9
| | | | | | | | | | | | processFixupValue is called on every relaxation iteration. applyFixup is only called once at the very end. applyFixup is then the correct place to do last minute changes and value checks. While here, do proper range checks again for fixup_arm_thumb_bl. We used to do it, but dropped because of thumb2. We now do it again, but use the thumb2 range. llvm-svn: 306177
* Add a common error checking for some invalid expressions.Rafael Espindola2017-06-221-4/+13
| | | | | | | This refactors a bit of duplicated code and fixes an assertion failure on ELF. llvm-svn: 306035
* Use a MutableArrayRef. NFC.Rafael Espindola2017-06-211-2/+2
| | | | llvm-svn: 305968
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* Add MCContext argument to MCAsmBackend::applyFixup for error reportingAlex Bradbury2017-04-051-2/+2
| | | | | | | | | | | | | | | | A number of backends (AArch64, MIPS, ARM) have been using MCContext::reportError to report issues such as out-of-range fixup values in their TgtAsmBackend. This is great, but because MCContext couldn't easily be threaded through to the adjustFixupValue helper function from its usual callsite (applyFixup), these backends ended up adding an MCContext* argument and adding another call to applyFixup to processFixupValue. Adding an MCContext parameter to applyFixup makes this unnecessary, and even better - applyFixup can take a reference to MCContext rather than a potentially null pointer. Differential Revision: https://reviews.llvm.org/D30264 llvm-svn: 299529
* [MC] Fix some Clang-tidy modernize and Include What You Use warnings; other ↵Eugene Zelenko2017-02-071-11/+23
| | | | | | minor fixes (NFC). llvm-svn: 294369
* MC: Introduce the ABS8 symbol modifier.Peter Collingbourne2017-01-311-0/+4
| | | | | | | | | | | @ABS8 can be applied to symbols which appear as immediate operands to instructions that have a 8-bit immediate form for that operand. It causes the assembler to use the 8-bit form and an 8-bit relocation (e.g. R_386_8 or R_X86_64_8) for the symbol. Differential Revision: https://reviews.llvm.org/D28688 llvm-svn: 293667
* Fix aliases to thumbfunc-based exprs to be thumbfunc.Evgeniy Stepanov2017-01-191-3/+9
| | | | | | | | | If F is a Thumb function symbol, and G = F + const, and G is a function symbol, then G is Thumb. Because what else could it be? Differential Revision: https://reviews.llvm.org/D28878 llvm-svn: 292514
* [Assembler] Better error messages for .org directiveOliver Stannard2016-12-141-10/+20
| | | | | | | | | | | | | | | | | | | | | Currently, the error messages we emit for the .org directive when the expression is not absolute or is out of range do not include the line number of the directive, so it can be hard to track down the problem if a file contains many .org directives. This patch stores the source location in the MCOrgFragment, so that it can be used for diagnostics emitted during layout. Since layout is an iterative process, and the errors are detected during each iteration, it would have been possible for errors to be reported multiple times. To prevent this, I've made the assembler bail out after each iteration if any errors have been reported. This will still allow multiple unrelated errors to be reported in the common case where they are all detected in the first round of layout. Differential Revision: https://reviews.llvm.org/D27411 llvm-svn: 289643
* [MC] Don't crash when trying to emit a relocation against .bss.Davide Italiano2016-07-261-2/+2
| | | | | | Turn that into an error instead. llvm-svn: 276783
* Fix branch relaxation in 16-bit mode.Nirav Dave2016-07-111-1/+1
| | | | | | | | | | | | | | | Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation to generate jumps with 16-bit sized immediates in 16-bit mode. This fixes PR22097. Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D20830 llvm-svn: 275068
* There's no reason to use _ to name variables different just for construction.Eric Christopher2016-05-241-3/+3
| | | | llvm-svn: 270622
* [MCAssembler] Allow backend to finalize layout post-relaxation.Colin LeMahieu2016-04-271-0/+1
| | | | | | Differential revision: http://reviews.llvm.org/D19429 llvm-svn: 267796
* [MC] Add support for encoding CodeView variable definition rangesDavid Majnemer2016-02-051-5/+27
| | | | | | | | | | | | | | | | | | | CodeView, like most other debug formats, represents the live range of a variable so that debuggers might print them out. They use a variety of records to represent how a particular variable might be available (in a register, in a frame pointer, etc.) along with a set of ranges where this debug information is relevant. However, the format only allows us to use ranges which are limited to a maximum of 0xF000 in size. This means that we need to split our debug information into chunks of 0xF000. Because the layout of code is not known until *very* late, we must use a new fragment to record the information we need until we can know *exactly* what the range is. llvm-svn: 259868
* [codeview] Wire up the .cv_inline_linetable directiveReid Kleckner2016-02-021-0/+19
| | | | | | | | This directive emits the binary annotations that describe line and code deltas in inlined call sites. Single-stepping through inlined frames in windbg now works. llvm-svn: 259535
* Use larger write sizes for MCFillFragment.Rafael Espindola2016-01-191-3/+14
| | | | | | | This brings the pr26208 testcase down to 3.2 seconds. Not checking it in since it does create a 4GB .o file. llvm-svn: 258149
* Simplify MCFillFragment.Rafael Espindola2016-01-191-13/+3
| | | | | | | | | The value size was always 1 or 0, so we don't need to store it. In a no asserts build this takes the testcase of pr26208 from 11 to 10 seconds. llvm-svn: 258141
* [ptr-traits] Split the MCFragment type hierarchy out of the MCAssemblerChandler Carruth2015-12-291-429/+0
| | | | | | | | | | | | | | | | | | | | | | header to its own header, allowing users of fragments to have a narrower header file, and avoid circular header dependencies when getting the definition of MCSection prior to inspecting traits on MCSection pointers. This is part of a series of patches to allow LLVM to check for complete pointee types when computing its pointer traits. This is absolutely necessary to get correct (or reproducible) results for things like how many low bits are guaranteed to be zero. Note that this doesn't in any way change the design of MC, it is just moving code around to allow the *header files* to be more fine grained. Without this, it is impossible to get a complete type for MCSection where it is needed. If anyone would prefer a different slicing of the header files, I'm happy to oblige of course. =] llvm-svn: 256548
* [MC, COFF] Support link /incremental conditionallyDavid Majnemer2015-12-211-1/+2
| | | | | | | | | | | | | | | | Today, we always take into account the possibility that object files produced by MC may be consumed by an incremental linker. This results in us initialing fields which vary with time (TimeDateStamp) which harms hermetic builds (e.g. verifying a self-host went well) and produces sub-optimal code because we cannot assume anything about the relative position of functions within a section (call sites can get redirected through incremental linker thunks). Let's provide an MCTargetOption which controls this behavior so that we can disable this functionality if we know a-priori that the build will not rely on /incremental. llvm-svn: 256203
* [Assembler] Make fatal assembler errors non-fatalOliver Stannard2015-11-171-9/+20
| | | | | | | | | | | | | | Currently, if the assembler encounters an error after parsing (such as an out-of-range fixup), it reports this as a fatal error, and so stops after the first error. However, for most of these there is an obvious way to recover after emitting the error, such as emitting the fixup with a value of zero. This means that we can report on all of the errors in a file, not just the first one. MCContext::reportError records the fact that an error was encountered, so we won't actually emit an object file with the incorrect contents. Differential Revision: http://reviews.llvm.org/D14717 llvm-svn: 253328
* Simplify .org processing and make it a bit more powerful.Rafael Espindola2015-11-041-2/+9
| | | | | | | We now always create the fragment, which lets us handle things like .org after a .align. llvm-svn: 252101
* MC: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-101-1/+1
| | | | llvm-svn: 249922
* MC: Stop using Fragment::getNextNode()Duncan P. N. Exon Smith2015-10-081-7/+7
| | | | | | | | | | | | | Stop using `getNextNode()` to get an iterator to a fragment (at least, in this one place). Instead, use iterator logic directly. The `getNextNode()` interface isn't actually supposed to work for creating iterators; it's supposed to return `nullptr` (not a real iterator) if this is the last node. It's currently broken and will "happen" to work, but if we ever fix the function, we'll get some strange failures in places like this. llvm-svn: 249763
* Fix pr24486.Rafael Espindola2015-10-051-2/+14
| | | | | | | | | | | | | | | | | | This extends the work done in r233995 so that now getFragment (in addition to getSection) also works for variable symbols. With that the existing logic to decide if a-b can be computed works even if a or b are variables. Given that, the expression evaluation can avoid expanding variables as aggressively and that in turn lets the relocation code see the original variable. In order for this to work with the asm streamer, there is now a dummy fragment per section. It is used to assign a section to a symbol when no other fragment exists. This patch is a joint work by Maxim Ostapenko andy myself. llvm-svn: 249303
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