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path: root/llvm/lib/IR/AutoUpgrade.cpp
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* [AVX-512] Remove and autoupgrade the masked integer compare intrinsicsCraig Topper2017-06-221-6/+33
| | | | | | | | | | | | | | | | | Summary: These intrinsics aren't used by clang and haven't been for a while. There's some really terrible codegen in the 32-bit target for avx512bw due to i64 not being legal. But as I said these intrinsics aren't used by clang even before this patch so this codegen reflects our clang behavior today. Reviewers: spatel, RKSimon, zvi, igorb Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34389 llvm-svn: 306047
* Added missing break.Galina Kistanova2017-05-191-0/+1
| | | | llvm-svn: 303454
* Support arbitrary address space pointers in masked gather/scatter intrinsics.Elad Cohen2017-05-031-1/+24
| | | | | | | | | | | | Fixes PR31789 - When loop-vectorize tries to use these intrinsics for a non-default address space pointer we fail with a "Calling a function with a bad singature!" assertion. This patch solves this by adding the 'vector of pointers' argument as an overloaded type which will determine the address space. Differential revision: https://reviews.llvm.org/D31490 llvm-svn: 302018
* [X86][SSE] Update MOVNTDQA non-temporal loads to generic implementation (LLVM)Simon Pilgrim2017-04-141-0/+17
| | | | | | | | | | MOVNTDQA non-temporal aligned vector loads can be correctly represented using generic builtin loads, allowing us to remove the existing x86 intrinsics. Clang companion patch: D31766. Differential Revision: https://reviews.llvm.org/D31767 llvm-svn: 300325
* Add address space mangling to lifetime intrinsicsMatt Arsenault2017-04-101-12/+17
| | | | | | In preparation for allowing allocas to have non-0 addrspace. llvm-svn: 299876
* [X86][LLVM] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into ↵Michael Zuckerman2017-04-041-0/+12
| | | | | | | | | | | generic intrinsics. This patch is a part one of two reviews, one for the clang and the other for LLVM. The patch deletes the back-end intrinsics and adds support for them in the auto upgrade. Differential Revision: https://reviews.llvm.org/D31393 llvm-svn: 299432
* Let llvm.objectsize be conservative with null pointersGeorge Burgess IV2017-03-211-7/+12
| | | | | | | | | | | This adds a parameter to @llvm.objectsize that makes it return conservative values if it's given null. This fixes PR23277. Differential Revision: https://reviews.llvm.org/D28494 llvm-svn: 298430
* Keep attributes, calling convention, etc, when remangling intrinsicDaniel Berlin2017-03-011-50/+37
| | | | | | | | | | | | Summary: Fix issue reported where intrinsic calling convention is dropped after r295253. Reviewers: sanjoy Subscribers: materi, llvm-commits Differential Revision: https://reviews.llvm.org/D30422 llvm-svn: 296563
* [IR][X86] Fix llvm version number in comments in AutoUpgrade. Forgot the ↵Craig Topper2017-02-241-13/+13
| | | | | | next release is 5.0 not 4.1 llvm-svn: 296092
* [AVX-512] Remove lzcnt intrinsics and autoupgrade them to generic ctlz ↵Craig Topper2017-02-241-0/+8
| | | | | | | | intrinsics with select. Clang has been emitting cltz intrinsics for a while now. llvm-svn: 296091
* [X86][IR] In AutoUpgrade, check explicitly for xop.vpcmov and xop.vpcmov.256 ↵Craig Topper2017-02-231-1/+2
| | | | | | | | | | instead of anything starting with xop.vpcmov There were some older intrinsics that only existed for less than a month in 2012 that still exist in some out of tree test files that start with this string, but aren't able to be handled by the current upgrade code and fire an assert. Now we'll go back to treating them as not intrinsics at all and just passing them through to output. Fixes PR32041, sort of. llvm-svn: 295930
* Recommit "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."Craig Topper2017-02-181-2/+2
| | | | | | Clang has now been fixed to not use these intrinsics. llvm-svn: 295571
* Revert "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."Craig Topper2017-02-181-2/+2
| | | | | | This reverts r295564. I missed that clang was still using the intrinsics despite our half implemented autoupgrade support. llvm-svn: 295565
* [X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR.Craig Topper2017-02-181-2/+2
| | | | | | It seems we were already upgrading 128-bit VPCMOV, but the intrinsic was still defined and being used in isel patterns. While I was here I also simplified the tablegen multiclasses. llvm-svn: 295564
* [X86][IR] Simplify the XOP vpcmov autoupgrade code. NFCCraig Topper2017-02-181-7/+3
| | | | llvm-svn: 295563
* [X86][IR] Merge together some very similar AutoUpgrade handling. NFCCraig Topper2017-02-181-24/+16
| | | | llvm-svn: 295562
* [AVX-512] Remove 128/256-bit masked fp max/min intrinsics. Upgrade them to ↵Craig Topper2017-02-181-0/+38
| | | | | | legacy unmasked intrinsics and select instructions. llvm-svn: 295543
* [IR][X86] Simplify some AutoUpgrade code slightly. NFCCraig Topper2017-02-171-3/+2
| | | | llvm-svn: 295426
* [IR][X86] Rename an AutoUpgrade helper function to more accurately match ↵Craig Topper2017-02-171-6/+6
| | | | | | what intrinsics it handles. NFC llvm-svn: 295425
* [IR][X86] Move X86 specific portions of UpgradeIntrinsicFunction1 to a ↵Craig Topper2017-02-171-233/+248
| | | | | | | | couple helper functions. NFC This enables some early outs to avoid repeatedly using IsX86 check to qualify. I hope to continue to improve this to shorten the lengths of some of the string comparisons. llvm-svn: 295424
* [AVX-512] Remove masked packss/packus intrinsics and autoupgrade to unmasked ↵Craig Topper2017-02-161-0/+40
| | | | | | | | intrinsics with select instructions. For 512-bit add new unmasked intrinsics. The new 512-bit unmasked intrinsics will make it easy to handle these with the SSE/AVX intrinsics in InstCombine where we currently have a TODO. llvm-svn: 295290
* Implement intrinsic mangling for literal struct types.Daniel Berlin2017-02-151-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes PR 31921 Summary: Predicateinfo requires an ugly workaround to try to avoid literal struct types due to the intrinsic mangling not being implemented. This workaround actually does not work in all cases (you can hit the assert by bootstrapping with -print-predicateinfo), and can't be made to work without DFS'ing the type (IE copying getMangledStr and using a version that detects if it would crash). Rather than do that, i just implemented the mangling. It seems simple, since they are unified structurally. Looking at the overloaded-mangling testcase we have, it actually turns out the gc intrinsics will *also* crash if you try to use a literal struct. Thus, the testcase added fails before this patch, and works after, without needing to resort to predicateinfo. Reviewers: chandlerc, davide Subscribers: llvm-commits, sanjoy Differential Revision: https://reviews.llvm.org/D29925 llvm-svn: 295253
* [NVPTX] Auto-upgrade some NVPTX intrinsics to LLVM target-generic code.Justin Lebar2017-01-211-2/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Specifically, we upgrade llvm.nvvm.: * brev{32,64} * clz.{i,ll} * popc.{i,ll} * abs.{i,ll} * {min,max}.{i,ll,u,ull} * h2f These either map directly to an existing LLVM target-generic intrinsic or map to a simple LLVM target-generic idiom. In all cases, we check that the code we generate is lowered to PTX as we expect. These builtins don't need to be backfilled in clang: They're not accessible to user code from nvcc. Reviewers: tra Subscribers: majnemer, cfe-commits, llvm-commits, jholewinski Differential Revision: https://reviews.llvm.org/D28793 llvm-svn: 292694
* [ARM] Remove rbit intrinsics and autoupgrade to generic bitreverse.Chad Rosier2017-01-101-1/+1
| | | | | | Testing already covered by CodeGen/ARM/rbit.ll llvm-svn: 291587
* [AArch64] Add support for lowering bitreverse to the rbit instruction.Chad Rosier2017-01-101-0/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D28379 llvm-svn: 291575
* [AVX-512] Remove vinsert intrinsics and autoupgrade to native ↵Craig Topper2017-01-031-15/+23
| | | | | | shufflevectors. There are some codegen problems here that I'll try to fix in future commits. llvm-svn: 290864
* [AVX-512] Remove vextract intrinsics and autoupgrade to native ↵Craig Topper2017-01-031-10/+16
| | | | | | | | shufflevectors. This unfortunately generates some really terrible code without VLX support due to v2i1 and v4i1 not being legal. Hopefully we can improve that in future patches. llvm-svn: 290863
* [AVX-512] Remove masked pmuldq and pmuludq intrinsics and autoupgrade them ↵Craig Topper2016-12-271-0/+26
| | | | | | to unmasked intrinsics plus a select. llvm-svn: 290583
* [X86] Remove masking from 512-bit VPERMIL intrinsics in preparation for ↵Craig Topper2016-12-111-4/+5
| | | | | | being able to constant fold them in InstCombineCalls like we do for 128/256-bit. llvm-svn: 289350
* [X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being ↵Craig Topper2016-12-101-2/+3
| | | | | | able to constant fold it in InstCombineCalls like we do for 128/256-bit. llvm-svn: 289344
* [AVX-512] Remove 128/256 masked vpermil instrinsics and autoupgrade to a ↵Craig Topper2016-12-101-0/+22
| | | | | | select around the unmasked avx1 intrinsics. llvm-svn: 289340
* [X86][IR] Move the autoupgrading of store intrinsics out of the main nested ↵Craig Topper2016-12-101-90/+102
| | | | | | | | if/else chain. This should buy a little more time against the MSVC limit mentioned in PR31034. The handlers for stores all return at the end of their block so they can be picked off early. llvm-svn: 289339
* [AVX-512] Remove intrinsics for valignd/q and autoupgrade them to native ↵Craig Topper2016-11-231-11/+30
| | | | | | shuffles. llvm-svn: 287744
* [AVX-512] Replace masked 16-bit element variable shift intrinsics with new ↵Craig Topper2016-11-181-16/+27
| | | | | | | | | | unmasked versions and selects. The same thing was done to 32-bit and 64-bit element sizes previously. This will allow us to support these shuffls in InstCombineCalls along with the other variable shift intrinsics. llvm-svn: 287312
* [X86][AVX512] Autoupgrade lossless i32/u32 to f64 conversion intrinsics with ↵Simon Pilgrim2016-11-161-3/+14
| | | | | | | | | | | | generic IR Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic SINT_TO_FP/UINT_TO_FP calls instead of x86 intrinsics without affecting final codegen. LLVM counterpart to D26686 Differential Revision: https://reviews.llvm.org/D26736 llvm-svn: 287108
* [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_{ss|sd} intrinsics.Ayman Musa2016-11-161-0/+16
| | | | | | Differential Revision: https://reviews.llvm.org/D26128 llvm-svn: 287087
* [X86] Remove the scalar intrinsics for fadd/fsub/fdiv/fmulCraig Topper2016-11-161-0/+44
| | | | | | | | | | | | Summary: These intrinsics have been unused for clang for a while. This patch removes them. We auto upgrade them to extractelements, a scalar operation and then an insertelement. This matches the sequence used by clangs intrinsic file. Reviewers: zvi, delena, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26660 llvm-svn: 287083
* [X86] Add LLVM version number for each intrinsic handled by auto upgrade for ↵Craig Topper2016-11-151-152/+158
| | | | | | | | | | age tracking. One day we'd like to remove some of this autoupgrade support and it will be easier if we know how long some of it has been around. Differential Revision: https://reviews.llvm.org/D26321 llvm-svn: 286933
* [AVX-512] Remove and autoupgrade masked dword/qword variable shift ↵Craig Topper2016-11-141-24/+35
| | | | | | intrinsics to the new unmasked versions and selects. llvm-svn: 286786
* [X86][IR] Reduce the number of full string comparisons in the code that ↵Craig Topper2016-11-131-156/+173
| | | | | | autoupgrades masked shift intrinsics. llvm-svn: 286768
* revert commit r286761, some builds failed on Win platformsIgor Breger2016-11-131-17/+0
| | | | llvm-svn: 286765
* [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_{ss|sd} intrinsics.Ayman Musa2016-11-131-0/+17
| | | | | | Differential Revision: https://reviews.llvm.org/D26128 llvm-svn: 286761
* [AVX-512] Remove the remaining masked shift by immediate or by single value. ↵Craig Topper2016-11-121-55/+84
| | | | | | | | Autoupgrade them to recently introduced unmasked versions and a select. After this I'll add the unmasked intrinsics to InstCombineCalls to finish making our handling of these types of shuffles consistent between AVX-512 and the legacy intrinsics. llvm-svn: 286725
* Add a missing break statement. NFC.George Burgess IV2016-11-081-0/+1
| | | | llvm-svn: 286203
* [AVX-512] Remove masked pmovzx/pmovsx builtins and autoupgrade them to ↵Craig Topper2016-11-071-1/+9
| | | | | | | | selects and native zext/sext. This mostly reuses earlier autoupgrade support for the sse and avx equivalents. Just needed to add the code to add the select. llvm-svn: 286092
* [X86] Use StringRef::startswith to reduce a few compares in the intrinsic ↵Craig Topper2016-11-071-12/+3
| | | | | | autoupgrade code. llvm-svn: 286090
* [AVX-512] Remove 128/256 masked pshufb intrinsics. Autoupgrade them to ↵Craig Topper2016-11-071-0/+16
| | | | | | legacy intrinsics and a select. llvm-svn: 286089
* [AVX-512] Remove intrinsics for 128/256-bit masked variable shift. Instead ↵Craig Topper2016-11-061-0/+30
| | | | | | upgrade them to a select and the older AVX2 intrinsic. llvm-svn: 286073
* [AVX-512] Remove intrinsics for 128/256-bit masked shift by immediate. ↵Craig Topper2016-11-061-0/+48
| | | | | | Instead upgrade them to a select and the older SSE/AVX2 intrinsic. llvm-svn: 286072
* [AVX-512] Remove intrinsics for 128/256-bit masked shift by single element ↵Craig Topper2016-11-061-0/+59
| | | | | | in xmm. Instead upgrade them to a select and the older SSE/AVX2 intrinsic. llvm-svn: 286070
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