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* Revert r139782, "RemoveCopyByCommutingDef doesn't need hasPHIKill()."Jakob Stoklund Olesen2011-09-151-8/+8
| | | | | | | | | | It does, after all. RemoveCopyByCommutingDef rewrites the uses of one particular value number in A. It doesn't know how to rewrite phi uses, so there can't be any. llvm-svn: 139787
* Stop verifying hasPHIKill() flags.Jakob Stoklund Olesen2011-09-151-11/+1
| | | | | | | | | | There is only one legitimate use remaining, in addIntervalsForSpills(). All other calls to hasPHIKill() are only used to update PHIKill flags. The addIntervalsForSpills() function is part of the old spilling framework, only used by linearscan. llvm-svn: 139783
* RemoveCopyByCommutingDef doesn't need hasPHIKill().Jakob Stoklund Olesen2011-09-151-8/+8
| | | | | | | | | | | Instead, let HasOtherReachingDefs() test for defs in B that overlap any phi-defs in A as well. This test is slightly different, but almost identical. A perfectly precise test would only check those phi-defs in A that are reachable from AValNo. llvm-svn: 139782
* It is safe to remat a value killed by phis.Jakob Stoklund Olesen2011-09-151-3/+1
| | | | | | | | | | | | | The source live range is recomputed using shrinkToUses() which does handle phis correctly. The hasPHIKill() condition was relevant in the old days when ReMaterializeTrivialDef() tried to recompute the live range itself. The shrinkToUses() function will mark the original def as dead when no more uses and phi kills remain. It is then removed by runOnMachineFunction(). llvm-svn: 139781
* Leave hasPHIKill flags alone in LiveInterval::RenumberValues.Jakob Stoklund Olesen2011-09-151-21/+0
| | | | | | | | | | | It is conservatively correct to keep the hasPHIKill flags, even after deleting PHI-defs. The calculation can be very expensive after taildup has created a quadratic number of indirectbr edges in the CFG, and the hasPHIKill flag isn't used for anything after RenumberValues(). llvm-svn: 139780
* [regcoalescing] bug fix for RegistersDefinedFromSameValue.Andrew Trick2011-09-151-2/+5
| | | | | | | An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal. Fixes PR10920 401.bzip2 miscompile with no IV rewrite. llvm-svn: 139765
* Add support to emit debug info for C++0x nullptr type.Devang Patel2011-09-141-4/+11
| | | | llvm-svn: 139751
* Ignore the cloning of unknown registers.Jakob Stoklund Olesen2011-09-141-0/+4
| | | | | | | | THe LRE_DidCloneVirtReg callback may be called with vitual registers that RAGreedy doesn't even know about yet. In that case, there are no data structures to update. llvm-svn: 139702
* Hoist back-copies to the least busy dominator.Jakob Stoklund Olesen2011-09-142-2/+66
| | | | | | | | | | | | | | | | When a back-copy is hoisted to the nearest common dominator, keep looking up the dominator tree for a less loopy dominator, and place the back-copy there instead. Don't do this when a single existing back-copy dominates all the others. Assume the client knows what he is doing, and keep the dominating back-copy. This prevents us from hoisting back-copies into loops in most cases. If a value is defined in a loop with multiple exits, we may still hoist back-copies into that loop. That is the speed/size tradeoff. llvm-svn: 139698
* Add integer promotion support for vselectNadav Rotem2011-09-142-0/+10
| | | | llvm-svn: 139692
* Distinguish complex mapped values from forced recomputation.Jakob Stoklund Olesen2011-09-132-53/+40
| | | | | | | | | | | | | | | | | | When a ParentVNI maps to multiple defs in a new interval, its live range may still be derived directly from RegAssign by transferValues(). On the other hand, when instructions have been rematerialized or hoisted, it may be necessary to completely recompute live ranges using LiveRangeCalc::extend() to all uses. Use a bit in the value map to indicate that a live range must be recomputed. Rename markComplexMapped() to forceRecompute(). This fixes some live range verification errors when -split-spill-mode=size hoists back-copies by recomputing source ranges when RegAssign kills can't be moved. llvm-svn: 139660
* Implement -split-spill-mode=size.Jakob Stoklund Olesen2011-09-132-0/+164
| | | | | | | | | | Whenever the complement interval is defined by multiple copies of the same value, hoist those back-copies to the nearest common dominator. This ensures that at most one copy is inserted per value in the complement inteval, and no phi-defs are needed. llvm-svn: 139651
* Fix check for unaligned load/store so it doesn't catch over-aligned load/store.Eli Friedman2011-09-131-2/+2
| | | | llvm-svn: 139649
* Error out on CodeGen of unaligned load/store. Fix test so it isn't ↵Eli Friedman2011-09-131-2/+9
| | | | | | accidentally testing that case. llvm-svn: 139641
* Fix the assertion which checks the size of the input operand.Nadav Rotem2011-09-131-1/+1
| | | | llvm-svn: 139633
* Add vselect target support for targets that do not support blend but do supportNadav Rotem2011-09-132-2/+45
| | | | | | xor/and/or (For example SSE2). llvm-svn: 139623
* Use a cache to maintain list of machine basic blocks for a given UserValue.Devang Patel2011-09-131-10/+33
| | | | llvm-svn: 139616
* Add SplitEditor::markOverlappedComplement().Jakob Stoklund Olesen2011-09-132-2/+28
| | | | | | | | This function is used to flag values where the complement interval may overlap other intervals. Call it from overlapIntv, and use the flag to fully recompute those live ranges in transferValues(). llvm-svn: 139612
* Eliminate the extendRange() wrapper.Jakob Stoklund Olesen2011-09-132-20/+15
| | | | llvm-svn: 139608
* Switch extendInBlock() to take a kill slot instead of the last use slot.Jakob Stoklund Olesen2011-09-134-16/+13
| | | | | | | Three out of four clients prefer this interface which is consistent with extendIntervalEndTo() and LiveRangeCalc::extend(). llvm-svn: 139604
* Use a separate LiveRangeCalc for the complement in spill modes.Jakob Stoklund Olesen2011-09-132-11/+30
| | | | | | | | | | The complement interval may overlap the other intervals created, so use a separate LiveRangeCalc instance to compute its live range. A LiveRangeCalc instance can only be shared among non-overlapping intervals. llvm-svn: 139603
* Unbreak msvc.NAKAMURA Takumi2011-09-132-2/+2
| | | | llvm-svn: 139581
* Extract live range calculations from SplitKit.Jakob Stoklund Olesen2011-09-135-306/+516
| | | | | | | | SplitKit will soon need two copies of these data structures, and the algorithms will also be useful when LiveIntervalAnalysis becomes independent of LiveVariables. llvm-svn: 139572
* Introduce a bit of a hack.Bill Wendling2011-09-121-15/+44
| | | | | | | | | | | | | | | | | | Splitting a landing pad takes considerable care because of PHIs and other nasties. The problem is that the jump table needs to jump to the landing pad block. However, the landing pad block can be jumped to only by an invoke instruction. So we clone the landingpad instruction into its own basic block, have the invoke jump to there. The landingpad instruction's basic block's successor is now the target for the jump table. But because of PHI nodes, we need to create another basic block for the jump table to jump to. This is definitely a hack, because the values for the PHI nodes may not be defined on the edge from the jump table. But that's okay, because the jump table is simply a construct to mimic what is happening in the CFG. So the values are mysteriously there, even though there is no value for the PHI from the jump table's edge (hence calling this a hack). llvm-svn: 139545
* Remove the -compact-regions flag.Jakob Stoklund Olesen2011-09-121-11/+5
| | | | | | | It has been enabled by default for a while, it was only there to allow performance comparisons. llvm-svn: 139501
* Add an interface for SplitKit complement spill modes.Jakob Stoklund Olesen2011-09-123-5/+49
| | | | | | | | | | | | | | | | | | | | | | | | | SplitKit always computes a complement live range to cover the places where the original live range was live, but no explicit region has been allocated. Currently, the complement live range is created to be as small as possible - it never overlaps any of the regions. This minimizes register pressure, but if the complement is going to be spilled anyway, that is not very important. The spiller will eliminate redundant spills, and hoist others by making the spill slot live range overlap some of the regions created by splitting. Stack slots are cheap. This patch adds the interface to enable spill modes in SplitKit. In spill mode, SplitKit will assume that the complement is going to spill, so it will allow it to overlap regions in order to avoid back-copies. By doing some of the spiller's work early, the complement live range becomes simpler. In some cases, it can become much simpler because no extra PHI-defs are required. This will speed up both splitting and spilling. This is only the interface to enable spill modes, no implementation yet. llvm-svn: 139500
* Update comments to reflect some (not so) recent changes.Jakob Stoklund Olesen2011-09-121-4/+5
| | | | llvm-svn: 139498
* Fix asserts in CodeGen from:Richard Trieu2011-09-102-3/+3
| | | | | | | | | | assert("error"); to: assert(0 && "error"); llvm-svn: 139449
* tidy up a bitChris Lattner2011-09-091-7/+5
| | | | llvm-svn: 139419
* Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the ↵Eli Friedman2011-09-092-24/+36
| | | | | | same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897. llvm-svn: 139407
* Reapply r139247: Cache intermediate results during traceSiblingValue.Jakob Stoklund Olesen2011-09-091-82/+239
| | | | | | | | | | | | | | | | | In some cases such as interpreters using indirectbr, the CFG can be very complicated, and live range splitting may be forced to insert a large number of phi-defs. When that happens, traceSiblingValue can spend a lot of time zipping around in the CFG looking for defs and reloads. This patch causes more information to be cached in SibValues, and the cached values are used to terminate searches early. This speeds up spilling by 20x in one interpreter test case. For more typical code, this is just a 10% speedup of spilling. The previous version had bugs that caused miscompilations. They have been fixed. llvm-svn: 139378
* Directly point debug info to the stack slot of the arugment, instead of ↵Devang Patel2011-09-083-28/+25
| | | | | | trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. llvm-svn: 139330
* Revert r139247 "Cache intermediate results during traceSiblingValue."Jakob Stoklund Olesen2011-09-071-221/+82
| | | | | | It broke the self host and clang-x86_64-darwin10-RA. llvm-svn: 139259
* Cache intermediate results during traceSiblingValue.Jakob Stoklund Olesen2011-09-071-82/+221
| | | | | | | | | | | | | | In some cases such as interpreters using indirectbr, the CFG can be very complicated, and live range splitting may be forced to insert a large number of phi-defs. When that happens, traceSiblingValue can spend a lot of time zipping around in the CFG looking for defs and reloads. This patch causes more information to be cached in SibValues, and the cached values are used to terminate searches early. This speeds up spilling by 20x in one interpreter test case. For more typical code, this is just a 10% speedup of spilling. llvm-svn: 139247
* Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= ↵James Molloy2011-09-071-2/+2
| | | | | | handling to llvm-mc. Reviewed by Owen Anderson. llvm-svn: 139237
* Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs ↵Eli Friedman2011-09-071-2/+17
| | | | | | | | failures for atomic laod/store on ARM. (The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) llvm-svn: 139221
* While sinking machine instructions, sink matching DBG_VALUEs also otherwise ↵Devang Patel2011-09-071-0/+31
| | | | | | live debug variable pass will drop DBG_VALUEs on the floor. llvm-svn: 139208
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-0610-82/+123
| | | | | | | | | | | | with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. llvm-svn: 139159
* Split the init.trampoline intrinsic, which currently combines GCC'sDuncan Sands2011-09-063-7/+12
| | | | | | | | | | | | | | | | | | | | init.trampoline and adjust.trampoline intrinsics, into two intrinsics like in GCC. While having one combined intrinsic is tempting, it is not natural because typically the trampoline initialization needs to be done in one function, and the result of adjust trampoline is needed in a different (nested) function. To get around this llvm-gcc hacks the nested function lowering code to insert an additional parent variable holding the adjust.trampoline result that can be accessed from the child function. Dragonegg doesn't have the luxury of tweaking GCC code, so it stored the result of adjust.trampoline in the memory GCC set aside for the trampoline itself (this is always available in the child function), and set up some new memory (using an alloca) to hold the trampoline. Unfortunately this breaks Go which allocates trampoline memory on the heap and wants to use it even after the parent has exited (!). Rather than doing even more hacks to get Go working, it seemed best to just use two intrinsics like in GCC. Patch mostly by Sanjoy Das. llvm-svn: 139140
* Fix a truly heinous bug in DAGCombine related to AssertZext.Owen Anderson2011-09-031-7/+6
| | | | | | | If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert. The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users. No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem. Fixes <rdar://problem/10063365>. llvm-svn: 139059
* Simplify by using isFullCopy().Jakob Stoklund Olesen2011-09-021-3/+1
| | | | llvm-svn: 139019
* Darwin wants ctors/dtors to be ordered the other way round to linux.Duncan Sands2011-09-021-1/+10
| | | | llvm-svn: 139015
* Revert r131152, r129796, r129761. This code is currently consideredDan Gohman2011-09-011-52/+43
| | | | | | | | to be unreliable on platforms which require memcpy calls, and it is complicating broader legalize cleanups. It is hoped that these cleanups will make memcpy byval easier to implement in the future. llvm-svn: 138977
* Don't drop alignment info on local common symbols.Benjamin Kramer2011-09-011-5/+5
| | | | | | | | | | | - On COFF the .lcomm directive has an alignment argument. - On ELF we fall back to .local + .comm Based on a patch by NAKAMURA Takumi. Fixes PR9337, PR9483 and PR10128. llvm-svn: 138976
* Permit remat of partial register defs when it is safe.Jakob Stoklund Olesen2011-09-011-5/+10
| | | | | | | | | | | | | | | | | An instruction may define part of a register where the other bits are undefined. In that case, it is safe to rematerialize the instruction. For example: %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def> The extra <imp-def> operand indicates that the instruction does not read the other parts of the virtual register, so a remat is safe. This patch simply allows multiple def operands for the virtual register. It is MI->readsVirtualRegister() that determines if we depend on a previous value so remat is impossible. llvm-svn: 138953
* Revert r138794, "Do not try to rematerialize a value from a partial definition."Jakob Stoklund Olesen2011-09-011-22/+1
| | | | | | | | | The problem is fixed for all register allocators by r138944, so this patch is no longer necessary. <rdar://problem/10032939> llvm-svn: 138945
* Prevent remat of partial register redefinitions.Jakob Stoklund Olesen2011-09-011-0/+9
| | | | | | | | | | | | | An instruction that redefines only part of a larger register can never be rematerialized since the virtual register value depends on the old value in other parts of the register. This was fixed for the inline spiller in r138794. This patch fixes the problem for all register allocators, and includes a small test case. <rdar://problem/10032939> llvm-svn: 138944
* Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. ↵Evan Cheng2011-09-011-27/+40
| | | | | | Sorry, I can't come up with a small test case. rdar://10043690 llvm-svn: 138934
* PreRA scheduler should avoid cloning compares.Andrew Trick2011-09-011-1/+35
| | | | | | | | | Added canClobberReachingPhysRegUse() to handle a particular pattern in which a two-address instruction could be forced to interfere with EFLAGS, causing a compare to be unnecessarilly cloned. Fixes rdar://problem/5875261 llvm-svn: 138924
* Fix Size TypingDavid Greene2011-08-311-1/+1
| | | | | | Stores sizes as uint64_t to avoid possible truncation. llvm-svn: 138901
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