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* Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson2012-08-132-0/+60
| | | | | | various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. llvm-svn: 161807
* Transfer weights in transferSuccessorsAndUpdatePHIs().Jakob Stoklund Olesen2012-08-131-5/+7
| | | | llvm-svn: 161805
* Print out MachineBasicBlock successor weights when available.Jakob Stoklund Olesen2012-08-131-1/+4
| | | | llvm-svn: 161804
* Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen2012-08-131-11/+0
| | | | | | | | | | | | | | | It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. llvm-svn: 161794
* Whitespace cleanup.Bill Wendling2012-08-131-7/+7
| | | | llvm-svn: 161788
* Count triangles and diamonds in early if-conversion.Jakob Stoklund Olesen2012-08-131-0/+16
| | | | llvm-svn: 161783
* Delete dead typedef.Jakob Stoklund Olesen2012-08-131-2/+0
| | | | llvm-svn: 161782
* Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen2012-08-131-20/+67
| | | | | | | | It is still possible to if-convert if the tail block has extra predecessors, but the tail phis must be rewritten instead of being removed. llvm-svn: 161781
* MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps ↵Benjamin Kramer2012-08-111-4/+3
| | | | | | already. llvm-svn: 161729
* PR13578: Teach MachineCSE that instructions that use a constant register can ↵Benjamin Kramer2012-08-111-2/+5
| | | | | | | | be CSE'd safely. This is common e.g. when doing rip-relative addressing on x86_64. llvm-svn: 161728
* Add a proper if-conversion cost model.Jakob Stoklund Olesen2012-08-101-13/+77
| | | | | | | | | | | | | | Detect when there is not enough available ILP, so if-conversion can't speculate instructions for free. Compute the lengthening of the critical path when inserting a select instruction that depends on the condition as well as both sides of the if. Reject conversions that would stretch the critical path by more than half a mispredict penalty. llvm-svn: 161713
* Give MachineTraceMetrics its own debug tag.Jakob Stoklund Olesen2012-08-101-1/+1
| | | | llvm-svn: 161712
* Add more trace query functions.Jakob Stoklund Olesen2012-08-102-0/+42
| | | | | | | | | | | Trace::getResourceLength() computes the number of cycles required to execute the trace when ignoring data dependencies. The number can be compared to the critical path to estimate the trace ILP. Trace::getPHIDepth() computes the data dependency depth of a PHI in a trace successor that isn't necessarily part of the trace. llvm-svn: 161711
* Add getTPred() and getFPred() functions.Jakob Stoklund Olesen2012-08-101-2/+8
| | | | | | They identify the PHI predecessors in both diamonds and triangles. llvm-svn: 161689
* Include loop-carried dependencies when computing instr heights.Jakob Stoklund Olesen2012-08-101-6/+18
| | | | | | | | | When a trace ends with a back-edge, include PHIs in the loop header in the height computations. This makes the critical path through a loop more accurate by including the latencies of the last instructions in the loop. llvm-svn: 161688
* Update edge weights correctly in replaceSuccessor().Jakob Stoklund Olesen2012-08-101-9/+33
| | | | | | | | When replacing Old with New, it can happen that New is already a successor. Add the old and new edge weights instead of creating a duplicate edge. llvm-svn: 161653
* Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen2012-08-101-45/+47
| | | | | | | No changes to these patches, MRI needed to be notified when changing uses into defs and vice versa. llvm-svn: 161644
* Also update MRI use lists when changing a use to a def and vice versa.Jakob Stoklund Olesen2012-08-101-19/+38
| | | | | | This was the cause of the buildbot failures. llvm-svn: 161643
* Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen2012-08-091-47/+45
| | | | | | These commits broke a number of buildbots. llvm-svn: 161640
* Partition use lists so defs always come before uses.Jakob Stoklund Olesen2012-08-091-3/+11
| | | | | | | | | | | | | | | | This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). llvm-svn: 161634
* Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen2012-08-091-45/+39
| | | | | | | | | | | Use a more conventional doubly linked list where the Prev pointers form a cycle. This means it is no longer necessary to adjust the Prev pointers when reallocating the VRegInfo array. The test changes are required because the register allocation hint is using the use-list order to break ties. llvm-svn: 161633
* Move use list management into MachineRegisterInfo.Jakob Stoklund Olesen2012-08-093-77/+70
| | | | | | | | | | | | | | Register MachineOperands are kept in linked lists accessible via MRI's reg_iterator interfaces. The linked list management was handled partly by MachineOperand methods, partly by MRI methods. Move all of the list management into MRI, delete MO::AddRegOperandToRegInfo() and MO::RemoveRegOperandFromRegInfo(). Be more explicit about handling the cases where an MRI pointer isn't available. llvm-svn: 161632
* Fix a future TwoAddressInstructionPass crash.Jakob Stoklund Olesen2012-08-091-1/+2
| | | | | | | No test case, the crash only happens when the default use list order is changed. llvm-svn: 161627
* Fix the legalization of ExtLoad on ARM. ExpandUnalignedLoad did not properly Nadav Rotem2012-08-091-3/+4
| | | | | | | handle the cases where the memory value type was illegal. PR 13111. llvm-svn: 161565
* Don't use getNextOperandForReg() in RAFast.Jakob Stoklund Olesen2012-08-081-8/+4
| | | | | | That particular optimization was probably premature anyway. llvm-svn: 161541
* Deal with irreducible control flow when building traces.Jakob Stoklund Olesen2012-08-081-17/+22
| | | | | | | | | | | We filter out MachineLoop back-edges during the trace-building PO traversals, but it is possible to have CFG cycles that aren't natural loops, and MachineLoopInfo doesn't include such cycles. Use a standard visited set to detect such CFG cycles, and completely ignore them when picking traces. llvm-svn: 161532
* Heed -stress-early-ifcvt.Jakob Stoklund Olesen2012-08-081-0/+4
| | | | llvm-svn: 161513
* Get the MispredictPenalty from MCSchedModel.Jakob Stoklund Olesen2012-08-081-5/+6
| | | | | | Thanks, Andy! llvm-svn: 161507
* Minor cleanup of defaultDefLatency APIAndrew Trick2012-08-081-6/+8
| | | | llvm-svn: 161470
* Revert "Fix a quadratic algorithm in MachineBranchProbabilityInfo."Jakob Stoklund Olesen2012-08-082-16/+9
| | | | | | It caused an assertion failure when compiling consumer-typeset. llvm-svn: 161463
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-2/+18
| | | | | | | | | | | | | | We perform the following: 1> Use SUB instead of CMP for i8,i16,i32 and i64 in ISel lowering. 2> Modify MachineCSE to correctly handle implicit defs. 3> Convert SUB back to CMP if possible at peephole. Removed pattern matching of (a>b) ? (a-b):0 and like, since they are handled by peephole now. rdar://11873276 llvm-svn: 161462
* Fix a quadratic algorithm in MachineBranchProbabilityInfo.Jakob Stoklund Olesen2012-08-082-9/+16
| | | | | | | | The getSumForBlock function was quadratic in the number of successors because getSuccWeight would perform a linear search for an already known iterator. llvm-svn: 161460
* Skip tied operand pairs that already have the same register.Jakob Stoklund Olesen2012-08-071-10/+11
| | | | llvm-svn: 161454
* Add SelectionDAG::getTargetIndex.Jakob Stoklund Olesen2012-08-074-0/+35
| | | | | | | This adds support for TargetIndex operands during isel. The meaning of these (index, offset, flags) operands is entirely defined by the target. llvm-svn: 161453
* For non-Darwin platforms, we want to generate stack protectors only forBill Wendling2012-08-071-1/+10
| | | | | | | character arrays. This is in line with what GCC does. <rdar://problem/10529227> llvm-svn: 161446
* Add a new kind of MachineOperand: MO_TargetIndex.Jakob Stoklund Olesen2012-08-071-0/+7
| | | | | | | | | | | | A target index operand looks a lot like a constant pool reference, but it is completely target-defined. It contains the 8-bit TargetFlags, a 32-bit index, and a 64-bit offset. It is preserved by all code generator passes. TargetIndex operands can be used to carry target-specific information in cases where immediate operands won't suffice. llvm-svn: 161441
* Fix a couple of typos.Jakob Stoklund Olesen2012-08-072-2/+2
| | | | llvm-svn: 161437
* Add trace accessor methods, implement primitive if-conversion heuristic.Jakob Stoklund Olesen2012-08-073-15/+78
| | | | | | | | Compare the critical paths of the two traces through an if-conversion candidate. If the difference is larger than the branch brediction penalty, reject the if-conversion. If would never pay. llvm-svn: 161433
* Add a much more conservative strategy for aligning branch targets.Chandler Carruth2012-08-071-15/+49
| | | | | | | | | | | | | Previously, MBP essentially aligned every branch target it could. This bloats code quite a bit, especially non-looping code which has no real reason to prefer aligned branch targets so heavily. As Andy said in review, it's still a bit odd to do this without a real cost model, but this at least has much more plausible heuristics. Fixes PR13265. llvm-svn: 161409
* MachineCSE: Update the heuristics for isProfitableToCSE.Manman Ren2012-08-071-0/+23
| | | | | | | | | If the result of a common subexpression is used at all uses of the candidate expression, CSE should not increase the live range of the common subexpression. rdar://11393714 and rdar://11819721 llvm-svn: 161396
* Delete a dead variable.Jakob Stoklund Olesen2012-08-041-12/+0
| | | | | | TwoAddressInstructionPass doesn't remat any more. llvm-svn: 161285
* TwoAddressInstructionPass refactoring: Extract another method.Jakob Stoklund Olesen2012-08-031-121/+134
| | | | llvm-svn: 161284
* Refactor and check "onlyReadsMemory" before optimizing builtins.Bob Wilson2012-08-032-83/+30
| | | | | | | | | This patch is mostly just refactoring a bunch of copy-and-pasted code, but it also adds a check that the call instructions are readnone or readonly. That check was already present for sin, cos, sqrt, log2, and exp2 calls, but it was missing for the rest of the builtins being handled in this code. llvm-svn: 161282
* TwoAddressInstructionPass refactoring: Extract a method.Jakob Stoklund Olesen2012-08-031-48/+60
| | | | | | | No functional change intended, except replacing a DenseMap with a SmallDenseMap which should behave identically. llvm-svn: 161281
* Begin adding support for updating LiveIntervals in TwoAddressInstructionPass.Jakob Stoklund Olesen2012-08-031-0/+23
| | | | | | | This is far from complete, and only changes behavior when the -early-live-intervals flag is passed to llc. llvm-svn: 161273
* Add an experimental -early-live-intervals option.Jakob Stoklund Olesen2012-08-032-0/+10
| | | | | | | | | | This option runs LiveIntervals before TwoAddressInstructionPass which will eventually learn to exploit and update the analysis. Eventually, LiveIntervals will run before PHIElimination, and we can get rid of LiveVariables. llvm-svn: 161270
* Delete merged physreg copies in joinReservedPhysReg().Jakob Stoklund Olesen2012-08-031-0/+5
| | | | | | | Previously, the identity copy would survive through register allocation before it was removed by the rewriter. llvm-svn: 161269
* Try to reduce the compile time impact of r161232.Bob Wilson2012-08-032-43/+59
| | | | | | | | | | | | The previous change caused fast isel to not attempt handling any calls to builtin functions. That included things like "printf" and caused some noticable regressions in compile time. I wanted to avoid having fast isel keep a separate list of functions that had to be kept in sync with what the code in SelectionDAGBuilder.cpp was handling. I've resolved that here by moving the list into TargetLibraryInfo. This is somewhat redundant in SelectionDAGBuilder but it will ensure that we keep things consistent. llvm-svn: 161263
* Fix memcmp code-gen to honor -fno-builtin.Bob Wilson2012-08-031-1/+1
| | | | | | | | | I noticed that SelectionDAGBuilder::visitCall was missing a check for memcmp in TargetLibraryInfo, so that it would use custom code for memcmp calls even with -fno-builtin. I also had to add a new -disable-simplify-libcalls option to llc so that I could write a test for this. llvm-svn: 161262
* Completely eliminate VNInfo flags.Jakob Stoklund Olesen2012-08-032-5/+2
| | | | | | | | The 'unused' state of a value number can be represented as an invalid def SlotIndex. This also exposed code that shouldn't have been looking at unused value VNInfos. llvm-svn: 161258
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