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llvm-svn: 163974
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Kill flags are removed more and more aggressively during the register
allocation passes, it is better to get information from LiveIntervals.
llvm-svn: 163972
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llvm-svn: 163934
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llvm-svn: 163915
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llvm-svn: 163882
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umulo legalization.
Fixes PR13839
llvm-svn: 163856
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closer to where they're needed.
llvm-svn: 163855
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- Find a legal vector type before casting and extracting element from it.
- As the new vector type may have more than 2 elements, build the final
hi/lo pair by BFS pairing them from bottom to top.
llvm-svn: 163830
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bugs in user code or in the compiler. Also, dont assert if the protection is not enabled.
llvm-svn: 163807
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bitcast of fneg to integers
by xoring the high-bit. This fails if the source operand is a vector because we need to negate
each of the elements in the vector.
Fix rdar://12281066 PR13813.
llvm-svn: 163802
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llvm-svn: 163801
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are within the lifetime zone. Sometime legitimate usages of allocas are
hoisted outside of the lifetime zone. For example, GEPS may calculate the
address of a member of an allocated struct. This commit makes sure that
we only check (abort regions or assert) for instructions that read and write
memory using stack frames directly. Notice that by allowing legitimate
usages outside the lifetime zone we also stop checking for instructions
which use derivatives of allocas. We will catch less bugs in user code
and in the compiler itself.
llvm-svn: 163791
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Add some support for dealing with an object pointer on arguments.
Part of rdar://9797999
which now supports adding the object pointer attribute to the
subprogram as it should.
llvm-svn: 163754
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- BlockAddress has no support of BA + offset form and there is no way to
propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
support BA + offset addressing.
llvm-svn: 163743
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already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG.
llvm-svn: 163736
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llvm-svn: 163735
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This should be done on the subprogram, not the variable itself.
llvm-svn: 163734
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llvm-svn: 163721
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behaviour (converting NaN values between float and double).
SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget);
should not be used when Val is not a simple constant (as the comment in
SelectionDAG.h indicates). This patch avoids using this function
when folding an unknown constant through a bitcast, where it cannot be
guaranteed that Val will be a simple constant.
llvm-svn: 163703
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lifetime regions. This is useful for debugging. No testcase because without this check we fail on assertions when finding escaped allocas.
llvm-svn: 163702
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analyzePhysReg() from r163694 to heuristically try and determine the liveness state of a physical register upon arrival at a particular instruction in a block.
The search for liveness is clipped to a specific number of instructions around the target MachineInstr, in order to avoid degenerating into an O(N^2) algorithm. It tries to use various clues about how instructions around (both before and after) a given MachineInstr use that register, to determine its state at the MachineInstr.
llvm-svn: 163695
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an instruction's use of a physical register, analogous to analyzeVirtReg.
Rename RegInfo to VirtRegInfo so as not to be confused with the new PhysRegInfo.
llvm-svn: 163694
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dragonegg self-hosting.
llvm-svn: 163687
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findLastUseBefore was previous considering virtreg liveness only, leading to
incorrect live intervals for reg units when instrs with physreg operands were
moved up.
llvm-svn: 163685
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The input program may contain intructions which are not inside lifetime
markers. This can happen due to a bug in the compiler or due to a bug in
user code (for example, returning a reference to a local variable).
This commit adds checks that all of the instructions in the function and
invalidates lifetime ranges which do not contain all of the instructions.
llvm-svn: 163678
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Part of rdar://9797999
llvm-svn: 163667
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"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"
No functional change. Update r163339.
llvm-svn: 163653
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Add support in the EmitMSInlineAsmStr() function for handling integer consts.
llvm-svn: 163645
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of lifetime markers. Disabling the pass for now.
llvm-svn: 163623
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llvm-svn: 163617
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llvm-svn: 163616
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Factor similar code out of FNEG DAG combiner.
llvm-svn: 163587
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The Hexagon target decided to use a lot of functionality from the
target-independent scheduler. That's fine, and other targets should be
able to do the same. This reorg and API update makes that easy.
For the record, ScheduleDAGMI was not meant to be subclassed. Instead,
new scheduling algorithms should be able to implement
MachineSchedStrategy and be done. But if need be, it's nice to be
able to extend ScheduleDAGMI, so I also made that easier. The target
scheduler is somewhat more apt to break that way though.
llvm-svn: 163580
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right now. We'll fix PR13303 a different way.
llvm-svn: 163570
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llvm-svn: 163569
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llvm-svn: 163568
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llvm-svn: 163567
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and InlineAsmVariant don't match.
llvm-svn: 163550
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llvm-svn: 163547
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llvm-svn: 163545
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and update the printOperand() function accordingly.
llvm-svn: 163544
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llvm-svn: 163539
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properly.
llvm-svn: 163530
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This folding happens as early as possible for performance reasons, and to make sure it isn't foiled by other transforms (e.g. forming FMAs).
llvm-svn: 163519
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llvm-svn: 163518
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concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types.
llvm-svn: 163511
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llvm-svn: 163510
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llvm-svn: 163509
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intervals twice or to theirself.
llvm-svn: 163508
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single basic block.
llvm-svn: 163507
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