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* Move parts of lib/Target that use CodeGen into lib/CodeGen.Nick Lewycky2011-12-154-0/+129
| | | | llvm-svn: 146702
* Update DebugLoc while merging nodes at -O0.Devang Patel2011-12-152-6/+21
| | | | | | Patch by Kyriakos Georgiou! llvm-svn: 146670
* Don't try to form FGETSIGN after legalization; it is possible in some cases, ↵Eli Friedman2011-12-151-1/+2
| | | | | | but the existing code can't do it correctly. PR11570. llvm-svn: 146630
* Enable synthesis of FLOG2 and FEXP2 SelectionDAG nodes from libm calls. ↵Owen Anderson2011-12-151-0/+22
| | | | | | These are already marked as illegal by default. llvm-svn: 146623
* Move Instruction::isSafeToSpeculativelyExecute out of VMCore andDan Gohman2011-12-141-2/+3
| | | | | | | | | into Analysis as a standalone function, since there's no need for it to be in VMCore. Also, update it to use isKnownNonZero and other goodies available in Analysis, making it more precise, enabling more aggressive optimization. llvm-svn: 146610
* Do not sink instruction, if it is not profitable.Devang Patel2011-12-141-13/+76
| | | | | | | | On ARM, peephole optimization for ABS creates a trivial cfg triangle which tempts machine sink to sink instructions in code which is really straight line code. Sometimes this sinking may alter register allocator input such that use and def of a reg is divided by a branch in between, which may result in extra spills. Now mahine sink avoids sinking if final sink destination is post dominator. Radar 10266272. llvm-svn: 146604
* Reapply r146481 with a fix to create the Builder value in the correct place andBill Wendling2011-12-141-6/+35
| | | | | | | with the correct iterator. <rdar://problem/10530851> llvm-svn: 146600
* Model ARM predicated write as read-mod-write. e.g.Evan Cheng2011-12-141-2/+2
| | | | | | | | | | | r0 = mov #0 r0 = moveq #1 Then the second instruction has an implicit data dependency on the first instruction. Sadly I have yet to come up with a small test case that demonstrate the post-ra scheduler taking advantage of this. llvm-svn: 146583
* llvm/lib/CodeGen: Fix cmake build since r146542.NAKAMURA Takumi2011-12-141-0/+1
| | | | llvm-svn: 146550
* Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow.Eli Friedman2011-12-141-0/+5
| | | | llvm-svn: 146548
* Allow target to specify register output dependency. Still default to one.Evan Cheng2011-12-141-1/+7
| | | | llvm-svn: 146547
* Revert r146481 to review possible miscompilations.Bill Wendling2011-12-141-33/+6
| | | | llvm-svn: 146546
* - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng2011-12-148-51/+297
| | | | | | | | | | to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. llvm-svn: 146542
* DW_AT_virtuality is also defined to be constant, not flag.Nick Lewycky2011-12-141-2/+2
| | | | llvm-svn: 146534
* [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle Chad Rosier2011-12-131-103/+0
| | | | | | instructions that define aggregate types. llvm-svn: 146492
* Avoid using the 'insertvalue' instruction here.Bill Wendling2011-12-131-6/+33
| | | | | | | | | Fast ISel isn't able to handle 'insertvalue' and it causes a large slowdown during -O0 compilation. We don't necessarily need to generate an aggregate of the values here if they're just going to be extracted directly afterwards. <rdar://problem/10530851> llvm-svn: 146481
* DW_AT_accessibility is "constant" class, not form class, so it may not useNick Lewycky2011-12-131-6/+6
| | | | | | DW_FORM_flag. Use DW_FORM_data1 for one byte. llvm-svn: 146475
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-137-23/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | undefined result. This adds new ISD nodes for the new semantics, selecting them when the LLVM intrinsic indicates that the undef behavior is desired. The new nodes expand trivially to the old nodes, so targets don't actually need to do anything to support these new nodes besides indicating that they should be expanded. I've done this for all the operand types that I could figure out for all the targets. Owners of various targets, please review and let me know if any of these are incorrect. Note that the expand behavior is *conservatively correct*, and exactly matches LLVM's current behavior with these operations. Ideally this patch will not change behavior in any way. For example the regtest suite finds the exact same instruction sequences coming out of the code generator. That's why there are no new tests here -- all of this is being exercised by the existing test suite. Thanks to Duncan Sands for reviewing the various bits of this patch and helping me get the wrinkles ironed out with expanding for each target. Also thanks to Chris for clarifying through all the discussions that this is indeed the approach he was looking for. That said, there are likely still rough spots. Further review much appreciated. llvm-svn: 146466
* [fast-isel] Guard "exhastive" fast-isel output with -fast-isel-verbose2.Chad Rosier2011-12-131-1/+6
| | | | llvm-svn: 146453
* LLVMBuild: Introduce a common section which currently has a list of theDaniel Dunbar2011-12-121-0/+3
| | | | | | | | | | | subdirectories to traverse into. - Originally I wanted to avoid this and just autoscan, but this has one key flaw in that new subdirectories can not automatically trigger a rerun of the llvm-build tool. This is particularly a pain when switching back and forth between trees where one has added a subdirectory, as the dependencies will tend to be wrong. This will also eliminates FIXME implicitly. llvm-svn: 146436
* Fixed register allocator splitting a live range on a spilling variable.Pete Cooper2011-12-123-4/+25
| | | | | | | | If we create new intervals for a variable that is being spilled, then those new intervals are not guaranteed to also spill. This means that anything reading from the original spilling value might not get the correct value if spills were missed. Fixes <rdar://problem/10546864> llvm-svn: 146428
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-123-3/+0
| | | | llvm-svn: 146409
* [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. ↵Chad Rosier2011-12-101-0/+1
| | | | | | Disable while I investigate. llvm-svn: 146331
* Typo.Chad Rosier2011-12-101-1/+1
| | | | llvm-svn: 146327
* [fast-isel] Add support for selecting insertvalue.Chad Rosier2011-12-091-0/+102
| | | | | | rdar://10530851 llvm-svn: 146276
* Move isUnpredicatedTerminator() default implementation to ↵Evan Cheng2011-12-091-0/+13
| | | | | | TargetInstrInfoImpl to break Target's dependency on CodeGen. llvm-svn: 146247
* Fix comment.Devang Patel2011-12-091-2/+1
| | | | llvm-svn: 146226
* Update stale comment.Devang Patel2011-12-091-4/+1
| | | | llvm-svn: 146220
* Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.Eli Friedman2011-12-091-4/+3
| | | | llvm-svn: 146219
* Revert r146184. I am seeing performance regression cause by this patch in ↵Devang Patel2011-12-081-10/+11
| | | | | | one test case. llvm-svn: 146205
* Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter ↵Owen Anderson2011-12-083-15/+43
| | | | | | can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed. llvm-svn: 146193
* Refactor. No intentional functionality change.Devang Patel2011-12-081-29/+41
| | | | llvm-svn: 146187
* Add rather verbose stats for fast-isel failures.Chad Rosier2011-12-081-0/+153
| | | | llvm-svn: 146186
* Filter "sink to" candidate blocks sooner. This avoids unnecessary ↵Devang Patel2011-12-081-11/+13
| | | | | | computation to determine whether the block dominates all uses or not. llvm-svn: 146184
* Teach SelectionDAG to match more calls to libm functions onto existing ↵Owen Anderson2011-12-082-10/+67
| | | | | | SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise. llvm-svn: 146171
* Make MachineInstr instruction property queries more flexible. This change allEvan Cheng2011-12-081-5/+5
| | | | | | | | clients to decide whether to look inside bundled instructions and whether the query should return true if any / all bundled instructions have the queried property. llvm-svn: 146168
* Fix a bug in the integer-promotion of bitcast operations on vector types.Nadav Rotem2011-12-081-1/+1
| | | | | | | We must not issue a bitcast operation for integer-promotion of vector types, because the location of the values in the vector may be different. llvm-svn: 146150
* Reverting r145899 as it breaks clang self-hostingPete Cooper2011-12-081-0/+66
| | | | llvm-svn: 146136
* Make sure we correctly set LiveRegGens when a call is unscheduled. ↵Eli Friedman2011-12-071-1/+8
| | | | | | <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling. llvm-svn: 146087
* Fix an assertion in the scheduler. PR11386. No testcase included because ↵Eli Friedman2011-12-071-3/+2
| | | | | | it's rather delicate. llvm-svn: 146083
* These global variables aren't thread-safe, STATISTIC is. Andy Trick tells meNick Lewycky2011-12-071-66/+12
| | | | | | that he isn't using these any more, so just delete them. llvm-svn: 146076
* Remove unneeded semicolon.Jakub Staszak2011-12-071-3/+3
| | | | | | Skip two looking up at BlockChain. llvm-svn: 146053
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-0735-148/+152
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Zap unnecessary isIntDivCheap() check. PR11485. No testcase because this ↵Eli Friedman2011-12-071-1/+1
| | | | | | doesn't affect any in-tree target. llvm-svn: 146015
* Add missing check.Jakob Stoklund Olesen2011-12-071-1/+1
| | | | llvm-svn: 146004
* Support vector bitcasts in the AsmPrinter. PR11495.Eli Friedman2011-12-071-2/+24
| | | | llvm-svn: 146001
* Add MachineOperand IsInternalRead flag.Jakob Stoklund Olesen2011-12-071-5/+18
| | | | | | | This flag is used when bundling machine instructions. It indicates whether the operand reads a value defined inside or outside its bundle. llvm-svn: 145997
* Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves ↵Eli Friedman2011-12-071-13/+17
| | | | | | correctly. PR11494. llvm-svn: 145996
* Remove unneeded type.Jakub Staszak2011-12-071-2/+0
| | | | llvm-svn: 145995
* - Remove unneeded #includes.Jakub Staszak2011-12-061-25/+4
| | | | | | | - Remove unused types/fields. - Add some constantness. llvm-svn: 145993
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