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* Update some globals to use ManagedStatic.Lang Hames2009-11-071-2/+4
| | | | llvm-svn: 86342
* Fix memoizing of CvtRndSatSDNodeMon P Wang2009-11-071-1/+2
| | | | llvm-svn: 86340
* - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdenticalEvan Cheng2009-11-072-35/+55
| | | | | | | | | | except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. llvm-svn: 86328
* Add code to check at SelectionDAGISel::LowerArguments time to see if return ↵Kenneth Uildriks2009-11-072-0/+75
| | | | | | values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers llvm-svn: 86324
* Fix inverted conflict test in -early-coalesce.Jakob Stoklund Olesen2009-11-071-14/+15
| | | | | | | | | | A non-identity copy cannot be coalesced when the phi join destination register is live at the copy site. Also verify the condition that the PHI join source register is only used in the PHI join. Otherwise the coalescing is invalid. llvm-svn: 86322
* Fix comment typos.Bob Wilson2009-11-061-3/+3
| | | | llvm-svn: 86295
* Use WriteAsOperand to print GlobalAddress MachineOperands. ThisDan Gohman2009-11-061-1/+2
| | | | | | prints them with the leading '@'. llvm-svn: 86261
* Do not bother to emit debug info for nameless global variable.Devang Patel2009-11-061-2/+2
| | | | llvm-svn: 86259
* Do not try to emit debug info entry for dead global variable.Devang Patel2009-11-061-1/+6
| | | | llvm-svn: 86212
* Factor out the printing of the leading tab into printInlineAsm.Dan Gohman2009-11-061-0/+2
| | | | llvm-svn: 86199
* Fix the label name generation for address-taken labels to avoid potentialDan Gohman2009-11-051-6/+10
| | | | | | problems with name collisions. llvm-svn: 86189
* Added support for renumbering existing index list elements. Removed some ↵Lang Hames2009-11-051-25/+31
| | | | | | junk from the initial numbering code in runOnMachineFunction. llvm-svn: 86184
* Fix bug in aggressive antidep breaking; liveness was not updated correctly ↵David Goodwin2009-11-051-10/+7
| | | | | | for regions that do not have antidep candidates. llvm-svn: 86172
* Avoid printing a redundant space in SDNode->dump().Dan Gohman2009-11-051-2/+1
| | | | llvm-svn: 86151
* Replace std::map.at() with std::map[].David Goodwin2009-11-051-1/+1
| | | | llvm-svn: 86102
* Break anti-dependencies using free registers in a round-robin manner to ↵David Goodwin2009-11-053-18/+49
| | | | | | avoid introducing new anti-dependencies. llvm-svn: 86098
* Now that code placement optimization pass is run for JIT, make sure it's ↵Evan Cheng2009-11-051-3/+3
| | | | | | before pre-emit passes. llvm-svn: 86092
* Code refactoring.Evan Cheng2009-11-051-49/+58
| | | | llvm-svn: 86085
* Correctly add chain dependencies around calls and unknown-side-effect ↵David Goodwin2009-11-051-2/+3
| | | | | | instructions. llvm-svn: 86080
* While calculating original type size for a derived type, handle type ↵Devang Patel2009-11-041-3/+1
| | | | | | | | variants encoded as DIDerivedType appropriately. This improves bitfield support. llvm-svn: 86073
* Fix DW_AT_data_member_location for bit-fields. It points to the location of ↵Devang Patel2009-11-041-5/+12
| | | | | | annonymous field that covers respective field. llvm-svn: 86054
* Handle empty/tombstone keys for LiveIndex more cleanly. Check for index ↵Lang Hames2009-11-041-2/+2
| | | | | | sanity when constructing index list entries. llvm-svn: 86049
* Add some options to disable various code gen optimizations.Eric Christopher2009-11-041-8/+26
| | | | llvm-svn: 86044
* Array element size does not match array size but array is not a bitfield. Devang Patel2009-11-041-1/+3
| | | | llvm-svn: 86043
* Print out an informative comment for KILL instructions.Jakob Stoklund Olesen2009-11-041-0/+11
| | | | | | | | The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output. With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF. llvm-svn: 86041
* RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,Evan Cheng2009-11-041-6/+22
| | | | | | | | and extract_subreg as a "copy" that defines a valno. Also fixes a typo. These two issues prevent a simple subreg coalescing from happening before. llvm-svn: 86022
* Fix CMake makefilesDouglas Gregor2009-11-041-0/+2
| | | | llvm-svn: 85994
* The Indexes Patch.Lang Hames2009-11-0315-965/+919
| | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
* Fix branch folding bug for indirect branches: for a block containing onlyBob Wilson2009-11-031-1/+2
| | | | | | | | | | | | | | | an unconditional branch (possibly from tail merging), this code is trying to redirect all of its predecessors to go directly to the branch target, but that isn't feasible for indirect branches. The other predecessors (that don't end with indirect branches) could theoretically still be handled, but that is not easily done right now. The AnalyzeBranch interface doesn't currently let us distinguish jump table branches from indirect branches, and this code is currently handling jump tables. To avoid punting on address-taken blocks, we would have to give up handling jump tables. That seems like a bad tradeoff. llvm-svn: 85975
* Re-apply 85799. It turns out my code isn't buggy.Evan Cheng2009-11-031-17/+46
| | | | llvm-svn: 85947
* Do a scheduling pass ignoring anti-dependencies to identify candidate ↵David Goodwin2009-11-039-61/+179
| | | | | | registers that should be renamed. llvm-svn: 85939
* <rdar://problem/7352605>. When building schedule graph use mayAlias ↵David Goodwin2009-11-031-15/+43
| | | | | | information to avoid chaining loads/stores of spill slots with non-aliased memory ops. llvm-svn: 85934
* Ignore unnamed variables.Devang Patel2009-11-031-1/+3
| | | | llvm-svn: 85909
* Fix a funky "declared with greater visibility than the type of its field"Jeffrey Yasskin2009-11-031-2/+2
| | | | | | warning from gcc by removing VISIBILITY_HIDDEN attributes. llvm-svn: 85873
* Revert 85799 for now. It might be breaking llvm-gcc driver.Evan Cheng2009-11-021-46/+17
| | | | llvm-svn: 85827
* Chain dependencies used to enforce memory order should have latency of 0 ↵David Goodwin2009-11-021-14/+23
| | | | | | (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass) llvm-svn: 85807
* Initilize the machine LICM CSE map upon the first time an instruction is ↵Evan Cheng2009-11-021-17/+46
| | | | | | | | | | hoisted to the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. llvm-svn: 85799
* Add PseudoSourceValue::mayAlias. It returns true if the object can ever ↵Evan Cheng2009-11-011-0/+17
| | | | | | alias any LLVM IR value. llvm-svn: 85762
* Fix a missing newline in the dwarf output code.Dan Gohman2009-10-311-0/+1
| | | | llvm-svn: 85684
* Make -print-machineinstrs more readable.Dan Gohman2009-10-316-66/+97
| | | | | | | | | | | | | | - Be consistent when referring to MachineBasicBlocks: BB#0. - Be consistent when referring to virtual registers: %reg1024. - Be consistent when referring to unknown physical registers: %physreg10. - Be consistent when referring to known physical registers: %RAX - Be consistent when referring to register 0: %reg0 - Be consistent when printing alignments: align=16 - Print jump table contents. - Don't print host addresses, in general. - and various other cleanups. llvm-svn: 85682
* Factor out more code into addCommonCodeGenPasses. The JIT wasn'tDan Gohman2009-10-311-32/+30
| | | | | | | | previously running CodePlacementOpt. Also print headers before each dump in -print-machineinstrs mode, so that it's clear which dump is which. llvm-svn: 85681
* Remove CodeGenLICM. It's largely obsoleted by MachineLICM's new abilityDan Gohman2009-10-311-6/+1
| | | | | | to unfold loop-invariant loads. llvm-svn: 85657
* When discarding SrcValue information, discard all of it so that codeDan Gohman2009-10-311-7/+5
| | | | | | that uses this information knows to behave conservatively. llvm-svn: 85654
* Fix 80-column violation.Dan Gohman2009-10-311-1/+2
| | | | llvm-svn: 85653
* Fix warning with gcc-4.0 and signed/unsigned.Eric Christopher2009-10-311-1/+1
| | | | llvm-svn: 85648
* Add assertion checks here to turn silent miscompiles into aborts.Dan Gohman2009-10-301-4/+8
| | | | llvm-svn: 85639
* Don't mark registers dead here when processing nodes with MVT::FlagDan Gohman2009-10-301-1/+5
| | | | | | | results. This works around a problem affecting targets which rely on MVT::Flag to handle physical register defs. llvm-svn: 85638
* Fix MachineLICM to use the correct virtual register class whenDan Gohman2009-10-301-2/+4
| | | | | | | | | | unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the opcode of the original operation without the load, not the load itself, MachineLICM needs to know the operand index in order to get the correct register class. Extend getOpcodeAfterMemoryUnfold to return this information. llvm-svn: 85622
* Stop the iterator in ValueLiveAt from potentially running off the end of the ↵Lang Hames2009-10-302-4/+7
| | | | | | interval. llvm-svn: 85599
* Don't delete blocks which have their address taken.Dan Gohman2009-10-301-2/+3
| | | | llvm-svn: 85572
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