summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* Add experimental support for register unit liveness.Jakob Stoklund Olesen2012-06-051-0/+130
| | | | | | | | | | | | | | | | Instead of computing a live interval per physreg, LiveIntervals can compute live intervals per register unit. This makes impossible the confusing situation where aliasing registers could have overlapping live intervals. It should also make fixed interferernce checking cheaper since registers have fewer register units than aliases. Live intervals for regunits are computed on demand, using MRI use-def chains and the new LiveRangeCalc class. Only regunits live in to ABI blocks are precomputed during LiveIntervals::runOnMachineFunction(). The regunit liveness computations don't depend on LiveVariables. llvm-svn: 158029
* Implement LiveRangeCalc::extendToUses() and createDeadDefs().Jakob Stoklund Olesen2012-06-053-2/+103
| | | | | | | These LiveRangeCalc methods are to be used when computing a live range from scratch. llvm-svn: 158027
* MachineInstr::eraseFromParent fix for removing bundled instrs.Andrew Trick2012-06-051-1/+2
| | | | | | Patch by Ivan Llopard. llvm-svn: 158025
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-054-99/+100
| | | | | | | Minimum latency determines per-cycle scheduling groups. Expected latency determines critical path and cost. llvm-svn: 158021
* Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-addLang Hames2012-06-051-0/+21
| | | | | | | | | | | | expression (a * b + c) that can be implemented as a fused multiply-add (fma) if the target determines that this will be more efficient. This intrinsic will be used to implement FP_CONTRACT support and an aggressive FMA formation mode. If your target has a fast FMA instruction you should override the isFMAFasterThanMulAndAdd method in TargetLowering to return true. llvm-svn: 158014
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-052-5/+5
| | | | | | | | This allows a subtarget to explicitly specify the issue width and other properties without providing pipeline stage details for every instruction. llvm-svn: 157979
* sdsched: Use the right heuristics when -mcpu is not provided and we have no ↵Andrew Trick2012-06-051-13/+12
| | | | | | | | itinerary. Use ILP heuristics for long latency instrs if no scoreboard exists. llvm-svn: 157978
* misched: Allow disabling scoreboard hazard checking for subtargets with aAndrew Trick2012-06-051-6/+12
| | | | | | | | valid itinerary but no pipeline stages. An itinerary can contain useful scheduling information without specifying pipeline stages for each instruction. llvm-svn: 157977
* misched: comments from code review.Andrew Trick2012-06-051-3/+3
| | | | llvm-svn: 157975
* Remove the last remat-related code from LiveIntervalAnalysis.Jakob Stoklund Olesen2012-06-051-95/+0
| | | | | | Rematerialization is handled by LiveRangeEdit now. llvm-svn: 157974
* Stop using LiveIntervals::isReMaterializable().Jakob Stoklund Olesen2012-06-051-9/+24
| | | | | | | | | | It is an old function that does a lot more than required by CalcSpillWeights, which was the only remaining caller. The isRematerializable() function never actually sets the isLoad argument, so don't try to compute that. llvm-svn: 157973
* Delete dead code.Jakob Stoklund Olesen2012-06-041-8/+0
| | | | llvm-svn: 157963
* Switch LiveIntervals member variable to LLVM naming standards.Jakob Stoklund Olesen2012-06-041-57/+57
| | | | | | No functional change. llvm-svn: 157957
* Pass context pointers to LiveRangeCalc::reset().Jakob Stoklund Olesen2012-06-043-55/+45
| | | | | | | Remove the same pointers from all the other LiveRangeCalc functions, simplifying the interface. llvm-svn: 157941
* Remove the "-promote-elements" flag. This flag is now enabled by default.Nadav Rotem2012-06-041-12/+1
| | | | llvm-svn: 157925
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-029-14/+14
| | | | llvm-svn: 157885
* PR1255: case ranges.Stepan Dyatkovskiy2012-06-021-3/+3
| | | | | | IntRange converted from struct to class. So main change everywhere is replacement of ".Low/High" with ".getLow/getHigh()" llvm-svn: 157884
* PR1255: case ranges.Stepan Dyatkovskiy2012-06-021-1/+1
| | | | | | IntegersSubsetGeneric, IntegersSubsetMapping: added IntTy template parameter, that allows use either APInt or IntItem. This change allows to write unittest for these classes. llvm-svn: 157880
* Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG.Akira Hatanaka2012-06-021-2/+3
| | | | | | | Check that the SDValue TargetLowering::LowerOperation returns is not null before replacing the original node with the returned node. llvm-svn: 157873
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-0130-203/+180
| | | | | | | | | | | | | No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
* Remove physreg support from adjustCopiesBackFrom and removeCopyByCommutingDef.Jakob Stoklund Olesen2012-06-011-29/+3
| | | | | | | After physreg coalescing was disabled, these functions can't do anything useful with physregs anyway. llvm-svn: 157849
* Simplify some more getAliasSet callers.Jakob Stoklund Olesen2012-06-013-27/+15
| | | | | | MCRegAliasIterator can include Reg itself in the list. llvm-svn: 157848
* Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen2012-06-015-80/+36
| | | | | | | MCRegAliasIterator can optionally visit the register itself, allowing for simpler code. llvm-svn: 157837
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-011-0/+24
| | | | | | | | | Factor out the expansion code into a function. This change is to be enabled in clang. rdar://9877866 llvm-svn: 157830
* PR1255: case ranges.Stepan Dyatkovskiy2012-06-011-1/+1
| | | | | | | IntegersSubset devided into IntegersSubsetGeneric and into IntegersSubset itself. The first has no references to ConstantInt and works with IntItem only. IntegersSubsetMapping also made generic. Here added second template parameter "IntegersSubsetTy" that allows to use on of two IntegersSubset types described below. llvm-svn: 157815
* quick fix for PR13006, will check in testcase later.Chris Lattner2012-06-011-1/+3
| | | | llvm-svn: 157813
* enhance the logic for looking through tailcalls to look through transparent ↵Chris Lattner2012-06-011-1/+21
| | | | | | | | | casts in multiple-return value scenarios, like what happens on X86-64 when returning small structs. llvm-svn: 157800
* enhance getNoopInput to know about vector<->vector bitcasts of legalChris Lattner2012-06-011-10/+38
| | | | | | | | types, as well as int<->ptr casts. This allows us to tailcall functions with some trivial casts between the call and return (i.e. because the return types disagree). llvm-svn: 157798
* rearrange some logic, no functionality change.Chris Lattner2012-06-011-24/+32
| | | | llvm-svn: 157796
* Add support for enum forward declarations.Eric Christopher2012-06-011-6/+7
| | | | | | Part of rdar://11570854 llvm-svn: 157786
* X86: replace SUB with CMP if possibleManman Ren2012-05-311-0/+1
| | | | | | | | | | | | | | | | | This patch will optimize the following movq %rdi, %rax subq %rsi, %rax cmovsq %rsi, %rdi movq %rdi, %rax to cmpq %rsi, %rdi cmovsq %rsi, %rdi movq %rdi, %rax Perform this optimization if the actual result of SUB is not used. rdar: 11540023 llvm-svn: 157755
* Prioritize smaller register classes for urgent evictions.Jakob Stoklund Olesen2012-05-301-1/+7
| | | | | | | | | | | | | | It helps compile exotic inline asm. In the test case, normal GR32 virtual registers use up eax-edx so the final GR32_ABCD live range has no registers left. Since all the live ranges were tiny, we had no way of prioritizing the smaller register class. This patch allows tiny unspillable live ranges to be evicted by tiny unspillable live ranges from a smaller register class. <rdar://problem/11542429> llvm-svn: 157715
* Switch the canonical FMA term operand order to match both the comment I ↵Owen Anderson2012-05-301-1/+1
| | | | | | wrote and the usual LLVM convention. llvm-svn: 157708
* Teach DAGCombine to canonicalize the position of a constant in the term ↵Owen Anderson2012-05-301-0/+4
| | | | | | operands of an FMA node. llvm-svn: 157707
* Remove extra space.Chad Rosier2012-05-301-1/+1
| | | | llvm-svn: 157706
* Remove some redundant tests.Jakob Stoklund Olesen2012-05-301-3/+1
| | | | | | | An empty list is not represented as a null pointer. Let TRI do its own shortcuts. llvm-svn: 157702
* Teach taildup to update livein set. rdar://11538365Evan Cheng2012-05-301-0/+25
| | | | llvm-svn: 157663
* If-converter models predicated defs as read + write. The read should be ↵Evan Cheng2012-05-301-1/+2
| | | | | | marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs. llvm-svn: 157662
* Add an insertPass API to TargetPassConfig. <rdar://problem/11498613>Bob Wilson2012-05-303-0/+49
| | | | | | | | | | Besides adding the new insertPass function, this patch uses it to enhance the existing -print-machineinstrs so that the MachineInstrs after a specific pass can be printed. Patch by Bin Zeng! llvm-svn: 157655
* Optional def can be either a def or a use (of reg0).Evan Cheng2012-05-291-1/+1
| | | | llvm-svn: 157640
* Clear the entering, exiting and internal ranges of a bundle before collectingLang Hames2012-05-291-0/+3
| | | | | | | | | | ranges for the instruction about to be bundled. This fixes a bug in an external project where an assertion was triggered due to spurious 'multiple defs' within the bundle. Patch by Ivan Llopard. Thanks Ivan! llvm-svn: 157632
* ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to ↵Stepan Dyatkovskiy2012-05-291-2/+2
| | | | | | IntegersSubsetMapping. llvm-svn: 157612
* Add llvm.fabs intrinsic.Peter Collingbourne2012-05-281-0/+5
| | | | llvm-svn: 157594
* PR1255: Case RangesStepan Dyatkovskiy2012-05-281-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Implemented IntItem - the wrapper around APInt. Why not to use APInt item directly right now? 1. It will very difficult to implement case ranges as series of small patches. We got several large and heavy patches. Each patch will about 90-120 kb. If you replace ConstantInt with APInt in SwitchInst you will need to changes at the same time all Readers,Writers and absolutely all passes that uses SwitchInst. 2. We can implement APInt pool inside and save memory space. E.g. we use several switches that works with 256 bit items (switch on signatures, or strings). We can avoid value duplicates in this case. 3. IntItem can be easyly easily replaced with APInt. 4. Currenly we can interpret IntItem both as ConstantInt and as APInt. It allows to provide SwitchInst methods that works with ConstantInt for non-updated passes. Why I need it right now? Currently I need to update SimplifyCFG pass (EqualityComparisons). I need to work with APInts directly a lot, so peaces of code ConstantInt *V = ...; if (V->getValue().ugt(AnotherV->getValue()) { ... } will look awful. Much more better this way: IntItem V = ConstantIntVal->getValue(); if (AnotherV < V) { } Of course any reviews are welcome. P.S.: I'm also going to rename ConstantRangesSet to IntegersSubset, and CRSBuilder to IntegersSubsetMapping (allows to map individual subsets of integers to the BasicBlocks). Since in future these classes will founded on APInt, it will possible to use them in more generic ways. llvm-svn: 157576
* Have getOrCreateSubprogramDIE store the DIE for a subprogramPeter Collingbourne2012-05-271-5/+5
| | | | | | | | | definition in the map before calling itself to retrieve the DIE for the declaration. Without this change, if this causes getOrCreateSubprogramDIE to be recursively called on the definition, it will create multiple DIEs for that definition. Fixes PR12831. llvm-svn: 157541
* Missed parens.Benjamin Kramer2012-05-271-1/+1
| | | | llvm-svn: 157527
* r157525 didn't work, just disable iterator checking.Benjamin Kramer2012-05-271-1/+1
| | | | | | | This is obviosly right but I don't see how to do this with proper vector iterators without building a horrible mess of workarounds. llvm-svn: 157526
* SDAGBuilder: Avoid iterator invalidation harder.Benjamin Kramer2012-05-271-1/+1
| | | | | | vector.begin()-1 is invalid too. llvm-svn: 157525
* SDAGBuilder: Don't create an invalid iterator when there is only one switch ↵Benjamin Kramer2012-05-261-2/+2
| | | | | | | | case. Found by libstdc++'s debug mode. llvm-svn: 157522
* SelectionDAGBuilder: When emitting small compare chains for switches order ↵Benjamin Kramer2012-05-261-3/+18
| | | | | | | | | | | | | | them by using edge weights. SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move the most likely condition to the front so it is checked first and the others can be skipped. This is currently not as effective as it could be because SimplifyCFG destroys profiling metadata when merging branches and switches. Merging branch weight metadata is tricky though. This code touches at most 3 cases so I didn't use a proper sorting algorithm. llvm-svn: 157521
OpenPOWER on IntegriCloud