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* Implement RAGreedy::splitAroundRegion and remove loop splitting.Jakob Stoklund Olesen2011-01-193-102/+296
| | | | | | | | | | | | | | Region splitting includes loop splitting as a subset, and it is more generic. The splitting heuristics for variables that are live in more than one block are now: 1. Try to create a region that covers multiple basic blocks. 2. Try to create a new live range for each block with multiple uses. 3. Spill. Steps 2 and 3 are similar to what the standard spiller is doing. llvm-svn: 123853
* Add RAGreedy methods for splitting live ranges around regions.Jakob Stoklund Olesen2011-01-185-1/+356
| | | | | | | | | | Analyze the live range's behavior entering and leaving basic blocks. Compute an interference pattern for each allocation candidate, and use SpillPlacement to find an optimal region where that register can be live. This code is still not enabled. llvm-svn: 123774
* Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.Jeffrey Yasskin2011-01-181-1/+0
| | | | llvm-svn: 123707
* Remove checking that prevented overlapping CALLSEQ_START/CALLSEQ_ENDStuart Hastings2011-01-181-15/+9
| | | | | | | ranges, add legalizer support for nested calls. Necessary for ARM byval support. Radar 7662569. llvm-svn: 123704
* Fix an off-by-one error in ctpop combining.Benjamin Kramer2011-01-171-1/+1
| | | | llvm-svn: 123664
* Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.Benjamin Kramer2011-01-171-0/+24
| | | | | | | | | This shaves off 4 popcounts from the hacked 186.crafty source. This is enabled even when a native popcount instruction is available. The combined code is one operation longer but it should be faster nevertheless. llvm-svn: 123621
* reapply my fix for PR8961 with a tweak to properly handleChris Lattner2011-01-161-6/+12
| | | | | | | multi-instruction sequences like calls. Many thanks to Jakob for finding a testcase. llvm-svn: 123559
* Add an assert so we don't silently miscompile ctpop for bit widths > 128.Benjamin Kramer2011-01-151-0/+4
| | | | llvm-svn: 123549
* Reimplement CTPOP legalization with the "best" algorithm fromBenjamin Kramer2011-01-151-18/+45
| | | | | | | | | | | | | http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel In a silly microbenchmark on a 65 nm core2 this is 1.5x faster than the old code in 32 bit mode and about 2x faster in 64 bit mode. It's also a lot shorter, especially when counting 64 bit population on a 32 bit target. I hope this is fast enough to replace Kernighan-style counting loops even when the input is rather sparse. llvm-svn: 123547
* Update CMake build.Ted Kremenek2011-01-141-0/+2
| | | | llvm-svn: 123491
* Delete an assignment to ThisBB which isn't needed, and tidy up someDan Gohman2011-01-141-4/+6
| | | | | | comments. llvm-svn: 123479
* Add a possibility to switch between CFI directives- and table-based frame ↵Anton Korobeynikov2011-01-145-12/+18
| | | | | | description emission. Currently all the backends use table-based stuff. llvm-svn: 123476
* Add CFI directives-based frame information emission. Not hooked yet.Anton Korobeynikov2011-01-143-0/+209
| | | | llvm-svn: 123474
* Split stuff as a preparation for CFI directives-based frame information emissionAnton Korobeynikov2011-01-144-356/+440
| | | | llvm-svn: 123473
* Support for precise scheduling of the instruction selection DAG,Andrew Trick2011-01-141-537/+663
| | | | | | | | | | | | | | | | | | | | | | | | | disabled in this checkin. Sorry for the large diffs due to refactoring. New functionality is all guarded by EnableSchedCycles. Scheduling the isel DAG is inherently imprecise, but we give it a best effort: - Added MayReduceRegPressure to allow stalled nodes in the queue only if there is a regpressure need. - Added BUHasStall to allow checking for either dependence stalls due to latency or resource stalls due to pipeline hazards. - Added BUCompareLatency to encapsulate and standardize the heuristics for minimizing stall cycles (vs. reducing register pressure). - Modified the bottom-up heuristic (now in BUCompareLatency) to prioritize nodes by their depth rather than height. As long as it doesn't stall, height is irrelevant. Depth represents the critical path to the DAG root. - Added hybrid_ls_rr_sort::isReady to filter stalled nodes before adding them to the available queue. Related Cleanup: most of the register reduction routines do not need to be templates. llvm-svn: 123468
* Try for the third time to teach getFirstTerminator() about debug values.Jakob Stoklund Olesen2011-01-142-4/+11
| | | | | | This time let's rephrase to trick gcc-4.3 into not miscompiling. llvm-svn: 123432
* Revert r123419. It still breaks llvm-gcc-i386-linux-selfhost.Jakob Stoklund Olesen2011-01-142-24/+7
| | | | llvm-svn: 123423
* Set the insertion point correctly for instructions generated by load folding:Chris Lattner2011-01-141-4/+4
| | | | | | they should go *before* the new instruction not after it. llvm-svn: 123420
* Try again to teach getFirstTerminator() about debug values.Jakob Stoklund Olesen2011-01-142-7/+24
| | | | | | Fix some callers to better deal with debug values. llvm-svn: 123419
* Better terminator avoidance.Jakob Stoklund Olesen2011-01-131-9/+3
| | | | | | | This approach also works when the terminator doesn't have a slot index. (Which can happen??) llvm-svn: 123413
* Temporary workaround for an i386 crash in LiveDebugVariables.Jakob Stoklund Olesen2011-01-131-1/+2
| | | | llvm-svn: 123400
* Teach frame lowering to ignore debug values after the terminators.Jakob Stoklund Olesen2011-01-131-0/+12
| | | | llvm-svn: 123399
* Speculatively revert r123384 to make llvm-gcc-i386-linux-selfhost buildbot ↵Devang Patel2011-01-132-18/+5
| | | | | | happy. llvm-svn: 123389
* Teach MachineBasicBlock::getFirstTerminator to ignore debug values.Jakob Stoklund Olesen2011-01-132-5/+18
| | | | | | | It will still return an iterator that points to the first terminator or end(), but there may be DBG_VALUE instructions following the first terminator. llvm-svn: 123384
* Fix r123346 to handle scalar types too.Dan Gohman2011-01-131-2/+1
| | | | llvm-svn: 123352
* Add missing space in debug outputJakob Stoklund Olesen2011-01-131-1/+1
| | | | llvm-svn: 123351
* Apply the patch from PR8958, which allows llc to get slightlyDan Gohman2011-01-121-1/+2
| | | | | | further on the associated testcase before aborting. llvm-svn: 123346
* Try again enabling LiveDebugVariables.Jakob Stoklund Olesen2011-01-121-1/+1
| | | | llvm-svn: 123342
* Don't emit a DBG_VALUE for a spill slot that the rewriter decided not to use ↵Jakob Stoklund Olesen2011-01-121-1/+2
| | | | | | after all. llvm-svn: 123339
* Fix braino in dominator tree walk.Jakob Stoklund Olesen2011-01-121-1/+1
| | | | llvm-svn: 123338
* Sometimes, old virtual registers can linger on DBG_VALUE instructions.Jakob Stoklund Olesen2011-01-121-1/+2
| | | | | | Make sure we don't crash in that case, but simply turn them into %noreg instead. llvm-svn: 123335
* Teach VirtRegRewriter to update slot indexes when erasing instructions.Jakob Stoklund Olesen2011-01-121-38/+26
| | | | | | It was leaving dangling pointers in the slot index maps. llvm-svn: 123334
* Annotate VirtRegRewriter debug output with slot indexes.Jakob Stoklund Olesen2011-01-121-2/+2
| | | | llvm-svn: 123333
* Verify slot index ordering.Jakob Stoklund Olesen2011-01-121-0/+25
| | | | | | The slot indexes must be monotonically increasing through the function. llvm-svn: 123324
* Verify that machine instruction parent pointers are consistent.Jakob Stoklund Olesen2011-01-121-0/+5
| | | | llvm-svn: 123322
* The world is not ready for LiveDebugVariables yet.Jakob Stoklund Olesen2011-01-111-1/+1
| | | | llvm-svn: 123290
* Enable LiveDebugVariables by default.Jakob Stoklund Olesen2011-01-111-1/+1
| | | | llvm-svn: 123282
* Don't insert DBG_VALUE instructions after the first terminator.Jakob Stoklund Olesen2011-01-111-0/+7
| | | | | | | | For one, MachineBasicBlock::getFirstTerminator() doesn't understand what is happening, and it also makes sense to have all control flow run through the DBG_VALUE. llvm-svn: 123277
* Appropriately truncate debug info range in dwarf output.Devang Patel2011-01-111-15/+5
| | | | | | This is not yet completely enabled. llvm-svn: 123274
* Move ExpandAtomic into the integer expansion routines - it's only used there.Eric Christopher2011-01-112-86/+87
| | | | llvm-svn: 123202
* Fix PR 8916 (qv for analysis), at least the immediate problem.Dale Johannesen2011-01-101-1/+2
| | | | | | | | | | | There's an inherent tension in DAGCombine between assuming that things will be put in canonical form, and the Depth mechanism that disables transformations when recursion gets too deep. It would not surprise me if there's a lot of little bugs like this one waiting to be discovered. The mechanism seems fragile and I'd suggest looking at it from a design viewpoint. llvm-svn: 123191
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-1012-41/+38
| | | | | | and fixes here and there. llvm-svn: 123170
* fit in 80 cols and use MBB::isSuccessor instead of a handChris Lattner2011-01-101-5/+4
| | | | | | rolled std::find. llvm-svn: 123164
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-1015-32/+29
| | | | | | | | These functions not longer assert when passed 0, but simply return false instead. No functional change intended. llvm-svn: 123155
* Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong resultsJakob Stoklund Olesen2011-01-092-10/+9
| | | | | | | | | | | | | | | | | | when no virtual registers have been allocated. It was only used to resize IndexedMaps, so provide an IndexedMap::resize() method such that Map.grow(MRI.getLastVirtReg()); can be replaced with the simpler Map.resize(MRI.getNumVirtRegs()); This works correctly when no virtuals are allocated, and it bypasses the to/from index conversions. llvm-svn: 123130
* sort this.Chris Lattner2011-01-091-1/+1
| | | | llvm-svn: 123129
* Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual andJakob Stoklund Olesen2011-01-095-13/+25
| | | | | | | | | | | | | physical register numbers. This makes the hack used in LiveInterval official, and lets LiveInterval be oblivious of stack slots. The isPhysicalRegister() and isVirtualRegister() predicates don't know about this, so when a variable may contain a stack slot, isStackSlot() should always be tested first. llvm-svn: 123128
* Add a forgotten VireReg2IndexFunctor.Jakob Stoklund Olesen2011-01-091-1/+1
| | | | llvm-svn: 123123
* Eliminate some extra hash table lookups.Cameron Zwarich2011-01-091-7/+10
| | | | llvm-svn: 123115
* Add an informative comment.Cameron Zwarich2011-01-091-1/+9
| | | | llvm-svn: 123114
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