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* Now that the MachineInstr leaks are fixed, enable leak checkingDan Gohman2008-07-211-0/+2
| | | | | | in the MachineInstr clone code. llvm-svn: 53868
* Add VerifyNode, a place to put sanity checks onDuncan Sands2008-07-213-6/+44
| | | | | | | | | | | | generic SDNode's (nodes with their own constructors should do sanity checking in the constructor). Add sanity checks for BUILD_VECTOR and fix all the places that were producing bogus BUILD_VECTORs, as found by "make check". My favorite is the BUILD_VECTOR with only two operands that was being used to build a vector with four elements! llvm-svn: 53850
* Pull r53795 from Gaz into mainline:Bill Wendling2008-07-201-14/+29
| | | | | | | | If .loc and .file aren't used, always emit the "debug_line" section. This requires at least one entry in the line matrix. So if there's nothing to emit into the matrix, emit an end of matrix value anyway. llvm-svn: 53803
* Fix a memory leak in LiveIntervalAnalysis.Evan Cheng2008-07-192-11/+13
| | | | llvm-svn: 53779
* Softfloat support for FDIV. Patch by Duncan Sands2008-07-182-0/+14
| | | | | | Richard Pennington. llvm-svn: 53773
* Eliminate unused variable.Duncan Sands2008-07-181-1/+1
| | | | llvm-svn: 53772
* Revert 53729, after waking up in the middle ofDuncan Sands2008-07-181-4/+3
| | | | | | | | | | | | | | | | the night realising that it was wrong :) I think the reason the same type was being used for the shufflevec of indices as for the actual indices is so that if one of them needs splitting then so does the other. After my patch it might be that the indices need splitting but not the rest, yet there is no good way of handling that. I think the right solution is to not have the shufflevec be an operand at all: just have it be the list of numbers it actually is, stored as extra info in the node. llvm-svn: 53768
* Fix a LocalSpiller leak. This fixes tramp3d-v4.Dan Gohman2008-07-181-0/+1
| | | | llvm-svn: 53766
* Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.Dan Gohman2008-07-174-6/+26
| | | | | | | Fix a leak that this turned up in LowerSubregs.cpp. And, comment a leak in LiveIntervalAnalysis.cpp. llvm-svn: 53746
* When printing MemOperand nodes, only use print() forDan Gohman2008-07-171-3/+10
| | | | | | | | PseudoSourceValue values, which never have names. Use getName() for all other values, because we want to print just a short summary of the value, not the entire instruction. llvm-svn: 53738
* Subreg live interval valno may not have a corresponding def machineinstr ↵Evan Cheng2008-07-171-1/+1
| | | | | | since it's less precise. llvm-svn: 53734
* Use a legal type for elements of the vector_shuffleDuncan Sands2008-07-171-3/+4
| | | | | | | | | | | | | | | | | | mask. These are just indices into the shuffled vector so their type is unrelated to the type of the shuffled elements (which is what was being used before). This fixes vec_shuffle-11.ll when using LegalizeTypes. What seems to have happened is that Dan's recent change r53687, which corrected the result type of the shuffle, somehow caused LegalizeTypes to notice that the mask operand was a BUILD_VECTOR with a legal type but elements of an illegal type (i64). LegalizeTypes legalized this by introducing a new BUILD_VECTOR of i32 and bitcasting it to the old type. But the mask operand is not supposed to be a bitcast but a straight BUILD_VECTOR of constants, causing a crash. llvm-svn: 53729
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-174-225/+365
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
* LegalizeTypes support for what seems to be theDuncan Sands2008-07-172-0/+18
| | | | | | | only missing ppc long double operations: FNEG and FP_EXTEND. llvm-svn: 53723
* Turn LegalizeTypes back off again for the moment:Duncan Sands2008-07-171-6/+4
| | | | | | | it is breaking Darwin bootstrap due to missing functionality. llvm-svn: 53721
* Factorize some code for determining which libcall to use.Duncan Sands2008-07-174-562/+204
| | | | llvm-svn: 53713
* Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. ThisDan Gohman2008-07-161-3/+2
| | | | | | | was turned up by some new SelectionDAG assertion checks that I'm working on. llvm-svn: 53687
* Add support for promoting and expanding AssertZextDuncan Sands2008-07-162-0/+42
| | | | | | | and AssertSext. Needed when passing huge integer parameters with the zeroext or signext attributes. llvm-svn: 53684
* Fix a comment to say nonnegative instead of positive.Dan Gohman2008-07-161-1/+1
| | | | llvm-svn: 53681
* Add an assert to check for empty flags for MachineMemOperand.Dan Gohman2008-07-161-0/+1
| | | | llvm-svn: 53680
* Reorder methods alphabetically. No functionality change.Duncan Sands2008-07-163-922/+913
| | | | | | | | While this is not a wonderful organizing principle, it does make it easy to find routines, and clear where to insert new ones. llvm-svn: 53672
* Turn on LegalizeTypes by default.Duncan Sands2008-07-161-4/+6
| | | | llvm-svn: 53671
* SelectionDAG::AssignNodeIds is unused.Dan Gohman2008-07-151-11/+0
| | | | llvm-svn: 53636
* Don't sort SDNodes by their addresses in SelectionDAG::dump. Instead,Dan Gohman2008-07-151-9/+5
| | | | | | | just use the AllNodes order, which is at least relatively stable across runs. llvm-svn: 53632
* LegalizeTypes support for fabs on ppc long double.Duncan Sands2008-07-152-0/+15
| | | | llvm-svn: 53613
* LegalizeTypes support for promotion of bswap.Duncan Sands2008-07-152-0/+12
| | | | | | | | | | | | In LegalizeDAG the value is zero-extended to the new type before byte swapping. It doesn't matter how the extension is done since the new bits are shifted off anyway after the swap, so extend by any old rubbish bits. This results in the final assembler for the testcase being one line shorter. llvm-svn: 53604
* LegalizeTypes support for promotion of SIGN_EXTEND_INREG.Duncan Sands2008-07-152-0/+9
| | | | llvm-svn: 53603
* Reorder the integer promotion methods alphabetically.Duncan Sands2008-07-151-365/+356
| | | | | | No change in functionality. llvm-svn: 53602
* Fixed potential bug if the source and target of a bit convert have different ↵Mon P Wang2008-07-151-1/+3
| | | | | | alignment llvm-svn: 53590
* Reapply 53476 and 53480, with a fix so that it properly updatesDan Gohman2008-07-144-33/+41
| | | | | | | the BB member to the current basic block after emitting instructions. llvm-svn: 53567
* Improve debug output for MemOperandSDNode. PseudoSourceValue nodesDan Gohman2008-07-141-4/+7
| | | | | | | don't have value names, so use print instead of getName() to get a useful string. llvm-svn: 53563
* Fix edito in the PseudoSourceValue name list.Dan Gohman2008-07-141-1/+1
| | | | llvm-svn: 53562
* I don't think BUILD_PAIR can have a vector result.Duncan Sands2008-07-141-12/+0
| | | | | | Remove support for this. llvm-svn: 53559
* Tighten up some checks. Fix FPOWI splitting forDuncan Sands2008-07-141-3/+3
| | | | | | non-power-of-two vectors. llvm-svn: 53558
* An INSERT_VECTOR_ELT can insert a larger valueDuncan Sands2008-07-141-4/+5
| | | | | | | | than the vector element type. Don't forget to handle this when the insertion index is not a constant. llvm-svn: 53556
* According to the docs, it is possible to have anDuncan Sands2008-07-141-11/+19
| | | | | | | | | | extending load of a vector. Handle this case when splitting vector loads. I'm not completely sure what is supposed to happen, but I think it means hi should be set to undef. LegalizeDAG does not consider this case. llvm-svn: 53555
* There should be no extending loads or truncatingDuncan Sands2008-07-141-4/+4
| | | | | | | | stores of one-element vectors. Also, neaten the handling of INSERT_VECTOR_ELT when the inserted type is larger than the vector element type. llvm-svn: 53554
* Ignore TargetConstant with an illegal type. TheseDuncan Sands2008-07-142-10/+23
| | | | | | | | | | are used for passing huge immediates in inline ASM from the front-end straight down to the ASM writer. Of course this is a hack, but it is simple, limited in scope, works in practice, and is what LegalizeDAG does. llvm-svn: 53553
* Typos.Evan Cheng2008-07-121-2/+2
| | | | llvm-svn: 53504
* Fix PR2536: a nasty spiller bug. If a two-address instruction uses a ↵Evan Cheng2008-07-121-0/+23
| | | | | | | | | | | register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. 8 %reg1024<def> = IMPLICIT_DEF 12 %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2 The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap. llvm-svn: 53503
* Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.Evan Cheng2008-07-124-38/+30
| | | | llvm-svn: 53502
* Include a frame index in the "fixed stack" pseudo source valueDan Gohman2008-07-113-26/+44
| | | | | | | instead of using the frame index for the SVOffset, which was inconsistent. llvm-svn: 53486
* Fix an obsolete top-level comment.Dan Gohman2008-07-111-3/+2
| | | | llvm-svn: 53481
* Factor out debugging code into the common base class.Dan Gohman2008-07-113-8/+5
| | | | llvm-svn: 53480
* Add support for putting NamedRegionTimers in TimerGroups, andDan Gohman2008-07-113-22/+33
| | | | | | | | use a timer group for the timers in SelectionDAGISel. Also, Split scheduling out from emitting, to give each their own timer. llvm-svn: 53476
* Trim unnecessary #includes.Dan Gohman2008-07-113-3/+0
| | | | llvm-svn: 53471
* Remove an apparently useless routine: there shouldDuncan Sands2008-07-112-15/+0
| | | | | | | be no need to split the result of a vector RET node, since they are always already legal. llvm-svn: 53462
* It is pointless to turn a UINT_TO_FP into anDuncan Sands2008-07-113-79/+118
| | | | | | | | | SINT_TO_FP libcall plus additional operations: it might as well be a direct UINT_TO_FP libcall. So only turn it into an SINT_TO_FP if the target has special handling for SINT_TO_FP. llvm-svn: 53461
* Add two missing SINT_TO_FP libcalls.Duncan Sands2008-07-112-11/+21
| | | | llvm-svn: 53460
* Port a shift-by-1 optimization from LegalizeDAG: itDuncan Sands2008-07-111-0/+7
| | | | | | | was presumably added after the rest of the code was copied to LegalizeTypes. llvm-svn: 53459
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