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* Add support to optionally limit the size of jump tables.Evandro Menezes2016-09-262-12/+38
| | | | | | | | | | | | | | | | | | | Many high-performance processors have a dedicated branch predictor for indirect branches, commonly used with jump tables. As sophisticated as such branch predictors are, they tend to have well defined limits beyond which their effectiveness is hampered or even nullified. One such limit is the number of possible destinations for a given indirect branches that such branch predictors can handle. This patch considers a limit that a target may set to the number of destination addresses in a jump table. Patch by: Evandro Menezes <e.menezes@samsung.com>, Aditya Kumar <aditya.k7@samsung.com>, Sebastian Pop <s.pop@samsung.com>. Differential revision: https://reviews.llvm.org/D21940 llvm-svn: 282412
* [ARM] Promote small global constants to constant poolsJames Molloy2016-09-261-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). This recommit contains fixes for a nasty bug related to fast-isel fallback - because fast-isel doesn't know about this optimization, if it runs and emits references to a string that we inline (because fast-isel fell back to SDAG) we will end up with an inlined string and also an out-of-line string, and we won't emit the out-of-line string, causing backend failures. It also contains fixes for emitting .text relocations which made the sanitizer bots unhappy. llvm-svn: 282387
* [X86][avx512] Fix bug in masked compress store.Ayman Musa2016-09-261-3/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D23984 llvm-svn: 282381
* [RegisterBankInfo] Constify the member of the XXXMapping maps.Quentin Colombet2016-09-241-2/+2
| | | | | | | This makes it obvious that items in those maps behave like statically created objects. llvm-svn: 282327
* [RegisterBankInfo] Add statistics for dynamic value mappings.Quentin Colombet2016-09-241-0/+8
| | | | | | | Like partial mappings, as we move toward TableGen'ed information, the number should reach zero eventually. llvm-svn: 282325
* [RegisterBankInfo] Uniquely generate ValueMapping.Quentin Colombet2016-09-241-11/+52
| | | | | | | | This is a step toward statically allocate ValueMapping. Like the previous few commits, the goal is to move toward a TableGen'ed like structure with no dynamic allocation at all. llvm-svn: 282324
* [RegisterBankInfo] Keep valid pointers for PartialMappings.Quentin Colombet2016-09-241-4/+9
| | | | | | | | | | | | | | | Previously we were using the address of the unique instance of a partial mapping in the related map to access this instance. However, when the map grows, the whole set of instances may be moved elsewhere and the previous addresses are not valid anymore. Instead, keep the address of the unique heap allocated instance of a partial mapping. Note: I did not see any actual bugs for that problem as the number of partial mappings dynamically allocated is small (<= 4). llvm-svn: 282323
* llc: Add -start-before/-stop-before optionsMatthias Braun2016-09-232-8/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D23089 llvm-svn: 282302
* [ResetMachineFunction] Populate the comments in the header of the file.Quentin Colombet2016-09-231-3/+6
| | | | | | NFC llvm-svn: 282276
* [ResetMachineFunction] Add statistic on the number of reset functions.Quentin Colombet2016-09-231-0/+4
| | | | | | | | As the development of GlobalISel move forward, this statistic should strictly decrease until it reaches zero. At this point, it would mean GlobalISel can replace SDISel (at least on the tested inputs :P). llvm-svn: 282275
* [RegisterBankInfo] Add statistics for dynamic partial mappings.Quentin Colombet2016-09-231-0/+11
| | | | | | | | Collect statistics about the number of partial mappings dynamically allocated and accessed. Ultimately, when the whole TableGen infrastructure is set, those numbers should be zero. llvm-svn: 282274
* ScheduleDAG: Match enum names when printing sdep kindsMatthias Braun2016-09-231-8/+8
| | | | | | | It is less confusing to have the same names in the debug print as the enum members. llvm-svn: 282273
* [RegBankSelect] Use DEBUG_TYPE instead of repeating the name of the passQuentin Colombet2016-09-231-2/+2
| | | | | | NFC llvm-svn: 282267
* [RegisterBank] Mark the dump method with LLVM_DUMP_METHOD.Quentin Colombet2016-09-231-1/+1
| | | | | | NFC llvm-svn: 282266
* [RegisterBankInfo] Mark the dump methods with LLVM_DUMP_METHOD.Quentin Colombet2016-09-231-4/+4
| | | | | | NFC llvm-svn: 282221
* [RegisterBankInfo] Check that the mapping covers the interesting bits.Quentin Colombet2016-09-231-2/+3
| | | | | | | | | | | | | | | In the verify method of the ValueMapping class we used to check that the mapping exactly matches the bits of the input value. This is problematic for statically allocated mappings because we would need a different mapping for each different size of the value that maps on one instruction. For instance, with such scheme, we would need a different mapping for a value of size 1, 5, 23 whereas they all end up on a 32-bit wide instruction. Therefore, change the verifier to check that the meaningful bits are covered by the mapping instead of matching them. llvm-svn: 282214
* [RegisterBankInfo] Use array instead of SmallVector for BreakDown.Quentin Colombet2016-09-232-42/+42
| | | | | | | | | | | | | This is another step toward TableGen'ed like structures. The BreakDown of the mapping of the value will be statically computed by TableGen, thus we only have to point to the right entry in the table instead of dynamically allocate the mapping for each instruction. We still support the dynamic allocation through a factory of PartialMapping to ease the bring-up of the targets while the TableGen backend is not available. llvm-svn: 282213
* MachineScheduler: Slightly simplify release nodeMatthias Braun2016-09-221-14/+0
| | | | llvm-svn: 282201
* MachineScheduler: Remove ineffective heuristic; NFCMatthias Braun2016-09-221-11/+0
| | | | | | | | | Currently all nodes get added to the NextSU list when they are released, so any candidate must be in that list, making the heuristic ineffective. Remove it for now, we can add it back later in a working fashion if necessary. llvm-svn: 282200
* Win64: Don't emit unwind info for "leaf" functions (PR30337)Hans Wennborg2016-09-221-1/+1
| | | | | | | | | | | | According to MSDN (see the PR), functions which don't touch any callee-saved registers (including %rsp) don't need any unwind info. This patch makes LLVM not emit unwind info for such functions, to save binary size. Differential Revision: https://reviews.llvm.org/D24748 llvm-svn: 282185
* [DAG] Fix incorrect alignment of ext load.Nirav Dave2016-09-221-1/+1
| | | | | | | | | | | | Correctly use alignment size from loaded size not output value size. Reviewers: jyknight, tstellarAMD, arsenm Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23356 llvm-svn: 282177
* GlobalISel: handle stack-based parameters on AArch64.Tim Northover2016-09-221-0/+9
| | | | llvm-svn: 282153
* [RegisterBankInfo] Move to statically allocated RegisterBank.Quentin Colombet2016-09-221-3/+8
| | | | | | | | | | | | This commit is basically the first step toward what will RegisterBankInfo look when it gets TableGen'ed. It introduces a XXXGenRegisterBankInfo.def file that is what TableGen will issue at some point. Moreover, the RegBanks field in RegisterBankInfo changed to reflect the static (compile time) aspect of the information. llvm-svn: 282131
* [RegisterBankInfo] Take advantage of the extra argument of SmallVector::resize.Quentin Colombet2016-09-221-3/+1
| | | | | | | | When initializing an instance of OperandsMapper, instead of using SmallVector::resize followed by std::fill, use the function that directly does that in SmallVector. llvm-svn: 282130
* [MIRParser] Delete dead code. NFCI.Davide Italiano2016-09-211-12/+0
| | | | llvm-svn: 282098
* Disable tail calls if there is an swifterror argumentArnold Schwaighofer2016-09-211-0/+5
| | | | | | | | | ISel does not handle them correctly yet i.e we crash trying to emit tail call code. radar://28407842 llvm-svn: 282088
* GlobalISel: produce correct code for signext/zeroext ABI flags.Tim Northover2016-09-213-7/+89
| | | | | | | | We still don't really have an equivalent of "AssertXExt" in DAG, so we don't exploit the guarantees on the receiving side yet, but this should produce conservatively correct code on iOS ABIs. llvm-svn: 282069
* GlobalISel: pass Function to lowerFormalArguments directly (NFC).Tim Northover2016-09-211-2/+1
| | | | | | | | The only implementation that exists immediately looks it up anyway, and the information is needed to handle various parameter attributes (stored on the function itself). llvm-svn: 282068
* Revert "Remove extra argument used once onEric Christopher2016-09-201-8/+1
| | | | | | | | | | | | TargetMachine::getNameWithPrefix and inline the result into the singular caller." and "Remove more guts of TargetMachine::getNameWithPrefix and migrate one check to the TLOF mach-o version." temporarily until I can get the whole call migrated out of the TargetMachine as we could hit places where TLOF isn't valid. This reverts commits r281981 and r281983. llvm-svn: 282028
* [CodeGen] stop short-circuiting the SSP code for sspstrong.George Burgess IV2016-09-201-5/+0
| | | | | | | | | | | | | | | | | | This check caused us to skip adding layout information for calls to alloca in sspreq/sspstrong mode. We check properly for sspstrong later on (and add the correct layout info when doing so), so removing this shouldn't hurt. No test is included, since testing this using lit seems to require checking for exact offsets in asm, which is something that the lit tests for this avoid. If someone cares deeply, I'm happy to write a unittest or something to cover this, but that feels like overkill. Patch by Daniel Micay. Differential Revision: https://reviews.llvm.org/D22714 llvm-svn: 282022
* Mark ELF sections whose name start with .note as notePetr Hosek2016-09-201-0/+5
| | | | | | | | | | | Previously, such section would be marked as SHT_PROGBITS which makes it impossible to use an initialized C variable declaration to emit an (allocated) ELF note. The new behavior is also consistent with ELF assembly parser. Differential Revision: https://reviews.llvm.org/D24692 llvm-svn: 282010
* Fix syntactical nit from r281990.Adrian McCarthy2016-09-201-3/+3
| | | | llvm-svn: 281991
* Emit S_COMPILE3 CodeView recordAdrian McCarthy2016-09-202-0/+129
| | | | | | | | | | CodeView has an S_COMPILE3 record to identify the compiler and source language of the compiland. This record comes first in the debug$S section for the compiland. The debuggers rely on this record to know the source language of the code. There was a little test fallout from introducing a new record into the symbols subsection. Differential Revision: https://reviews.llvm.org/D24317 llvm-svn: 281990
* Remove more guts of TargetMachine::getNameWithPrefix and migrate one check ↵Eric Christopher2016-09-201-0/+7
| | | | | | | | to the TLOF mach-o version. NFC intended. llvm-svn: 281983
* Remove extra argument used once on TargetMachine::getNameWithPrefix and ↵Eric Christopher2016-09-201-1/+1
| | | | | | inline the result into the singular caller. llvm-svn: 281981
* Improve the -debug output for Debug Range Extension (NFC)Keith Walker2016-09-201-1/+2
| | | | | | Include header messages and remove unnecessary blank lines. llvm-svn: 281980
* GlobalISel: split aggregates for PCS loweringTim Northover2016-09-204-6/+7
| | | | | | | | | | | This should match the existing behaviour for passing complicated struct and array types, in particular HFAs come through like that from Clang. For C & C++ we still need to somehow support all the weird ABI flags, or at least those that are present in the IR (signext, byval, ...), and stack-based parameter passing. llvm-svn: 281977
* BranchFolder: Fix invalid undef flags after merge.Matthias Braun2016-09-201-5/+14
| | | | | | | | | | It is legal to merge instructions with different undef flags; However we must drop the undef flag from the merged instruction if it isn't present everywhere. This fixes http://llvm.org/PR30199 llvm-svn: 281957
* [RegisterBankInfo] Adapt call to std::fill due to use of SmallVector.Quentin Colombet2016-09-191-1/+1
| | | | | | This was meant to be commited with my previous commit. llvm-svn: 281948
* [RegisterBankInfo] Avoid heap allocation in most cases.Quentin Colombet2016-09-191-1/+1
| | | | | | | | | | | The OperandsMapper class is used heavy in RegBankSelect and each instantiation triggered a heap allocation for the array of operands. Instead, use a SmallVector with a big enough size such that most of the cases do not have to use dynamically allocated memory. This improves the compile time of the RegBankSelect pass. llvm-svn: 281916
* LiveRangeCalc: Fix reporting of invalid vreg usage in liveness calculationMatthias Braun2016-09-191-3/+3
| | | | | | | | | | | | | Machine programs need a definition of each vreg before reaching a use (the definition may come from an IMPLICIT_DEF instruction). This class of errors is not detected by the MachineVerifier because of efficiency concerns. LiveRangeCalc used to report these problems, make it do that again (followup to r279625). Also use report_fatal_error() instead of llvm_unreachable() as the error reporting is only present in asserts build anyway. llvm-svn: 281914
* [XRay] ARM 32-bit no-Thumb support in LLVMDean Michael Berris2016-09-192-29/+96
| | | | | | | | | | | | This is a port of XRay to ARM 32-bit, without Thumb support yet. The XRay instrumentation support is moving up to AsmPrinter. This is one of 3 commits to different repositories of XRay ARM port. The other 2 are: https://reviews.llvm.org/D23932 (Clang test) https://reviews.llvm.org/D23933 (compiler-rt) Differential Revision: https://reviews.llvm.org/D23931 llvm-svn: 281878
* [AVX-512] Don't lower CVTPD2PS intrinsics to ISD::FP_ROUND with an X86 ↵Craig Topper2016-09-181-1/+2
| | | | | | | | rounding mode encoding in the second operand. This immediate should only be 0 or 1 and indicates if the truncation loses precision. Also enhance an assert in SelectionDAG::getNode to flag this sort of problem in the future. llvm-svn: 281868
* [X86][SSE] Improve recognition of uitofp conversions that can be performed ↵Simon Pilgrim2016-09-181-4/+0
| | | | | | | | | | | | | | as sitofp With D24253 we can now use SelectionDAG::SignBitIsZero with vector operations. This patch uses SelectionDAG::SignBitIsZero to recognise that a zero sign bit means that we can use a sitofp instead of a uitofp (which is not directly support on pre-AVX512 hardware). While AVX512 does provide support for uitofp, the conversion to sitofp should not cause any regressions. Differential Revision: https://reviews.llvm.org/D24343 llvm-svn: 281852
* Change the order of the splitted store from high - low to low - high.Wei Mi2016-09-181-2/+2
| | | | | | | It is a trivial change which could make the testcase easier to be reused for the store splitting in CodeGenPrepare. llvm-svn: 281846
* Don't create a SymbolTable in Function when the LLVMContext discards value ↵Mehdi Amini2016-09-172-4/+4
| | | | | | | | | | | | | | names (NFC) The ValueSymbolTable is used to detect name conflict and rename instructions automatically. This is not needed when the value names are automatically discarded by the LLVMContext. No functional change intended, just saving a little bit of memory. This is a recommit of r281806 after fixing the accessor to return a pointer instead of a reference and updating all the call-sites. llvm-svn: 281813
* [MIR Parser] Fix Build!Mehdi Amini2016-09-171-1/+1
| | | | | | Last-second refactoring before push was bad idea... llvm-svn: 281812
* MIR Parser: issue an error when the Context discard value names.Mehdi Amini2016-09-171-0/+8
| | | | | | This is in line with the LLParser behavior llvm-svn: 281811
* [safestack] Fix assertion failure in stack coloring.Evgeniy Stepanov2016-09-161-4/+6
| | | | | | | | | | This is a fix for PR30318. Clang may generate IR where an alloca is already live when entering a BB with lifetime.start. In this case, conservatively extend the alloca lifetime all the way back to the block entry. llvm-svn: 281784
* [RegAllocGreedy] Fix the list of NewVRegs for last chance recoloring.Quentin Colombet2016-09-161-2/+22
| | | | | | | | | | | | | | | | | When trying to recolor a register we may split live-ranges in the process. When we create new live-ranges we will have to process them, but when we move a register from Assign to Split, the allocation is not changed until the whole recoloring session is successful. Therefore, only push the live-ranges that changed from Assign to Split when the recoloring is successful. Same as the previous commit, I was not able to produce a test case that reproduce the problem with in-tree targets. Note: The bug has been here since the recoloring scheme has been added back in r200883 (Feb 2014). llvm-svn: 281783
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