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* Fix a logic error. An instruction that has a live physical register def ↵Evan Cheng2010-03-031-2/+5
| | | | | | cannot be CSE'ed, but it *can* be used to replace a common subexpression. llvm-svn: 97688
* Remove PHINodeTraits and use MachineInstrExpressionTrait instead.Evan Cheng2010-03-032-39/+2
| | | | llvm-svn: 97687
* Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip ↵Evan Cheng2010-03-031-0/+45
| | | | | | over only virtual register defs. This matches what isEqual() is doing. llvm-svn: 97680
* Re-apply r97667 but with a little bit of thought put into the patch. This ↵Evan Cheng2010-03-031-65/+3
| | | | | | implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. llvm-svn: 97678
* Revert 97667. It broke a bunch of tests.Dan Gohman2010-03-031-0/+63
| | | | llvm-svn: 97673
* Fix funky indentation and add comments.Evan Cheng2010-03-031-17/+24
| | | | llvm-svn: 97670
* Move DenseMapInfo for MachineInstr* to MachineInstr.hEvan Cheng2010-03-031-63/+0
| | | | llvm-svn: 97667
* Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case whereDan Gohman2010-03-031-4/+45
| | | | | | | | | | CSE and recursive RAUW calls delete a node from the use list, invalidating the use list iterator. There's currently no known way to reproduce this in an unmodified LLVM, however there's no fundamental reason why a SelectionDAG couldn't be formed which would trigger this case. llvm-svn: 97665
* Machine CSE work in progress. It's doing some CSE now. But implicit def of ↵Evan Cheng2010-03-031-24/+61
| | | | | | physical registers are getting in the way. llvm-svn: 97664
* Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.Evan Cheng2010-03-032-6/+16
| | | | llvm-svn: 97663
* Revert...Bill Wendling2010-03-031-3/+3
| | | | | | | --- Reverse-merging r97592 into '.': U lib/CodeGen/TargetLoweringObjectFileImpl.cpp llvm-svn: 97657
* add some of the more obscure predicate types to the Chris Lattner2010-03-031-56/+99
| | | | | | Scope accelerator. llvm-svn: 97652
* speed up scope node processing: if the first element of a scopeChris Lattner2010-03-031-38/+141
| | | | | | | | | | | | | entry we're about to process is obviously going to fail, don't bother pushing a scope only to have it immediately be popped. This avoids a lot of scope stack traffic in common cases. Unfortunately, this requires duplicating some of the predicate dispatch. To avoid duplicating the actual logic I pulled each predicate out to its own static function which gets used in both places. llvm-svn: 97651
* introduce a new SwitchTypeMatcher node (which is analogous toChris Lattner2010-03-031-3/+34
| | | | | | | | SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it. This speeds up selection, particularly for X86 which has lots of variants of instructions with only type differences. llvm-svn: 97645
* Work in progress. Finding some cse now.Evan Cheng2010-03-031-4/+88
| | | | llvm-svn: 97635
* Use APInt instead of zext value.Bill Wendling2010-03-031-1/+1
| | | | llvm-svn: 97631
* - Change MachineInstr::isIdenticalTo to take a new option that determines ↵Evan Cheng2010-03-033-32/+29
| | | | | | | | whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). llvm-svn: 97628
* Add an option to enable machine cse (it's not doing anything yet.Evan Cheng2010-03-031-0/+5
| | | | llvm-svn: 97627
* This test case:Bill Wendling2010-03-031-5/+7
| | | | | | | | | | | | | | | | | | | | | long test(long x) { return (x & 123124) | 3; } Currently compiles to: _test: orl $3, %edi movq %rdi, %rax andq $123127, %rax ret This is because instruction and DAG combiners canonicalize (or (and x, C), D) -> (and (or, D), (C | D)) However, this is only profitable if (C & D) != 0. It gets in the way of the 3-addressification because the input bits are known to be zero. llvm-svn: 97616
* Fix some issues in WalkChainUsers dealing with Chris Lattner2010-03-021-11/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | CopyToReg/CopyFromReg/INLINEASM. These are annoying because they have the same opcode before an after isel. Fix this by setting their NodeID to -1 to indicate that they are selected, just like what automatically happens when selecting things that end up being machine nodes. With that done, give IsLegalToFold a new flag that causes it to ignore chains. This lets the HandleMergeInputChains routine be the one place that validates chains after a match is successful, enabling the new hotness in chain processing. This smarter chain processing eliminates the need for "PreprocessRMW" in the X86 and MSP430 backends and enables MSP to start matching it's multiple mem operand instructions more aggressively. I currently #if out the dead code in the X86 backend and MSP backend, I'll remove it for real in a follow-on patch. The testcase changes are: test/CodeGen/X86/sse3.ll: we generate better code test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was miscompiling this before, we now generate correct code Convert it to filecheck while I'm at it. test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem folding to make anton happy. :) llvm-svn: 97596
* Okay. One last attempt:Bill Wendling2010-03-021-3/+3
| | | | | | Place the LSDA into the TEXT section on Mach-O. This saves space. llvm-svn: 97592
* run HandleMergeInputChains even if we only have one input chain.Chris Lattner2010-03-021-29/+3
| | | | llvm-svn: 97581
* Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng2010-03-025-10/+10
| | | | llvm-svn: 97578
* Fix typo.Evan Cheng2010-03-021-1/+1
| | | | llvm-svn: 97577
* Fix grammar.Devang Patel2010-03-021-1/+1
| | | | | | Thanks Duncan! llvm-svn: 97572
* Fix the xfail I added a couple of patches back. The issueChris Lattner2010-03-021-12/+40
| | | | | | | | | was that we weren't properly handling the case when interior nodes of a matched pattern become dead after updating chain and flag uses. Now we handle this explicitly in UpdateChainsAndFlags. llvm-svn: 97561
* I was confused about this, it turns out that MorphNodeToChris Lattner2010-03-021-3/+2
| | | | | | *does* delete ex-operands that become dead. llvm-svn: 97559
* factor node morphing out to its own helper method.Chris Lattner2010-03-021-54/+62
| | | | llvm-svn: 97558
* Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner2010-03-021-2/+59
| | | | | | | | | | | | DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader. Sink some other stuff out of DAGISelHeader into SDISel. Eliminate the various 'Indent' stuff from various targets, which dates to when isel was recursive. 17 files changed, 114 insertions(+), 430 deletions(-) llvm-svn: 97555
* Add file to CMakeLists.txtEric Christopher2010-03-021-0/+1
| | | | llvm-svn: 97545
* Add skeleton of a machine level cse pass.Evan Cheng2010-03-021-0/+124
| | | | llvm-svn: 97543
* Use the right induction variable.Chris Lattner2010-03-021-2/+2
| | | | llvm-svn: 97541
* Rewrite chain handling validation and input TokenFactor handlingChris Lattner2010-03-021-54/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | stuff now that we don't care about emulating the old broken behavior of the old isel. This eliminates the 'CheckChainCompatible' check (along with IsChainCompatible) which did an incorrect and inefficient scan *up* the chain nodes which happened as the pattern was being formed and does the validation at the end in HandleMergeInputChains when it forms a structural pattern. This scans "down" the graph, which means that it is quickly bounded by nodes already selected. This also handles token factors that get "trapped" in the dag. Removing the CheckChainCompatible nodes also shrinks the generated tables by about 6K for X86 (down to 83K). There are two pieces remaining before I can nuke PreprocessRMW: 1. I xfailed a test because we're now producing worse code in a case that has nothing to do with the change: it turns out that our use of MorphNodeTo will leave dead nodes in the graph which (depending on how the graph is walked) end up causing bogus uses of chains and blocking matches. This is really bad for other reasons, so I'll fix this in a follow-up patch. 2. CheckFoldableChainNode needs to be improved to handle the TF. llvm-svn: 97539
* Fix several places to handle vector operands properly.Dan Gohman2010-03-023-6/+6
| | | | | | Based on a patch by Micah Villmow for PR6438. llvm-svn: 97538
* Remove dead parameter passing.Bill Wendling2010-03-024-58/+51
| | | | llvm-svn: 97536
* Constructors and operators for anonymous aggregates does not names. Do not ↵Devang Patel2010-03-021-1/+3
| | | | | | force empty AT_name attribute in such cases. llvm-svn: 97533
* remove dead code.Chris Lattner2010-03-021-31/+0
| | | | llvm-svn: 97529
* refactor some code out of OPC_EmitMergeInputChains into aChris Lattner2010-03-021-21/+37
| | | | | | new helper function. llvm-svn: 97525
* remove all but one version of SelectionDAG::MorphNodeToChris Lattner2010-03-011-81/+0
| | | | | | (the most general) the others are dead. llvm-svn: 97511
* Use methods to determine if a LiveInterval is spillable.Jakob Stoklund Olesen2010-03-011-18/+26
| | | | | | Don't accidentally produce unspillable intervals for deeply nested loops. llvm-svn: 97496
* Accelerate isel dispatch for tables that start with a top-level Chris Lattner2010-03-011-1/+36
| | | | | | | OPC_SwitchOpcode to use a table lookup instead of having to go through the interpreter for this. llvm-svn: 97469
* Fix optimization of ISD::TRUNCATE on vector operands. Based on a patchDan Gohman2010-03-011-4/+5
| | | | | | by Micah Villmow for PR6335. llvm-svn: 97461
* some trivial microoptimizations.Chris Lattner2010-03-012-9/+18
| | | | llvm-svn: 97441
* eliminate the CheckMultiOpcodeMatcher code and have each Chris Lattner2010-03-011-9/+0
| | | | | | | | | ComplexPattern at the root be generated multiple times, once for each opcode they are part of. This encourages factoring because the opcode checks get treated just like everything else in the matcher. llvm-svn: 97439
* add a new OPC_SwitchOpcode which is semantically equivalentChris Lattner2010-03-011-0/+30
| | | | | | | | | | | | to a scope where every child starts with a CheckOpcode, but executes more efficiently. Enhance DAGISelMatcherOpt to form it. This also fixes a bug in CheckOpcode: apparently the SDNodeInfo objects are not pointer comparable, we have to compare the enum name. llvm-svn: 97438
* eliminate GetInt1/2Chris Lattner2010-02-281-16/+3
| | | | llvm-svn: 97426
* hoist the new isel interpreter out of DAGISelHeader.hChris Lattner2010-02-281-0/+859
| | | | | | | | (which gets #included into the middle of each target's DAGISel class) into a .cpp file where it is only compiled once. llvm-svn: 97425
* enhance the new isel to handle the 'node already exists'Chris Lattner2010-02-281-1/+1
| | | | | | case of MorphNodeTo directly. llvm-svn: 97417
* simplify this code, return only ever has zero or one operands.Chris Lattner2010-02-281-8/+6
| | | | llvm-svn: 97408
* Don't try to replace physical registers when doing CSE.Dan Gohman2010-02-281-1/+12
| | | | llvm-svn: 97360
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