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* Verify entire type descriptor not just tag.Devang Patel2010-05-071-2/+2
| | | | llvm-svn: 103303
* Fix PR 7087, and probably other things, by extendingDale Johannesen2010-05-071-1/+11
| | | | | | | | | getConstantFP to accept the two supported long double target types. This was not the original intent, but there are other places that assume this works and it's easy enough to do. llvm-svn: 103299
* Wrap const MDNode * inside DIDescriptor.Devang Patel2010-05-072-55/+55
| | | | llvm-svn: 103295
* Avoid DIDescriptor::getNode(). Use overloaded operators instead.Devang Patel2010-05-072-66/+66
| | | | llvm-svn: 103272
* switch MCSectionCOFF from a syntactic to semantic representation,Chris Lattner2010-05-071-54/+115
| | | | | | patch by Peter Housel! llvm-svn: 103267
* Revert r103133 and add testcase from PR7066.Nick Lewycky2010-05-071-12/+2
| | | | llvm-svn: 103233
* Transfer debug location information from PHI nodes to resultingDan Gohman2010-05-071-0/+8
| | | | | | lowered copies. llvm-svn: 103228
* Print debug information for SDNodes.Dan Gohman2010-05-071-0/+16
| | | | llvm-svn: 103227
* Disable the new unknown-location code for now. It causes a majorDan Gohman2010-05-071-14/+20
| | | | | | | increase in the debug line info section, and it's causing regressions in a gdb testsuite. llvm-svn: 103226
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-0612-40/+59
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-067-25/+32
| | | | llvm-svn: 103193
* 80 col violation.Evan Cheng2010-05-061-2/+2
| | | | llvm-svn: 103185
* Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.llEvan Cheng2010-05-061-4/+16
| | | | | | | | | | | with the fix in 103157. %reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0 is not coalescable since none of the super-registers of S1 are in reg1039's register class: DPR_VFP2. But it is still a legal copy instruction so it should not assert. llvm-svn: 103170
* Update LabelsBeforeInsn also, when creating unknown-position labels.Dan Gohman2010-05-061-0/+5
| | | | llvm-svn: 103145
* Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol ↵Chris Lattner2010-05-061-1/+7
| | | | | | | | | twice!"' failed. Users can write broken code that emits the same label twice with asm renaming, detect this and emit a fatal backend error instead of aborting. llvm-svn: 103140
* In bottom-up mode, defer the materialization of local constant values.Dan Gohman2010-05-061-0/+11
| | | | llvm-svn: 103139
* Add an "IsBottomUp" member function to FastISel, which will be used toDan Gohman2010-05-051-1/+2
| | | | | | support a new bottom-up mode. llvm-svn: 103138
* Emit debug info for MachineInstrs with unknown debug locations, insteadDan Gohman2010-05-051-19/+34
| | | | | | | | of just letting them inherit the debug locations of adjacent instructions. Debug info should aim to be either accurate or absent. llvm-svn: 103135
* Fix PR6520. An earlyclobber physreg must not be allocated to anything else.Jakob Stoklund Olesen2010-05-051-2/+12
| | | | llvm-svn: 103133
* Use getValue() for PHINodes when direct NodeMap access does not work. Devang Patel2010-05-051-1/+15
| | | | llvm-svn: 103126
* Move REG_SEQUENCE removal to 2addr pass.Evan Cheng2010-05-053-63/+68
| | | | llvm-svn: 103109
* Teach liveintervalanalysis about virtual registers which are defined by ↵Evan Cheng2010-05-051-14/+37
| | | | | | | | | | reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. 80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0 . . . 120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0 llvm-svn: 103102
* Combine the implementations of the core part of the SSAUpdater andBob Wilson2010-05-041-437/+109
| | | | | | MachineSSAUpdater to avoid duplicating all the code. llvm-svn: 103060
* Teach PHI elimination to remove REG_SEQUENCE instructions and update ↵Evan Cheng2010-05-043-0/+86
| | | | | | | | | | | | | references of the source operands with references of the destination with subreg indices. e.g. %reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ... %reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6 => %reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ... PHI elimination now does more than phi elimination. It is really a de-SSA pass. llvm-svn: 103039
* Rename variables for consistency.Evan Cheng2010-05-041-10/+11
| | | | llvm-svn: 103013
* Set DW_AT_APPLE_omit_frame_ptr in endFunction() where MachineFunction is ↵Devang Patel2010-05-041-4/+6
| | | | | | available all the time. llvm-svn: 103001
* Instruction selection optimizations may have moved the def of a function ↵Evan Cheng2010-05-041-1/+2
| | | | | | argument out of the entry block. rdar://7937489 llvm-svn: 102993
* Teach scheduler about REG_SEQUENCE.Evan Cheng2010-05-042-2/+44
| | | | llvm-svn: 102984
* Re-enable isel kill flags, now that the local allocator is ignoring them.Dan Gohman2010-05-041-4/+0
| | | | llvm-svn: 102981
* Remove preexisting kill flags in RegAllocLocal, just like LiveVariables does.Jakob Stoklund Olesen2010-05-031-1/+4
| | | | | | | This should make it possible to start producing kill flags in isel without breaking stuff. llvm-svn: 102976
* Factor out FastISel's code for materializing constants and other valuesDan Gohman2010-05-031-1/+10
| | | | | | | in registers into a separate function to de-couple it from the top-down-specific logic in getRegForValue. llvm-svn: 102975
* Check that subregisters don't have independent values in ↵Jakob Stoklund Olesen2010-05-031-3/+14
| | | | | | | | RemoveCopyByCommutingDef(). This fixes PR6941. llvm-svn: 102970
* Reword a comment slightly.Eric Christopher2010-05-031-1/+1
| | | | llvm-svn: 102966
* Print basic block numbers in live interval debug output. Since the rest of theBob Wilson2010-05-031-1/+2
| | | | | | | | debug output is showing machine instructions, the IR-level basic block names aren't very meaningful, and because multiple machine basic blocks may be derived from one IR-level BB, they're also not unique. llvm-svn: 102960
* Fix a bug which prevented tail merging of return instructions inDan Gohman2010-05-031-24/+5
| | | | | | | | | | | | | | | | | | | | beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and test/CodeGen/ARM/ifcvt2.ll for details. The fix is to change HashEndOfMBB to hash at most one instruction, instead of trying to apply heuristics about when it will be profitable to consider more than one instruction. The regular tail-merging heuristics are already prepared to handle the same cases, and they're more precise. Also, make test/CodeGen/ARM/ifcvt5.ll and test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they continue to test what they're intended to test. And, this eliminates the problem in test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from PR5204. Update it accordingly. llvm-svn: 102907
* Don't count debug info as instructions. This wasDale Johannesen2010-05-011-1/+2
| | | | | | | | preventing the emission of the NOP on Darwin for a function with no actual code. From timberwolfmc with TEST=optllcdbg. llvm-svn: 102843
* Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),Anton Korobeynikov2010-05-011-1/+6
| | | | | | when needed. This fixes PR7001 llvm-svn: 102838
* Remove the code for special-casing byval for fast-isel. SelectionDAGDan Gohman2010-05-012-21/+3
| | | | | | | handles argument lowering anyway, so there's no need for special casing here. llvm-svn: 102828
* Re-disable kill flags, as there is more trouble.Dan Gohman2010-05-011-0/+4
| | | | llvm-svn: 102826
* Re-enable kill flags from SelectionDAGISel, with a fix: don'tDan Gohman2010-05-011-5/+1
| | | | | | try to put a kill flag on a DBG_INFO instruction. llvm-svn: 102820
* Fix a bug where debug info affected stack slot coloring.Dale Johannesen2010-05-011-1/+2
| | | | | | | Seen in SingleSrc/Benchmarks/Misc/flops with TEST=optllcdbg. 7929951. llvm-svn: 102819
* Fix whitespace.Dan Gohman2010-05-011-1/+1
| | | | llvm-svn: 102817
* Don't pass SDValues by non-const reference unless they may beDan Gohman2010-05-012-2/+3
| | | | | | modified. llvm-svn: 102816
* Reorgnaize more switch code lowering to clean up some trickyDan Gohman2010-05-012-22/+22
| | | | | | | | | | | code, and to eliminate the need for the SelectionDAGBuilder state to be live during CodeGenAndEmitDAG calls. Call SDB->clear() before CodeGenAndEmitDAG calls instead of before it, and move the CurDAG->clear() out of SelectionDAGBuilder, which doesn't own the DAG, and into CodeGenAndEmitDAG. llvm-svn: 102814
* Delete the EdgeMapping variable itself.Dan Gohman2010-05-012-5/+0
| | | | llvm-svn: 102810
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-018-35/+19
| | | | | | changes before doing phi lowering for switches. llvm-svn: 102809
* EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but theBill Wendling2010-04-301-8/+13
| | | | | | | | indexes could be of a different value type. Or not even using the same SDNode for the constant (weird, I know). Compare the actual values instead of the pointers. llvm-svn: 102791
* Remove this debug output. The MachineFunction will be printed once all ofDan Gohman2010-04-301-3/+0
| | | | | | | instruction selection is done; it's confusing to see parts of it printed, while other parts are omitted, along the way. llvm-svn: 102771
* The local register allocator has to spill dirty callee saved registers before aJakob Stoklund Olesen2010-04-301-6/+33
| | | | | | | | | | call that might throw. The landing pad assumes that all registers are in stack slots. We used to spill those dirty CSRs after the call, and the stack slots would be wrong when arriving at the landing pad. llvm-svn: 102770
* Attach AT_APPLE_optimized attribute to optimized function's debug info.Devang Patel2010-04-301-5/+8
| | | | llvm-svn: 102743
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