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* Making this code const-correct would be a pain, so I'll hack it.Chris Lattner2003-07-262-5/+6
| | | | llvm-svn: 7350
* Const correctness fixesChris Lattner2003-07-262-3/+3
| | | | llvm-svn: 7349
* Be const correctChris Lattner2003-07-261-2/+2
| | | | llvm-svn: 7348
* Hrm, another necesary one :(Chris Lattner2003-07-261-0/+1
| | | | llvm-svn: 7347
* Remove #includeChris Lattner2003-07-261-1/+0
| | | | llvm-svn: 7342
* Remove extraneous #includesChris Lattner2003-07-262-2/+1
| | | | llvm-svn: 7341
* (1) Change the way unused regs. are marked and found to consider regTypeVikram S. Adve2003-07-254-116/+134
| | | | | | | | | | | info (since multiple reg types may share the same reg class). (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. llvm-svn: 7329
* Remove unused field. Change the way unused regs. are marked andVikram S. Adve2003-07-251-10/+11
| | | | | | | found to consider regType info (since multiple reg types may share the same reg class, e.g., single and double on Sparc). llvm-svn: 7327
* Remove unnecessary castsChris Lattner2003-07-231-2/+2
| | | | llvm-svn: 7250
* Random cleanupsChris Lattner2003-07-231-26/+18
| | | | llvm-svn: 7247
* Remove using declChris Lattner2003-07-231-7/+4
| | | | llvm-svn: 7246
* Values stored in CallArgsDescriptor cannot be const.Vikram S. Adve2003-07-101-2/+2
| | | | llvm-svn: 7156
* isMarkedForSpill() should be const.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7155
* Change interface to MachineInstr::substituteValue to specify more preciselyVikram S. Adve2003-07-101-7/+21
| | | | | | which args can be substituted: defsOnly, defsAndUses or usesOnly. llvm-svn: 7154
* Print out all neighbors in interference graph, not just higher-numbered ones.Vikram S. Adve2003-07-101-1/+1
| | | | llvm-svn: 7153
* Several fixes to handling of int CC register:Vikram S. Adve2003-07-101-8/+10
| | | | | | | | | | | | | | | | | | | | | (1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. llvm-svn: 7152
* Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed.Vikram S. Adve2003-07-061-3/+4
| | | | llvm-svn: 7112
* Minor beautification: fold a couple of lines of code.Vikram S. Adve2003-07-021-3/+2
| | | | llvm-svn: 7054
* A def. operand of a machine instruction may be an ordinary Value*,Vikram S. Adve2003-07-021-13/+12
| | | | | | | | not just an Instruction*, at least in one unfortunate case: the first operand to the va_arg instruction. Modify ValueToDefVecMap to map from Value*, not Instruction*. llvm-svn: 7052
* Merged in autoconf branch. This provides configuration via the autoconfJohn Criswell2003-06-302-1/+2
| | | | | | system. llvm-svn: 7014
* Remove a ton of extraneous #includesChris Lattner2003-06-222-5/+1
| | | | llvm-svn: 6842
* Actually, change it to use explicit new/delete, which is more likely to beChris Lattner2003-06-161-2/+3
| | | | | | optimized INTO an alloca llvm-svn: 6727
* Remove two using declsChris Lattner2003-06-161-18/+14
| | | | | | Remove usage of alloca llvm-svn: 6725
* Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",Brian Gaeke2003-06-161-1/+1
| | | | | | | so that we can easily change its use to be conditional on the result of an autoconf test later. llvm-svn: 6723
* Included assert.h so that the code compiles under newer versions of GCC.John Criswell2003-06-112-0/+3
| | | | llvm-svn: 6682
* add some commentsGuochun Shi2003-06-102-54/+114
| | | | | | add a function ModuloScheduling::dumpFinalSchedule() to print out final schedule llvm-svn: 6677
* add an brief instruction what this pass isGuochun Shi2003-06-101-1/+1
| | | | llvm-svn: 6676
* a simple introduction to this passGuochun Shi2003-06-101-0/+33
| | | | llvm-svn: 6675
* cleaned codeGuochun Shi2003-06-103-127/+321
| | | | | | add some comments llvm-svn: 6674
* delete useless functionsGuochun Shi2003-06-084-216/+190
| | | | | | add comment llvm-svn: 6673
* change DEBUG to DEBUG_PRINTGuochun Shi2003-06-083-102/+106
| | | | llvm-svn: 6672
* Do not hastily change the Opcode from 'r' to 'i' type if we're not actuallyMisha Brukman2003-06-071-7/+6
| | | | | | | | SETTING the operand to be an immediate or have verified that one of the operands is really a SignExtended or Unextended immediate value already, which warrants an 'i' opcode. llvm-svn: 6662
* Fix bug: Jello/2003-06-04-bzip2-bug.llChris Lattner2003-06-051-23/+21
| | | | llvm-svn: 6624
* I have finally seen the light. The code to change the opcode must live higher inMisha Brukman2003-06-041-4/+13
| | | | | | | | | | | the loop, and in both cases. In the first case, it is a VReg that is a constant so it may be actually converted to a constant. In the second case, it is already a constant, but then if it doesn't change its type (e.g. to become a register and have the value loaded from memory if it is too large to live in its instruction field), we must change the opcode BEFORE the 'continue', otherwise we miss the opportunity. llvm-svn: 6602
* Pass through the emitConstantPool() call to the real emitter.Misha Brukman2003-06-031-0/+4
| | | | llvm-svn: 6590
* Moved code to modify the opcode from 'reg' to 'imm' form to a more logical ↵Misha Brukman2003-06-031-15/+6
| | | | | | place. llvm-svn: 6563
* Moved FInfo.cpp to lib/Target/Sparc as it is Sparc-specific.Misha Brukman2003-06-021-73/+0
| | | | llvm-svn: 6554
* Minor cleanups.Chris Lattner2003-06-021-6/+4
| | | | | | | This pass should be moved to lib/Target/Sparc since it's sparc specific It also needs a file comment. llvm-svn: 6553
* Remove usage of noncopyable classes to clean up doxygen output.Chris Lattner2003-06-022-22/+25
| | | | | | | In particular these classes are the last that link the noncopyable classes with the hash_map, vector, and list classes. llvm-svn: 6552
* Add #includeChris Lattner2003-06-021-0/+1
| | | | llvm-svn: 6550
* Removed a useless ofstream.Misha Brukman2003-06-021-8/+2
| | | | llvm-svn: 6547
* compiled with the new SchedGraphCommonGuochun Shi2003-06-023-27/+38
| | | | llvm-svn: 6545
* Remove spurious assert()Misha Brukman2003-06-021-1/+0
| | | | llvm-svn: 6529
* Changes to be compatible with MachineCodeEmitter.hChris Lattner2003-06-011-65/+51
| | | | llvm-svn: 6515
* Minor changes.Vikram S. Adve2003-05-311-0/+5
| | | | llvm-svn: 6470
* Added MachineCodeForInstruction object as an argument toVikram S. Adve2003-05-312-6/+13
| | | | | | | | TmpInstruction constructors because every TmpInstruction object has to be registered with a MachineCodeForInstruction to prevent leaks. This simplifies the user's code. llvm-svn: 6469
* Allow explicit physical registers for implicit operands.Vikram S. Adve2003-05-311-1/+11
| | | | llvm-svn: 6468
* Changes to allow explicit physical register arguments that have beenVikram S. Adve2003-05-312-42/+96
| | | | | | | | | | preallocated. While reg-to-reg dependences were already handled, this change required new code for adding edges to/from call instructions. This was part of the extensive changes to the way code generation occurs for function call arguments and return values. See log for CodeGen/PhyRegAlloc.cpp. llvm-svn: 6467
* Extensive changes to the way code generation occurs for functionVikram S. Adve2003-05-312-157/+261
| | | | | | | | | | | | | | call arguments and return values: Now all copy operations before and after a call are generated during selection instead of during register allocation. The values are copied to virtual registers (or to the stack), but in the former case these operands are marked with the correct physical registers according to the calling convention. Although this complicates scheduling and does not work well with live range analysis, it simplifies the machine-dependent part of register allocation. llvm-svn: 6465
* When converting virtual registers to immediate constants, change the opcode.Misha Brukman2003-05-301-0/+14
| | | | llvm-svn: 6452
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