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* [DAG] Refactor ReassociateOps - no functional change intended.Juergen Ributzka2014-01-131-73/+44
| | | | llvm-svn: 199146
* [DAG] Teach DAG to also reassociate vector operationsJuergen Ributzka2014-01-132-16/+60
| | | | | | | | | | This commit teaches DAG to reassociate vector ops, which in turn enables constant folding of vector op chains that appear later on during custom lowering and DAG combine. Reviewed by Andrea Di Biagio llvm-svn: 199135
* Hide the pre-RA-sched= option.Andrew Trick2014-01-132-2/+2
| | | | | | | | | This is a very confusing option for a feature that will go away. -enable-misched is exposed instead to help triage issues with the new scheduler. llvm-svn: 199133
* [PM] Split DominatorTree into a concrete analysis result object whichChandler Carruth2014-01-134-9/+12
| | | | | | | | | | | | | | | | | | | | | | | can be used by both the new pass manager and the old. This removes it from any of the virtual mess of the pass interfaces and lets it derive cleanly from the DominatorTreeBase<> template. In turn, tons of boilerplate interface can be nuked and it turns into a very straightforward extension of the base DominatorTree interface. The old analysis pass is now a simple wrapper. The names and style of this split should match the split between CallGraph and CallGraphWrapperPass. All of the users of DominatorTree have been updated to match using many of the same tricks as with CallGraph. The goal is that the common type remains the resulting DominatorTree rather than the pass. This will make subsequent work toward the new pass manager significantly easier. Also in numerous places things became cleaner because I switched from re-running the pass (!!! mid way through some other passes run!!!) to directly recomputing the domtree. llvm-svn: 199104
* [PM] Pull the generic graph algorithms and data structures for dominatorChandler Carruth2014-01-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | trees into the Support library. These are all expressed in terms of the generic GraphTraits and CFG, with no reliance on any concrete IR types. Putting them in support clarifies that and makes the fact that the static analyzer in Clang uses them much more sane. When moving the Dominators.h file into the IR library I claimed that this was the right home for it but not something I planned to work on. Oops. So why am I doing this? It happens to be one step toward breaking the requirement that IR verification can only be performed from inside of a pass context, which completely blocks the implementation of verification for the new pass manager infrastructure. Fixing it will also allow removing the concept of the "preverify" step (WTF???) and allow the verifier to cleanly flag functions which fail verification in a way that precludes even computing dominance information. Currently, that results in a fatal error even when you ask the verifier to not fatally error. It's awesome like that. The yak shaving will continue... llvm-svn: 199095
* Revert "ReMat: fix overly cavalier attitude to sub-register indices"Tim Northover2014-01-131-4/+24
| | | | | | | | | | Very sorry, this was a premature patch that I still need to investigate and finish off (for some reason beyond me at the moment it doesn't actually fix the issue in all cases). This reverts commit r199091. llvm-svn: 199093
* ReMat: fix overly cavalier attitude to sub-register indicesTim Northover2014-01-131-24/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two attempted optimisations in reMaterializeTrivialDef, trying to avoid promoting the size of a register too much when rematerializing. Unfortunately, both appear to be flawed. First, we see if the original register would have worked, but this is inadequate. Consider: v1 = SOMETHING (v1 is QQ) v2:Q0 = COPY v1:Q1 (v1, v2 are QQ) ... uses of v2 In this case even though v2 *could* be used directly as the output of SOMETHING, this would set the wrong bits of the QQ register involved. The correct rematerialization must be: v2:Q0_Q1 = SOMETHING (v2 promoted to QQQ) ... uses of v2:Q1_Q2 For the second optimisation, if the correct remat is "v2:idx = SOMETHING" then we can't necessarily expect v2 itself to be valid for SOMETHING, but we do try to hunt for a class between v1 and v2 that works. Unfortunately, this is also wrong: v1 = SOMETHING (v1 is QQ) v2:Q0_Q1 = COPY v1 (v1 is QQ, v2 is QQQ) ... uses of v2 as a QQQ The canonical rematerialization here is "v2:Q0_Q1 = SOMETHING". However current logic would decide that v2 could be a QQ (no interest is taken in later uses). This patch, therefore, always accepts the widened register class without trying to be clever. Generally there is no penalty to this (e.g. in the common GR32 < GR64 case, expanding the width doesn't matter because it's not like you were going to do anything else with the high bits of a GR32 register). It can increase register pressure in cases like the ARM VFP regs though (multiple non-overlapping but equivalent subregisters). Hopefully this situation is rare enough that it won't matter. Unfortunately, no in-tree targets actually expose this as far as I can tell (there are so few isAsCheapAsAMove instructions for it to trigger on) so I've been unable to produce a test. It was exposed in our ARM64 SPEC tests though, and I will be adding a test there that we should be able to contribute soon(TM). llvm-svn: 199091
* [cleanup] Move the Dominators.h and Verifier.h headers into the IRChandler Carruth2014-01-135-6/+6
| | | | | | | | | | | | | | | | | | directory. These passes are already defined in the IR library, and it doesn't make any sense to have the headers in Analysis. Long term, I think there is going to be a much better way to divide these matters. The dominators code should be fully separated into the abstract graph algorithm and have that put in Support where it becomes obvious that evn Clang's CFGBlock's can use it. Then the verifier can manually construct dominance information from the Support-driven interface while the Analysis library can provide a pass which both caches, reconstructs, and supports a nice update API. But those are very long term, and so I don't want to leave the really confusing structure until that day arrives. llvm-svn: 199082
* Handle bundled terminators in isBlockOnlyReachableByFallthrough.Jakob Stoklund Olesen2014-01-121-7/+7
| | | | | | | | | | Targets like SPARC and MIPS have delay slots and normally bundle the delay slot instruction with the corresponding terminator. Teach isBlockOnlyReachableByFallthrough to find any MBB operands on bundled terminators so SPARC doesn't need to specialize this function. llvm-svn: 199061
* Fix non-deterministic SDNodeOrder-dependent codegenNico Rieck2014-01-122-1/+6
| | | | | | | Reset SelectionDAGBuilder's SDNodeOrder to ensure deterministic code generation. llvm-svn: 199050
* [PM] Simplify the interface exposed for IR printing passes.Chandler Carruth2014-01-122-5/+4
| | | | | | | | | | | | Nothing was using the ability of the pass to delete the raw_ostream it printed to, and nothing was trying to pass it a pointer to the raw_ostream. Also, the function variant had a different order of arguments from all of the others which was just really confusing. Now the interface accepts a reference, doesn't offer to delete it, and uses a consistent order. The implementation of the printing passes haven't been updated with this simplification, this is just the API switch. llvm-svn: 199044
* [PM] Rename the IR printing pass header to a more generic and correctChandler Carruth2014-01-122-2/+2
| | | | | | | | name to match the source file which I got earlier. Update the include sites. Also modernize the comments in the header to use the more recommended doxygen style. llvm-svn: 199041
* Fix 'ned' typo in doc commentAlp Toker2014-01-111-1/+1
| | | | | | Patch by Jasper Neumann! llvm-svn: 199007
* Revert r198979 - accidental commit.Eric Christopher2014-01-111-5/+5
| | | | llvm-svn: 198981
* Reformat.Eric Christopher2014-01-111-5/+3
| | | | llvm-svn: 198980
* Update function name and add some helpful comments.Eric Christopher2014-01-111-3/+4
| | | | llvm-svn: 198979
* Revert "Revert r198851, "Prototype of skeleton type units for fission""David Blaikie2014-01-103-4/+27
| | | | | | | | | This reverts commit r198865 which reverts r198851. ASan identified a use-of-uninitialized of the DwarfTypeUnit::Ty variable in skeleton type units. llvm-svn: 198908
* Revert r198851, "Prototype of skeleton type units for fission"NAKAMURA Takumi2014-01-093-26/+4
| | | | | | It caused undefined behavior. DwarfTypeUnit::Ty might not be initialized properly, I guess. llvm-svn: 198865
* Handle masked rotate amountsRichard Sandiford2014-01-091-16/+72
| | | | | | | | | | | | | | At the moment we expect rotates to have the form: (or (shl X, Y), (shr X, Z)) where Y == bitsize(X) - Z or Z == bitsize(X) - Y. This form means that the (or ...) is undefined for Y == 0 or Z == 0. This undefinedness can be avoided by using Y == (C * bitsize(X) - Z) & (bitsize(X) - 1) or Z == (C * bitsize(X) - Y) & (bitsize(X) - 1) for any integer C (including 0, the most natural choice). llvm-svn: 198861
* Match the InstCombine form of rotates by X+CRichard Sandiford2014-01-091-12/+39
| | | | | | | | | | | | | | | | | InstCombine converts (sub 32, (add X, C)) into (sub 32-C, X), so a rotate left of a 32-bit Y by X+C could appear as either: (or (shl Y, (add X, C)), (shr Y, (sub 32, (add X, C)))) without InstCombine or: (or (shl Y, (add X, C)), (shr Y, (sub 32-C, X))) with it. We already matched the first form. This patch handles the second too. llvm-svn: 198860
* Prototype of skeleton type units for fissionDavid Blaikie2014-01-093-4/+26
| | | | llvm-svn: 198851
* DwarfDebug: Refactor out common skeleton construction code to be reused for ↵David Blaikie2014-01-092-17/+25
| | | | | | type unit skeletons. llvm-svn: 198846
* Reformatting for r198842David Blaikie2014-01-091-3/+2
| | | | llvm-svn: 198843
* DwarfUnit: Rename "Node" to "CUNode" and propagate it through DwarfTypeUnit ↵David Blaikie2014-01-094-22/+18
| | | | | | | | | | as well. Since we'll now also need the split dwarf file name along with the language in DwarfTypeUnits, just use the whole DICompileUnit rather than explicitly handling each field needed. llvm-svn: 198842
* Revert "DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit only"David Blaikie2014-01-092-12/+12
| | | | | | | | This reverts commit r198830. Decided to go a different way with this... llvm-svn: 198841
* Put the functionality for printing a value to a raw_ostream as anChandler Carruth2014-01-098-27/+17
| | | | | | | | | | | | operand into the Value interface just like the core print method is. That gives a more conistent organization to the IR printing interfaces -- they are all attached to the IR objects themselves. Also, update all the users. This removes the 'Writer.h' header which contained only a single function declaration. llvm-svn: 198836
* DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit onlyDavid Blaikie2014-01-092-12/+12
| | | | | | It's unused in DwarfTypeUnit, as is expected. llvm-svn: 198830
* llvm.experimental.stackmap: fix encoding of large constants.Andrew Trick2014-01-091-1/+4
| | | | | | | | | | In the stackmap format we advertise the constant field as signed. However, we were determining whether to promote to a 64-bit constant pool based on an unsigned comparison. This fix allows -1 to be encoded as a small constant. llvm-svn: 198816
* Conservatively handle multiple MMOs in MIsNeedChainEdgeHal Finkel2014-01-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | MIsNeedChainEdge, which is used by -enable-aa-sched-mi (AA in misched), had an llvm_unreachable when -enable-aa-sched-mi is enabled and we reach an instruction with multiple MMOs. Instead, return a conservative answer. This allows testing -enable-aa-sched-mi on x86. Also, this moves the check above the isUnsafeMemoryObject checks. isUnsafeMemoryObject is currently correct only for instructions with one MMO (as noted in the comment in isUnsafeMemoryObject): // We purposefully do no check for hasOneMemOperand() here // in hope to trigger an assert downstream in order to // finish implementation. The problem with this is that, had the candidate edge passed the "!MIa->mayStore() && !MIb->mayStore()" check, the hoped-for assert would never happen (which could, in theory, lead to incorrect behavior if one of these secondary MMOs was volatile, for example). llvm-svn: 198795
* Teach the DAGCombiner how to fold 'vselect' dag nodes accordingAndrea Di Biagio2014-01-081-0/+7
| | | | | | | | to the following two rules: 1) fold (vselect (build_vector AllOnes), A, B) -> A 2) fold (vselect (build_vector AllZeros), A, B) -> B llvm-svn: 198777
* [DAGCombiner] Factor duplicated rotate code into a separate functionRichard Sandiford2014-01-081-66/+70
| | | | | | No functional change intended. llvm-svn: 198768
* Move the llvm mangler to lib/IR.Rafael Espindola2014-01-078-8/+8
| | | | | | This makes it available to tools that don't link with target (like llvm-ar). llvm-svn: 198708
* Emit arange padding with a single directive.Benjamin Kramer2014-01-071-5/+3
| | | | llvm-svn: 198700
* Move the LLVM IR asm writer header files into the IR directory, as theyChandler Carruth2014-01-0710-10/+10
| | | | | | | | | | | | | | | | | are part of the core IR library in order to support dumping and other basic functionality. Rename the 'Assembly' include directory to 'AsmParser' to match the library name and the only functionality left their -- printing has been in the core IR library for quite some time. Update all of the #includes to match. All of this started because I wanted to have the layering in good shape before I started adding support for printing LLVM IR using the new pass infrastructure, and commandline support for the new pass infrastructure. llvm-svn: 198688
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-0712-16/+13
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Fix for PR18396: Assertion: MO->isDead "Cannot fold physreg def".Andrew Trick2014-01-071-4/+3
| | | | | | InlineSpiller::foldMemoryOperand needs to handle undef call operands. llvm-svn: 198679
* [AArch64 NEON] Fix invalid constant used in vselect condition.Kevin Qin2014-01-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is a wrong assumption that the vector element type and the type of each ConstantSDNode in the build_vector were the same. However, when promoting the integer operand of a legally typed build_vector, the operand type and the vector element type do not need to be the same (See method 'DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR' in LegalizeIntegerTypes.cpp). in AArch64 backend, the following dag sequence: C0: i1 = Constant<0> C1: i1 = Constant<-1> V: v8i1 = BUILD_VECTOR C1, C1, C0, C0, C0, C0, C0, C0 is type-legalized into: NewC0: i32 = Constant<0> NewC1: i32 = Constant<1> V: v8i8 = BUILD_VECTOR NewC1, NewC1, NewC0, NewC0, NewC0, NewC0, NewC0, NewC0 Forcing a getZeroExtend to VTBits to ensure that the new constant is correctly. llvm-svn: 198582
* Refactor function that checks that __builtin_returnaddress's argument is ↵Bill Wendling2014-01-061-0/+12
| | | | | | | | | constant. This moves the check up into the parent class so that all targets can use it without having to copy (and keep in sync) the same error message. llvm-svn: 198579
* Add a LLVM_DUMP_METHOD macro.Nico Weber2014-01-031-1/+1
| | | | | | | | | | | | | | The motivation is to mark dump methods as used in debug builds so that they can be called from lldb, but to not do so in release builds so that they can be dead-stripped. There's lots of potential follow-up work suggested in the thread "Should dump methods be LLVM_ATTRIBUTE_USED only in debug builds?" on cfe-dev, but everyone seems to agreen on this subset. Macro name chosen by fair coin toss. llvm-svn: 198456
* Make the llvm mangler depend only on DataLayout.Rafael Espindola2014-01-034-13/+21
| | | | | | | | | | | | | | Before this patch any program that wanted to know the final symbol name of a GlobalValue had to link with Target. This patch implements a compromise solution where the mangler uses DataLayout. This way, any tool that already links with Target (llc, clang) gets the exact behavior as before and new IR files can be mangled without linking with Target. With this patch the mangler is constructed with just a DataLayout and DataLayout is extended to include the information the Mangler needs. llvm-svn: 198438
* Revert "Revert "Debug Info: Type Units: Simplify type hashing using ↵David Blaikie2014-01-033-93/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | IR-provided unique names."" This reverts commit r198398, thus reapplying r198397. I had accidentally introduced an endianness issue when applying the hash to the type unit. Using support::ulittle64_t in the reinterpret_cast in addDwarfTypeUnitType fixes this issue. Original commit message: Debug Info: Type Units: Simplify type hashing using IR-provided unique names. What's good for LTO metadata size problems ought to be good for non-LTO debug info size too, so let's rely on the same uniqueness in both cases. If it's insufficient for non-LTO for whatever reason (since we now won't be uniquing CU-local types or any C types - but these are likely to not be the most significant contributors to type bloat) we should consider a frontend solution that'll help both LTO and non-LTO alike, rather than using DWARF-level DIE-hashing that only helps non-LTO debug info size. It's also much simpler this way and benefits C++ even more since we can deduplicate lexically separate definitions of the same C++ type since they have the same mangled name. llvm-svn: 198436
* Revert "Debug Info: Type Units: Simplify type hashing using IR-provided ↵David Blaikie2014-01-033-19/+93
| | | | | | | | | | | unique names." Reverting due to bot failure I won't have time to investigate until tomorrow. This reverts commit r198397. llvm-svn: 198398
* Debug Info: Type Units: Simplify type hashing using IR-provided unique names.David Blaikie2014-01-033-93/+19
| | | | | | | | | | | | | | | | What's good for LTO metadata size problems ought to be good for non-LTO debug info size too, so let's rely on the same uniqueness in both cases. If it's insufficient for non-LTO for whatever reason (since we now won't be uniquing CU-local types or any C types - but these are likely to not be the most significant contributors to type bloat) we should consider a frontend solution that'll help both LTO and non-LTO alike, rather than using DWARF-level DIE-hashing that only helps non-LTO debug info size. It's also much simpler this way and benefits C++ even more since we can deduplicate lexically separate definitions of the same C++ type since they have the same mangled name. llvm-svn: 198397
* 80-column.Eric Christopher2014-01-031-2/+4
| | | | llvm-svn: 198394
* Remove TextSectionSym as it is unused.Eric Christopher2014-01-031-4/+1
| | | | llvm-svn: 198393
* Revert "Reverting r193835 due to weirdness with Go..."David Blaikie2014-01-031-4/+8
| | | | | | | | | | The cgo problem was that it wants dwarf2 which doesn't support direct constant encoding of the location. So let's add support for dwarf2 encoding (using a location expression) of data member locations. This reverts commit r198385. llvm-svn: 198389
* Reverting r193835 due to weirdness with Go...David Blaikie2014-01-031-4/+5
| | | | | | | Apologies for the noise - we're seeing some Go failures with cgo interacting with Clang's debug info due to this change. llvm-svn: 198385
* [RegAlloc] Make tryInstructionSplit less aggressive.Quentin Colombet2014-01-023-14/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The greedy register allocator tries to split a live-range around each instruction where it is used or defined to relax the constraints on the entire live-range (this is a last chance split before falling back to spill). The goal is to have a big live-range that is unconstrained (i.e., that can use the largest legal register class) and several small local live-range that carry the constraints implied by each instruction. E.g., Let csti be the constraints on operation i. V1= op1 V1(cst1) op2 V1(cst2) V1 live-range is constrained on the intersection of cst1 and cst2. tryInstructionSplit relaxes those constraints by aggressively splitting each def/use point: V1= V2 = V1 V3 = V2 op1 V3(cst1) V4 = V2 op2 V4(cst2) Because of how the coalescer infrastructure works, each new variable (V3, V4) that is alive at the same time as V1 (or its copy, here V2) interfere with V1. Thus, we end up with an uncoalescable copy for each split point. To make tryInstructionSplit less aggressive, we check if the split point actually relaxes the constraints on the whole live-range. If it does not, we do not insert it. Indeed, it will not help the global allocation problem: - V1 will have the same constraints. - V1 will have the same interference + possibly the newly added split variable VS. - VS will produce an uncoalesceable copy if alive at the same time as V1. <rdar://problem/15570057> llvm-svn: 198369
* Remove comments on CU skeleton construction, they're probablyEric Christopher2014-01-021-4/+0
| | | | | | obvious. llvm-svn: 198361
* Elaborate on comment for skeleton CU construction.Eric Christopher2014-01-021-1/+4
| | | | llvm-svn: 198358
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