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* SelectionDAG: Fix a crash on inline asm when output register supports multipl...Tom Stellard2016-03-091-3/+7
* [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.Chad Rosier2016-03-093-8/+9
* Invoke DAG postprocessing in the post-RA schedulerKrzysztof Parzyszek2016-03-081-0/+2
* Revert r262599 "[X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EX...Hans Wennborg2016-03-081-18/+1
* Add DAG mutation interface to the DFA packetizerKrzysztof Parzyszek2016-03-081-0/+24
* Re-apply "SelectionDAG: Store SDNode operands in an ArrayRecycler"Justin Bogner2016-03-081-143/+118
* [MIR] Change the token name for '<' and '>' to be consitent with the LLVM IR ...Quentin Colombet2016-03-082-4/+4
* [GlobalISel] Introduce initializer method to support start/stop-after features.Quentin Colombet2016-03-084-25/+33
* [MIR] Teach the parser/printer that generic virtual registers do not need a r...Quentin Colombet2016-03-082-8/+20
* Revert "SelectionDAG: Store SDNode operands in an ArrayRecycler"Justin Bogner2016-03-081-118/+143
* [MIR] Teach the parser how to parse complex types of generic machine instruct...Quentin Colombet2016-03-083-14/+35
* SelectionDAG: Store SDNode operands in an ArrayRecyclerJustin Bogner2016-03-081-143/+118
* [MIR] Teach the printer how to print complex types for generic machine instru...Quentin Colombet2016-03-081-1/+2
* [MIR] Print the type of generic machine instructions.Quentin Colombet2016-03-081-0/+4
* [MIR] Teach the mir parser about types on generic machine instructions.Quentin Colombet2016-03-081-0/+33
* [MachineInstr] Get rid of some GlobalISel ifdefs.Quentin Colombet2016-03-071-5/+24
* [MIR] Teach the MIPrinter about size for generic virtual registers.Quentin Colombet2016-03-071-4/+12
* [MIR] Teach the parser how to handle the size of generic virtual registers.Quentin Colombet2016-03-071-8/+36
* [MachineRegisterInfo] Add a method to set the size of a virtual register a po...Quentin Colombet2016-03-071-0/+4
* [MachineRegisterInfo] Get rid of the global-isel ifdefs.Quentin Colombet2016-03-071-6/+3
* DAGCombiner: Check legality before creating extract_vector_eltMatt Arsenault2016-03-071-1/+3
* [CodeGen] Add space-optimized EmitMergeInputChains1_2 to the DAG isel matchin...Craig Topper2016-03-071-2/+3
* Add DAG mutation interface to the post-RA schedulerKrzysztof Parzyszek2016-03-052-6/+24
* RegisterCoalescer: Remap subregister lanemasks before exchanging operandsMatthias Braun2016-03-051-1/+6
* RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flagsMatthias Braun2016-03-051-20/+50
* RegisterPressure: Small cleanupMatthias Braun2016-03-051-11/+6
* [DAGCombine] Fix divrem combine not to assume div/rem type is simple.Michael Kuperstein2016-03-041-1/+4
* [ARM] Merging 64-bit divmod lib calls into oneRenato Golin2016-03-041-4/+8
* Change split code gen to use ThreadPoolTeresa Johnson2016-03-041-32/+40
* Make headers self-contained again.Benjamin Kramer2016-03-041-0/+1
* [X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREGSimon Pilgrim2016-03-031-1/+18
* Revert "[ARM] Merging 64-bit divmod lib calls into one"Renato Golin2016-03-031-2/+1
* [BranchFolding] Change function name related with merging MMOs. NFCJunmo Park2016-03-031-7/+5
* [MBP] Renaming a confusing variable and add clarifying commentsPhilip Reames2016-03-031-19/+24
* [MBP] Avoid placing random blocks between loop preheader and headerPhilip Reames2016-03-031-1/+2
* [X86] Don't give catch objects a displacement of zeroDavid Majnemer2016-03-032-24/+47
* [MBP] Remove overly verbose debug outputPhilip Reames2016-03-021-5/+2
* [MBP] Adjust debug output to be more focused and approachablePhilip Reames2016-03-021-18/+9
* [ARM] Merging 64-bit divmod lib calls into oneRenato Golin2016-03-021-1/+2
* SelectionDAG: Use correctly sized allocation functions for SDNodesJustin Bogner2016-03-021-116/+86
* DAGCombiner: Make sure an integer is being truncatedMatt Arsenault2016-03-021-1/+1
* DAGCombiner: Turn truncate of a bitcasted vector to an extractMatt Arsenault2016-03-011-0/+16
* Revert "[mips] Promote the result of SETCC nodes to GPR width."Vasileios Kalintiris2016-03-014-16/+6
* [NVPTX] Use different, convergent MIs for convergent calls.Justin Lebar2016-03-011-3/+5
* DAGCombiner: Turn extract of bitcasted integer into truncateMatt Arsenault2016-03-011-0/+8
* Refactor duplicated code for linking with pthread.Rafael Espindola2016-03-011-6/+1
* [mips] Promote the result of SETCC nodes to GPR width.Vasileios Kalintiris2016-03-014-6/+16
* LegalizeDAG: Use correct ptr type when expanding unaligned load/storeMatt Arsenault2016-03-011-14/+21
* [WinEH] Allocate the registration node before the catch objectsDavid Majnemer2016-03-012-0/+13
* Improve the debug output of DwarfDebug::buildLocationList().Adrian Prantl2016-02-292-1/+15
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