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* Fix typo in #include which revealed in the case-sensitive filesystem.Jakub Staszak2011-08-031-1/+1
| | | | llvm-svn: 136828
* Use MachineBranchProbabilityInfo in If-Conversion instead of its own heuristics.Jakub Staszak2011-08-031-29/+10
| | | | llvm-svn: 136826
* Add more constantness in BlockFrequencyInfo.Jakub Staszak2011-08-031-1/+2
| | | | llvm-svn: 136816
* New approach to r136737: insert the necessary fences for atomic ops in ↵Eli Friedman2011-08-032-8/+60
| | | | | | | | platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing. I think this completes the basic CodeGen for atomicrmw and cmpxchg. llvm-svn: 136813
* Some revisions to Devang's change r136759 for merged global debug info.Bob Wilson2011-08-031-23/+9
| | | | llvm-svn: 136802
* Use byte offset, instead of element number, to access merged global.Devang Patel2011-08-031-3/+21
| | | | llvm-svn: 136759
* Use the precomputed def presence in RAGreedy::calcSpillCost.Jakob Stoklund Olesen2011-08-021-11/+2
| | | | llvm-svn: 136742
* Inform SpillPlacement about blocks with defs.Jakob Stoklund Olesen2011-08-021-0/+1
| | | | | | This information is not used for anything yet. llvm-svn: 136741
* Rename {First,Last}Use to {First,Last}Instr.Jakob Stoklund Olesen2011-08-023-43/+45
| | | | | | | With a 'FirstDef' field right there, it is very confusing that FirstUse refers to an instruction that may be a def. llvm-svn: 136739
* Add a BlockInfo::FirstDef field.Jakob Stoklund Olesen2011-08-022-1/+15
| | | | | | | | | | | This is either an invalid SlotIndex, or valno->def for the first value defined inside the block. PHI values are not counted as defined inside the block. The FirstDef field will be used when estimating the cost of spilling around a block. llvm-svn: 136736
* Delete BlockInfo::LiveThrough. It wasn't used any more.Jakob Stoklund Olesen2011-08-022-4/+0
| | | | llvm-svn: 136735
* Extend the SpillPlacement interface with two new features.Jakob Stoklund Olesen2011-08-022-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | The PrefBoth constraint is used for blocks that ideally want a live-in value both on the stack and in a register. This would be used by a block that has a use before interference forces a spill. Secondly, add the ChangesValue flag to BlockConstraint. This tells SpillPlacement if a live-in value on the stack can be reused as a live-out stack value for free. If the block redefines the virtual register, a spill would be required for that. This extra information will be used by SpillPlacement to more accurately calculate spill costs when a value can exist both on the stack and in a register. The simplest example is a basic block that reads the virtual register, but doesn't change its value. Spilling around such a block requires a reload, but no spill in the block. The spiller already knows this, but the spill placer doesn't. That can sometimes lead to suboptimal regions. llvm-svn: 136731
* Don't create a ridiculous EXTRACT_ELEMENT. PR10563.Eli Friedman2011-08-021-0/+1
| | | | | | The testcase looks extremely fragile, so I'm adding an assertion which should catch any cases like this. llvm-svn: 136711
* Remove an unnecessary cast.Jay Foad2011-08-011-1/+1
| | | | llvm-svn: 136609
* Add the 'resume' instruction for the new EH rewrite.Bill Wendling2011-07-313-2/+9
| | | | | | | | | This adds the 'resume' instruction class, IR parsing, and bitcode reading and writing. The 'resume' instruction resumes propagation of an existing (in-flight) exception whose unwinding was interrupted with a 'landingpad' instruction (to be added later). llvm-svn: 136589
* Time the emission of debug values.Jakob Stoklund Olesen2011-07-311-1/+4
| | | | llvm-svn: 136584
* Revert r136528 "Enable compact region splitting by default."Jakob Stoklund Olesen2011-07-301-1/+1
| | | | | | | While this generally helped x86-64, there was some large regressions for i386. llvm-svn: 136571
* Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,Bill Wendling2011-07-305-141/+3
| | | | | | | r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444, r136445, r136446, r136253 pending review. llvm-svn: 136556
* Revert "Don't check liveness of unallocatable registers."Jakob Stoklund Olesen2011-07-302-11/+4
| | | | | | | The ARM target depends on CPSR liveness being tracked after register allocation. llvm-svn: 136548
* Don't check liveness of unallocatable registers.Jakob Stoklund Olesen2011-07-292-4/+11
| | | | | | | | | | | | This includes registers like EFLAGS and ST0-ST7. We don't check for liveness issues in the verifier and scavenger because registers will never be allocated from these classes. While in SSA form, we do care about the liveness of unallocatable unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for MachineDCE and MachineSinking. llvm-svn: 136541
* Check for multiple defs in the machine code verifier.Jakob Stoklund Olesen2011-07-291-0/+5
| | | | llvm-svn: 136535
* Add an isSSA() flag to MachineRegisterInfo.Jakob Stoklund Olesen2011-07-293-1/+8
| | | | | | | | | | | | | This flag is true from isel to register allocation when the machine function is required to be in SSA form. The TwoAddressInstructionPass and PHIElimination passes clear the flag. The SSA flag wil be used by the machine code verifier to check for SSA form, and eventually an assertion can enforce it in +Asserts builds. This will catch the common target error of creating machine code with multiple defs of a virtual register. llvm-svn: 136532
* Do not lose branch weights when lowering SwitchInst.Jakub Staszak2011-07-292-17/+52
| | | | llvm-svn: 136529
* Enable compact region splitting by default.Jakob Stoklund Olesen2011-07-291-1/+1
| | | | | | | This helps generate better code in functions with high register pressure. llvm-svn: 136528
* Remove unneeded const_cast.Jakub Staszak2011-07-291-2/+2
| | | | llvm-svn: 136506
* Fix a lot of typos, improve (but not necessarily fix) grammaros and reflow someNick Lewycky2011-07-292-24/+22
| | | | | | lines. No functionality change. llvm-svn: 136458
* Misc optimizer+codegen work for 'cmpxchg' and 'atomicrmw'. They appear to beEli Friedman2011-07-293-12/+65
| | | | | | | | | working on x86 (at least for trivial testcases); other architectures will need more work so that they actually emit the appropriate instructions for orderings stricter than 'monotonic'. (As far as I can tell, the ARM, PPC, Mips, and Alpha backends need such changes.) llvm-svn: 136457
* Use the pointer type size.Bill Wendling2011-07-291-1/+1
| | | | | | With this, we can now compile a simple EH program. llvm-svn: 136446
* And now something that compiles...Bill Wendling2011-07-291-1/+1
| | | | llvm-svn: 136445
* Make sure to sext or trunc the result from the register.Bill Wendling2011-07-291-2/+2
| | | | llvm-svn: 136444
* Rewrite the CMake build to use explicit dependencies between libraries,Chandler Carruth2011-07-293-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified in the same file that the library itself is created. This is more idiomatic for CMake builds, and also allows us to correctly specify dependencies that are missed due to bugs in the GenLibDeps perl script, or change from compiler to compiler. On Linux, this returns CMake to a place where it can relably rebuild several targets of LLVM. I have tried not to change the dependencies from the ones in the current auto-generated file. The only places I've really diverged are in places where I was seeing link failures, and added a dependency. The goal of this patch is not to start changing the dependencies, merely to move them into the correct location, and an explicit form that we can control and change when necessary. This also removes a serialization point in the build because we don't have to scan all the libraries before we begin building various tools. We no longer have a step of the build that regenerates a file inside the source tree. A few other associated cleanups fall out of this. This isn't really finished yet though. After talking to dgregor he urged switching to a single CMake macro to construct libraries with both sources and dependencies in the arguments. Migrating from the two macros to that style will be a follow-up patch. Also, llvm-config is still generated with GenLibDeps.pl, which means it still has slightly buggy dependencies. The internal CMake 'llvm-config-like' macro uses the correct explicitly specified dependencies however. A future patch will switch llvm-config generation (when using CMake) to be based on these deps as well. This may well break Windows. I'm getting a machine set up now to dig into any failures there. If anyone can chime in with problems they see or ideas of how to solve them for Windows, much appreciated. llvm-svn: 136433
* Visit the landingpad instruction.Bill Wendling2011-07-281-1/+35
| | | | | | | | | This generates the correct SDNodes for the landingpad instruction. It makes an assumption that the result of the landingpad instruction has at least two values. And that the first value is a pointer to the exception object and the second value is the "selector." llvm-svn: 136430
* Add the AddLandingPadInfo function.Bill Wendling2011-07-281-0/+34
| | | | | | | AddLandingPadInfo takes a landingpad instruction and grabs all of the information from it that it needs for EH table generation. llvm-svn: 136429
* LangRef and basic memory-representation/reading/writing for 'cmpxchg' andEli Friedman2011-07-282-0/+8
| | | | | | | | | | | | | | | | | | | | | 'atomicrmw' instructions, which allow representing all the current atomic rmw intrinsics. The allowed operands for these instructions are heavily restricted at the moment; we can probably loosen it a bit, but supporting general first-class types (where it makes sense) might get a bit complicated, given how SelectionDAG works. As an initial cut, these operations do not support specifying an alignment, but it would be possible to add if we think it's useful. Specifying an alignment lower than the natural alignment would be essentially impossible to support on anything other than x86, but specifying a greater alignment would be possible. I can't think of any useful optimizations which would use that information, but maybe someone else has ideas. Optimizer/codegen support coming soon. llvm-svn: 136404
* Handle REG_SEQUENCE with implicitly defined operands.Jakob Stoklund Olesen2011-07-281-0/+6
| | | | | | | | | | | | | Code like that would only be produced by bugpoint, but we should still handle it correctly. When a register is defined by a REG_SEQUENCE of undefs, the register itself is undef. Previously, we would create a register with uses but no defs. Fixes part of PR10520. llvm-svn: 136401
* Use ArrayRef instead of requiring an std::vector.Bill Wendling2011-07-281-4/+6
| | | | llvm-svn: 136396
* The personality function should be a Function* and not just a Value*.Bill Wendling2011-07-281-4/+6
| | | | llvm-svn: 136392
* Reverse order of RS_Split live ranges under -compact-regions.Jakob Stoklund Olesen2011-07-281-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two conflicting strategies in play: - Under high register pressure, we want to assign large live ranges first. Smaller live ranges are easier to place afterwards. - Live range splitting is guided by interference, so splitting should be deferred until interference is as realistic as possible. With the recent changes to the live range stages, and with compact regions enabled, it is less traumatic to split a live range too early. If some of the split products were too big, they can often be split again. By reversing the RS_Split order, we get this queue order: 1. Normal live ranges, large to small. 2. RS_Split live ranges, large to small. The large-to-small order improves RAGreedy's puzzle solving skills under high register pressure. It may cause a bit more iterated splitting, but we handle that better now. With this change, -compact-regions is mostly an improvement on SPEC. llvm-svn: 136388
* Initial code to convert ResumeInsts into calls to _Unwind_Resume.Bill Wendling2011-07-281-1/+57
| | | | | | This should be the only code necessary for DWARF EH prepare. llvm-svn: 136387
* CR fix: The ANY_EXTEND can be removed because the input and putput type must beNadav Rotem2011-07-281-2/+1
| | | | | | identical. llvm-svn: 136355
* Code generation for 'fence' instruction.Eli Friedman2011-07-273-1/+9
| | | | llvm-svn: 136283
* Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.Jakub Staszak2011-07-271-1/+1
| | | | llvm-svn: 136278
* Remove outdated FIXME comment.Devang Patel2011-07-271-1/+0
| | | | llvm-svn: 136275
* Merge the contents from exception-handling-rewrite to the mainline.Bill Wendling2011-07-273-2/+14
| | | | | | This adds the new instructions 'landingpad' and 'resume'. llvm-svn: 136253
* Explicitly cast narrowing conversions inside {}s that will become errors inJeffrey Yasskin2011-07-271-1/+2
| | | | | | C++0x. llvm-svn: 136211
* Revert r136156, which broke several buildbots.Dan Gohman2011-07-271-1/+14
| | | | llvm-svn: 136206
* It is quiet possible that inlined function body is split into multiple ↵Devang Patel2011-07-271-16/+41
| | | | | | chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry. llvm-svn: 136196
* Add support for multi-way live range splitting.Jakob Stoklund Olesen2011-07-261-64/+165
| | | | | | | | | | | | | | | | | | | | | When splitting global live ranges, it is now possible to split for multiple destination intervals at once. Previously, we only had the main and stack intervals. Each edge bundle is assigned to a split candidate, and splitAroundRegion will insert copies between the candidate intervals and the stack interval as needed. The multi-way splitting is used to split around compact regions when enabled with -compact-regions. The best candidate register still gets all the bundles it wants, but everything outside the main interval is first split around compact regions before we create single-block intervals. Compact region splitting still causes some regressions, so it is not enabled by default. llvm-svn: 136186
* Print out the MBB live-in registers.Jakob Stoklund Olesen2011-07-261-0/+4
| | | | llvm-svn: 136178
* Eliminate copies of undefined values during coalescing.Jakob Stoklund Olesen2011-07-262-0/+53
| | | | | | | | | | These copies would coalesce easily, but the resulting value would be defined by a deleted instruction. Now we also remove the undefined value number from the destination register. This fixes PR10503. llvm-svn: 136174
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