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* Rewrite the physreg part of findLastUseBefore().Jakob Stoklund Olesen2013-03-081-24/+36
| | | | | | | | | To find the last use of a register unit, start from the bottom and scan upwards until a user is found. <rdar://problem/13353090> llvm-svn: 176706
* Remove default from fully covered switch.Benjamin Kramer2013-03-081-2/+1
| | | | llvm-svn: 176703
* LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCCTom Stellard2013-03-081-1/+13
| | | | llvm-svn: 176695
* DAGCombiner: Use correct value type for checking legality of BR_CC v3Tom Stellard2013-03-081-1/+2
| | | | | | | | | | | | | LegalizeDAG.cpp uses the value of the comparison operands when checking the legality of BR_CC, so DAGCombiner should do the same. v2: - Expand more BR_CC value types for NVPTX v3: - Expand correct BR_CC value types for Hexagon, Mips, and XCore. llvm-svn: 176694
* Add -verify-misched option.Andrew Trick2013-03-081-0/+9
| | | | | | | | | | This verifies live intervals both before and after scheduling. It's useful for anyone hacking on live interval update. Note that we don't yet pass verification all the time. We don't yet handle updating nonallocatable live intervals perfectly. llvm-svn: 176685
* Revert r176154 in favor of a better approach.Bill Wendling2013-03-082-9/+11
| | | | | | | | | | | | | | | | | | | Code generation makes some basic assumptions about the IR it's been given. In particular, if there is only one 'invoke' in the function, then that invoke won't be going away. However, with the advent of the `llvm.donothing' intrinsic, those invokes may go away. If all of them go away, the landing pad no longer has any users. This confuses the back-end, which asserts. This happens with SjLj exceptions, because that's the model that modifies the IR based on there being invokes, etc. in the function. Remove any invokes of `llvm.donothing' during SjLj EH preparation. This will give us a CFG that the back-end won't be confused about. If all of the invokes in a function are removed, then the SjLj EH prepare pass won't insert the bogus code the relies upon the invokes being there. <rdar://problem/13228754&13316637> llvm-svn: 176677
* Add a getPassName() method.Jakob Stoklund Olesen2013-03-071-0/+1
| | | | llvm-svn: 176669
* Rename isEarlierInSameTrace to isUsefulDominator.Jakob Stoklund Olesen2013-03-071-2/+2
| | | | | | | | | | | | | | In very rare cases caused by irreducible control flow, the dominating block can have the same trace head without actually being part of the trace. As long as such a dominator still has valid instruction depths, it is OK to use it for computing instruction depths. Rename the function to avoid lying, and add a check that instruction depths are computed for the dominator. llvm-svn: 176668
* [fast-isel] Seriously, add support for the expect intrinsic.Chad Rosier2013-03-071-3/+3
| | | | | | rdar://13370942 llvm-svn: 176659
* [fast-isel] Add support for the expect intrinsic.Chad Rosier2013-03-071-0/+5
| | | | | | rdar://13370942 llvm-svn: 176649
* ArrayRefize some code. No functionality change.Benjamin Kramer2013-03-072-5/+3
| | | | llvm-svn: 176648
* pre-RA-sched debug-only fixAndrew Trick2013-03-071-2/+4
| | | | llvm-svn: 176638
* pre-RA-sched assertion fix. This bug was exposed by r176037.Andrew Trick2013-03-071-3/+0
| | | | | | | | | | | | | rdar:13370002 [pre-RA-sched] assertion: released too many times I tracked this down to an earlier hack that is no longer applicable and interfered with normal scheduler logic. With the changes in r176037, it was causing an instruction to be scheduled multiple times. I have an external test case that I tried hard to reduce and failed. I can't even reproduce with llc. llvm-svn: 176636
* No need to go through int64 and APInt when generating a new constant.Nadav Rotem2013-03-071-3/+3
| | | | llvm-svn: 176615
* SDAG: Handle scalarizing an extend of a <1 x iN> vector.Jim Grosbach2013-03-072-0/+21
| | | | | | | | | Just scalarize the element and rebuild a vector of the result type from that. rdar://13281568 llvm-svn: 176614
* Debug Info: store the files and directories for each compile unit.Manman Ren2013-03-073-18/+39
| | | | | | | | | | | | | | We now emit a line table for each compile unit. To reduce the prologue size of each line table, the files and directories used by each compile unit are stored in std::map<unsigned, std::vector< > > instead of std::vector< >. The prologue for a lto'ed image can be as big as 93K. Duplicating 93K for each compile unit causes a huge increase of debug info. With this patch, each prologue will only emit the files required by the compile unit. rdar://problem/13342023 llvm-svn: 176605
* Remove unused #includes.Bill Wendling2013-03-059-9/+0
| | | | llvm-svn: 176467
* Remove duplicate line and move another closer to its actual useEli Bendersky2013-03-011-3/+1
| | | | llvm-svn: 176391
* Set properties for f128 type.Akira Hatanaka2013-03-012-17/+71
| | | | llvm-svn: 176378
* Generate an error message instead of asserting or segfaulting when we can'tChad Rosier2013-03-011-0/+1
| | | | | | | handle indirect register inputs. rdar://13322011 llvm-svn: 176367
* Fix PR10475Michael Liao2013-03-014-13/+25
| | | | | | | | | | | | | | - ISD::SHL/SRL/SRA must have either both scalar or both vector operands but TLI.getShiftAmountTy() so far only return scalar type. As a result, backend logic assuming that breaks. - Rename the original TLI.getShiftAmountTy() to TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to return target-specificed scalar type or the same vector type as the 1st operand. - Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar type. llvm-svn: 176364
* Scheduler diagnostics. Print the register name.Andrew Trick2013-03-011-0/+2
| | | | llvm-svn: 176316
* Instructions schedulers should report correct height/depth.Andrew Trick2013-03-011-2/+2
| | | | | | | | | | | | | We avoided computing DAG height/depth during Node printing because it shouldn't depend on an otherwise valid DAG. But this has become far too annoying for the common case of a valid DAG where we want to see valid values. If doing the computation on-the-fly turns out to be a problem in practice, then I'll add a mode to the diagnostics to only force it when we're likely to have a valid DAG, otherwise explicitly print INVALID instead of bogus numbers. For now, just go for it all the time. llvm-svn: 176314
* A small refactoring + adding comments.Eli Bendersky2013-02-282-10/+5
| | | | | | | | | | | SelectionDAGIsel::LowerArguments needs a function, not a basic block. So it makes sense to pass it the function instead of extracting a basic-block from the function and then tossing it. This is also more self-documenting (functions have arguments, BBs don't). In addition, added comments to a couple of Select* methods. llvm-svn: 176305
* Cost model support for lowered math builtins.Benjamin Kramer2013-02-281-12/+67
| | | | | | | | | | We make the cost for calling libm functions extremely high as emitting the calls is expensive and causes spills (on x86) so performance suffers. We still vectorize important calls like ceilf and friends on SSE4.1. and fabs. Differential Revision: http://llvm-reviews.chandlerc.com/D466 llvm-svn: 176287
* Put some per-instruction statistics of fast isel under NDEBUG, together withEli Bendersky2013-02-281-3/+5
| | | | | | other per-instruction statistics. llvm-svn: 176273
* Remove unnecessary check against isGlobalVariable. We check itEric Christopher2013-02-271-1/+1
| | | | | | a few lines above. llvm-svn: 176224
* Rework comment slightly and fix a few typos.Eric Christopher2013-02-271-8/+5
| | | | llvm-svn: 176223
* Remove unnecessary cast to void.Eric Christopher2013-02-271-1/+0
| | | | llvm-svn: 176222
* Debug Info: for static member variables, always put AT_MIPS_linkage_name to theManman Ren2013-02-271-5/+12
| | | | | | | | | | | | definition DIE (TAG_variable), and put AT_MIPS_linkage_name to TAG_member when DarwinGDBCompat is true. Darwin GDB needs AT_MIPS_linkage_name at both places to work. Follow-up patch to r176143. rdar://problem/13291234 llvm-svn: 176220
* Silence the unused variable warning. Nadav Rotem2013-02-271-5/+7
| | | | llvm-svn: 176218
* The FastISEL should be fast. But when we record statistics we use atomic ↵Nadav Rotem2013-02-271-9/+10
| | | | | | | | operations to increment the counters. This patch disables the counters on non-debug builds. This reduces the runtime of SelectionDAGISel::SelectCodeCommon by ~5%. llvm-svn: 176214
* Reverted: r176136 - Have a way for a target to opt-out of target-independent ↵Michael Ilseman2013-02-271-1/+1
| | | | | | fast isel llvm-svn: 176204
* SelectionDAG: If llvm.donothing has a landingpad, we should clearManman Ren2013-02-271-0/+7
| | | | | | | | | CurrentCallSite to avoid an assertion failure: assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!"); rdar://problem/13228754 llvm-svn: 176154
* Debug Info: for static member variables, add AT_MIPS_linkage_name to theManman Ren2013-02-271-1/+7
| | | | | | | | | | | | definition DIE, to make old GDB happy. We have a regression for old GDB when Clang uses DW_TAG_member to declare static members inside a class, instead of DW_TAG_variable. This patch will fix this regression. rdar://problem/13291234 llvm-svn: 176143
* Have a way for a target to opt-out of target-independent fast iselMichael Ilseman2013-02-261-1/+1
| | | | llvm-svn: 176136
* Revert r176120 as it caused a failure at static-member.cppManman Ren2013-02-261-4/+1
| | | | llvm-svn: 176129
* Debug Info: for static member variables, move AT_MIPS_linkage_name fromManman Ren2013-02-261-1/+4
| | | | | | | | | | | TAG_member inside a class to the specification DIE. Having AT_MIPS_linkage_name on TAG_member caused old gdb (GNU 6.3.50) to error out. Also gcc 4.7 has AT_MIPS_linkage_name on the specification DIE. rdar://problem/13291234 llvm-svn: 176120
* Fix wording.Chad Rosier2013-02-251-3/+4
| | | | llvm-svn: 176055
* [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 orChad Rosier2013-02-251-0/+10
| | | | | | | | | | fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. llvm-svn: 176052
* pre-RA-sched fix: only reevaluate physreg interferences when necessary.Andrew Trick2013-02-251-33/+61
| | | | | | Fixes rdar:13279013: scheduler was blowing up on select instructions. llvm-svn: 176037
* 'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay2013-02-251-2/+2
| | | | llvm-svn: 176031
* Fix spelling noticed by Duncan.Chandler Carruth2013-02-251-3/+3
| | | | llvm-svn: 176023
* Fix the root cause of PR15348 by correctly handling alignment 0 onChandler Carruth2013-02-252-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. llvm-svn: 176022
* Add a use of an otherwise unused variable to remove a warning in non-AssertsCameron Zwarich2013-02-241-0/+1
| | | | | | builds. llvm-svn: 175981
* TwoAddressInstructionPass::tryInstructionTransform() only potentially returnsCameron Zwarich2013-02-241-5/+4
| | | | | | | true when shouldOnlyCommute is false, so we can remove code that checks otherwise. llvm-svn: 175980
* TwoAddrInstructionPass::tryInstructionTransform() has a case where it callsCameron Zwarich2013-02-241-5/+10
| | | | | | | | | | | | | | | | itself recursively with a new instruction that has not been finalized, in order to determine whether to keep the instruction. On 'make check' and test-suite the only cases where the recursive invocation made any transformations were simple instruction commutations, so I am restricting the recursive invocation to do only this. The other cases wouldn't work correctly when updating LiveIntervals, since the new instructions don't have slot indices and LiveIntervals hasn't yet been updated. If the other transformations were actually triggering in any test case it would be possible to support it with a lot of effort, but since they don't it's not worth it. llvm-svn: 175979
* TargetInstrInfo::commuteInstruction() doesn't actually return a new instructionCameron Zwarich2013-02-231-13/+3
| | | | | | | unless it was requested to with an optional parameter that defaults to false, so we don't need to handle that case in TwoAddressInstructionPass. llvm-svn: 175974
* Make some fixes for LiveInterval repair with debug info. Debug valueCameron Zwarich2013-02-232-2/+6
| | | | | | MachineInstrs don't have a slot index. llvm-svn: 175961
* Fix a bug with the LiveIntervals updating in the two-address pass found byCameron Zwarich2013-02-231-1/+1
| | | | | | running ASCI_Purple/SMG2000 in the test-suite. llvm-svn: 175957
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