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* Fixed SelectionDAGBuilder.h C++ filetype declaration to use the canonical ↵Michael Gottesman2013-08-121-1/+1
| | | | | | C++ instead of c++. llvm-svn: 188203
* Fixed another place in CodeGen where we had a typo in our editor C++ ↵Michael Gottesman2013-08-121-1/+1
| | | | | | filetype declaration. llvm-svn: 188202
* [branchfolding] Fix typo in C++ editor declaration.Michael Gottesman2013-08-121-1/+1
| | | | llvm-svn: 188201
* Move the addition of the dwo_id as late as possible after everythingEric Christopher2013-08-121-21/+24
| | | | | | has been finalized except for sizes and offsets. Update test accordingly. llvm-svn: 188199
* [stackprotector] Add in the stackprotector libcall.Michael Gottesman2013-08-121-0/+7
| | | | | | | We support this libcall on all platforms except for OpenBSD (See lib/Codegen/StackProtector.cpp). llvm-svn: 188193
* [SystemZ] Use CLC and IPM to implement memcmpRichard Sandiford2013-08-121-0/+21
| | | | | | | For now this is restricted to fixed-length comparisons with a length in the range [1, 256], as for memcpy() and MVC. llvm-svn: 188163
* Allow compatible extension attributes for tail callsTim Northover2013-08-121-14/+36
| | | | | | | | If the tail-callee and caller give the same bits via the same signext/zeroext attribute then a tail-call should be allowed, since the extension has already been done by the callee. llvm-svn: 188159
* [stackprotector] Simplify SP Pass so that we emit different fail basic ↵Michael Gottesman2013-08-091-10/+10
| | | | | | | | | | | | | blocks for each fail condition. This patch decouples the stack protector pass so that we can support stack protector implementations that do not use the IR level generated stack protector fail basic block. No codesize increase is caused by this change since the MI level tail merge pass properly merges together the fail condition blocks (see the updated test). llvm-svn: 188105
* Make helper static and fix formatting.Benjamin Kramer2013-08-091-5/+4
| | | | llvm-svn: 188074
* Change asserts at the top of getVectorShuffle to check that LHS and RHS have ↵Craig Topper2013-08-091-6/+3
| | | | | | | | | | the same type as the result. Previously the asserts were only checking that RHS and LHS were the same type and had the same element type as the result. All downstream code for ISD::VECTOR_SHUFFLE requires the types to be the same. Also removed one unnecessary check of matched element counts that was present in the code. llvm-svn: 188051
* Set ISD::FROUND to Expand by default for all typesHal Finkel2013-08-091-4/+3
| | | | | | | | | | | For most libm ISD nodes, TargetLoweringBase::initActions sets the default scalar-type action to Expand, and leaves the vector-type action default as Legal. This is not appropriate for the new ISD::FROUND node (which no backend but PowerPC handles explicitly). Fixes PR16842. llvm-svn: 188048
* Update the CMake build files.Eric Christopher2013-08-081-0/+1
| | | | llvm-svn: 188030
* Move hash computation code into a separate class and file.Eric Christopher2013-08-083-99/+191
| | | | | | No functional change intended. llvm-svn: 188028
* Revert "Reapply r185872 now that the address sanitizer has been changed to ↵Arnold Schwaighofer2013-08-081-6/+6
| | | | | | | | support this." This reverts commit r187939. It broke an O0 build of a spec benchmark. llvm-svn: 188012
* For DW_TAG_template_type_parameter the actual passed in type couldEric Christopher2013-08-081-1/+3
| | | | | | | be void and therefore not have a type entry. Only add the type if it is non-void and provide a testcase. llvm-svn: 187966
* Remove AllUndef check from one of the loops in getVectorShuffle. It was ↵Craig Topper2013-08-081-5/+1
| | | | | | already handled by the 'AllLHS && AllRHS' check after the previous loop. llvm-svn: 187965
* The conversion to bool is fine here, no need to check isType.Eric Christopher2013-08-081-1/+1
| | | | llvm-svn: 187964
* Make sure that if we're going to attempt to add a type to a DIE thatEric Christopher2013-08-081-10/+16
| | | | | | | | | | | | the type exists. Fix up cases where we weren't checking for optional types and add an assert to addType to make sure we catch this in the future. Fix up a testcase that was using the tag for DW_TAG_array_type when it meant DW_TAG_enumeration_type. llvm-svn: 187963
* Change variable name and reflow formatting.Eric Christopher2013-08-081-10/+10
| | | | llvm-svn: 187962
* Optimize mask generation for one of the DAG combiner shufflevector cases.Craig Topper2013-08-081-3/+3
| | | | llvm-svn: 187961
* Revert "coff also doesn't have a ReadOnlySection yet, (!)"David Majnemer2013-08-081-0/+3
| | | | | | | | | | | This reverts commit r77814. We were sticking global constants in the .data section instead of in the .rdata section when emitting for COFF. This fixes PR16831. llvm-svn: 187956
* Reflow for loop.Eric Christopher2013-08-081-2/+2
| | | | llvm-svn: 187954
* Be more rigorous about the sizes of forms and attributes.Eric Christopher2013-08-086-81/+81
| | | | llvm-svn: 187953
* Reapply r185872 now that the address sanitizer has been changed to support this.Bill Wendling2013-08-071-6/+6
| | | | | | | | | | | | | | | | | | | | | Original commit message: Stop emitting weak symbols into the "coal" sections. The Mach-O linker has been able to support the weak-def bit on any symbol for quite a while now. The compiler however continued to place these symbols into a "coal" section, which required the linker to map them back to the base section name. Replace the sections like this: __TEXT/__textcoal_nt instead use __TEXT/__text __TEXT/__const_coal instead use __TEXT/__const __DATA/__datacoal_nt instead use __DATA/__data <rdar://problem/14265330> llvm-svn: 187939
* Add ISD::FROUND for libm round()Hal Finkel2013-08-079-1/+59
| | | | | | | | | | | | | | | All libm floating-point rounding functions, except for round(), had their own ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm adding ISD::FROUND so that round() can be custom lowered as well. For the most part, this is straightforward. I've added an intrinsic and a matching ISD node just like those for nearbyint() and friends. The SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed fround). This will be used by the PowerPC backend in a follow-up commit. llvm-svn: 187926
* Using the integrated assembler we'd fail to change section to theEric Christopher2013-08-071-2/+3
| | | | | | | | | .tbss section for zerofill thread locals. Make sure we do this before emitting the zerofills. Fixes PR15972. llvm-svn: 187913
* Confusing comment typo.Andrew Trick2013-08-071-1/+1
| | | | llvm-svn: 187895
* Remove some parens. No functional change.Eric Christopher2013-08-071-4/+4
| | | | llvm-svn: 187872
* Add a way to grab a particular attribute out of a DIE.Eric Christopher2013-08-073-14/+22
| | | | | | | Use it when we're looking for a string in particular. Update comments as well. llvm-svn: 187844
* Move somewhat messy conditional out of line.Eric Christopher2013-08-071-7/+11
| | | | | | No functional change. llvm-svn: 187843
* LoopVectorize: Allow vectorization of loops with lifetime markersArnold Schwaighofer2013-08-061-0/+3
| | | | | | Patch by Marc Jessome! llvm-svn: 187825
* Refactor isInTailCallPosition handlingTim Northover2013-08-061-134/+287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change came about primarily because of two issues in the existing code. Niether of: define i64 @test1(i64 %val) { %in = trunc i64 %val to i32 tail call i32 @ret32(i32 returned %in) ret i64 %val } define i64 @test2(i64 %val) { tail call i32 @ret32(i32 returned undef) ret i32 42 } should be tail calls, and the function sameNoopInput is responsible. The main problem is that it is completely symmetric in the "tail call" and "ret" value, but in reality different things are allowed on each side. For these cases: 1. Any truncation should lead to a larger value being generated by "tail call" than needed by "ret". 2. Undef should only be allowed as a source for ret, not as a result of the call. Along the way I noticed that a mismatch between what this function treats as a valid truncation and what the backends see can lead to invalid calls as well (see x86-32 test case). This patch refactors the code so that instead of being based primarily on values which it recurses into when necessary, it starts by inspecting the type and considers each fundamental slot that the backend will see in turn. For example, given a pathological function that returned {{}, {{}, i32, {}}, i32} we would consider each "real" i32 in turn, and ask if it passes through unchanged. This is much closer to what the backend sees as a result of ComputeValueVTs. Aside from the bug fixes, this eliminates the recursion that's going on and, I believe, makes the bulk of the code significantly easier to understand. The trade-off is the nasty iterators needed to find the real types inside a returned value. llvm-svn: 187787
* AsmPrinter/CMakeLists.txt: Add explicit dependency to intrinsics_gen here.NAKAMURA Takumi2013-08-061-0/+2
| | | | llvm-svn: 187778
* Recommit previous cleanup with a fix for c++98 ambiguity.Eric Christopher2013-08-051-5/+2
| | | | llvm-svn: 187752
* TargetLowering: Add getVectorIdxTy() function v2Tom Stellard2013-08-058-77/+98
| | | | | | | | | | | | | | | | | | | | | This virtual function can be implemented by targets to specify the type to use for the index operand of INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT, INSERT_SUBVECTOR, EXTRACT_SUBVECTOR. The default implementation returns the result from TargetLowering::getPointerTy() The previous code was using TargetLowering::getPointerTy() for vector indices, because this is guaranteed to be legal on all targets. However, using TargetLowering::getPointerTy() can be a problem for targets with pointer sizes that differ across address spaces. On such targets, when vectors need to be loaded or stored to an address space other than the default 'zero' address space (which is the address space assumed by TargetLowering::getPointerTy()), having an index that is a different size than the pointer can lead to inefficient pointer calculations, (e.g. 64-bit adds for a 32-bit address space). There is no intended functionality change with this patch. llvm-svn: 187748
* Revert "Use existing builtin hashing functions to make this routine more"Eric Christopher2013-08-051-2/+5
| | | | | | This reverts commit r187745. llvm-svn: 187747
* Use existing builtin hashing functions to make this routine moreEric Christopher2013-08-051-5/+2
| | | | | | simple. llvm-svn: 187745
* Change parent hashing algorithm to be non-recursive and elaborateEric Christopher2013-08-051-20/+32
| | | | | | greatly on many comments in the code. llvm-svn: 187742
* Don't leak passes if added outside of the area determined by Started/Stopped ↵Benjamin Kramer2013-08-051-0/+2
| | | | | | flags. llvm-svn: 187722
* Bugfix for making the DWARF debug strings and labels to code emitted as ↵Carlo Kok2013-08-021-0/+4
| | | | | | secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB (with fix for 64bits msvc) llvm-svn: 187656
* Revert r187597, "Bugfix for making the DWARF debug strings and labels to ↵NAKAMURA Takumi2013-08-021-4/+0
| | | | | | | | code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB." It broke x86_64-win32 builder in llvm/test/DebugInfo. llvm-svn: 187642
* Use function attributes to indicate that we don't want to realign the stack.Bill Wendling2013-08-011-1/+2
| | | | | | | | Function attributes are the future! So just query whether we want to realign the stack directly from the function instead of through a random target options structure. llvm-svn: 187618
* DebugInfo: Emit definitions for types with no members.David Blaikie2013-08-011-7/+3
| | | | | | The absence of members was a poor/incorrect proxy for "is definition". llvm-svn: 187607
* Bugfix for making the DWARF debug strings and labels to code emitted as ↵Carlo Kok2013-08-011-0/+4
| | | | | | | | secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB. fixes Bug 16249 - LLVM generates broken debug info on Windows llvm-svn: 187597
* Fix crashing on invalid inline asm with matching constraints.Eric Christopher2013-07-311-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For a testcase like the following: typedef unsigned long uint64_t; typedef struct { uint64_t lo; uint64_t hi; } blob128_t; void add_128_to_128(const blob128_t *in, blob128_t *res) { asm ("PAND %1, %0" : "+Q"(*res) : "Q"(*in)); } where we'll fail to allocate the register for the output constraint, our matching input constraint will not find a register to match, and could try to search past the end of the current operands array. On the idea that we'd like to attempt to keep compilation going to find more errors in the module, change the error cases when we're visiting inline asm IR to return immediately and avoid trying to create a node in the DAG. This leaves us with only a single error message per inline asm instruction, but allows us to safely keep going in the general case. llvm-svn: 187470
* Reflow this to be easier to read.Eric Christopher2013-07-301-7/+5
| | | | llvm-svn: 187459
* Down-scale slot index distance to save bits.Andrew Trick2013-07-301-1/+1
| | | | llvm-svn: 187438
* MI Sched: Track live-thru registers.Andrew Trick2013-07-302-12/+67
| | | | | | | | | | | When registers must be live throughout the scheduling region, increase the limit for the register class. Once we exceed the original limit, they will be spilled, and there's no point further reducing pressure. This isn't a perfect heuristics but avoids a situation where the scheduler could become trapped by trying to achieve the impossible. llvm-svn: 187436
* MI Sched fix: assert "Disconnected LRG within the scheduling region."Andrew Trick2013-07-301-0/+6
| | | | llvm-svn: 187435
* [DAGCombiner] insert_vector_elt: Avoid building a vector twice.Quentin Colombet2013-07-301-1/+3
| | | | | | | | | | | | | | | | This patch prevents the following combine when the input vector is used more than once. insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx => build_vector elt0, ..., NewEltIdx, ..., eltN The reasons are: - Building a vector may be expensive, so try to reuse the existing part of a vector instead of creating a new one (think big vectors). - elt0 to eltN now have two users instead of one. This may prevent some other optimizations. llvm-svn: 187396
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