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* [GlobalISel] Add a type to MachineInstr.Quentin Colombet2016-02-111-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | We actually need that information only for generic instructions, therefore it would be nice not to have to pay the extra memory consumption for all instructions. Especially because a typed non-generic instruction does not make sense. The question is then, is it possible to have that information in a union or something? My initial thought was that we could have a derived class GenericMachineInstr with additional information, but in practice it makes little to no sense since generic MachineInstrs are likely turned into non-generic ones by just switching the opcode. In other words, we don't want to go through the process of creating a new, non-generic MachineInstr, object each time we do this switch. The memory benefit probably is not worth the extra compile time. Another option would be to keep the type of the MachineInstr in a side table. This would induce an extra indirection though. Anyway, I will file a PR to discuss about it and remember we need to come back to it at some point. llvm-svn: 260558
* [GlobalISel] Add a hook in TargetConfigPass to run GlobalISel.Quentin Colombet2016-02-111-2/+14
| | | | llvm-svn: 260553
* [GlobalISel][IRTranslator] Change the ownership of the MIRBuilder field.Quentin Colombet2016-02-111-10/+8
| | | | llvm-svn: 260551
* [GlobalISel][IRTranslator] Fix a typo in assert.Quentin Colombet2016-02-111-1/+1
| | | | llvm-svn: 260550
* [GlobalISel][IRTranslator] Teach the pass how to translate Add instructions.Quentin Colombet2016-02-111-1/+44
| | | | llvm-svn: 260549
* [GlobalISel] Add a MachineIRBuilder class.Quentin Colombet2016-02-112-0/+62
| | | | | | | Helper class to build machine instrs. This is a higher abstraction than MachineInstrBuilder. llvm-svn: 260547
* Drop the hidden visibility from DebugHandlerBase for now.Benjamin Kramer2016-02-111-1/+1
| | | | | | | | | | | | If a class has hidden visibility all derived classes and all classes that have it as a member must have hidden visibility too. That may be fixable here but requires changes to quite a lot of debug info classes. This is also one of the things that GCC enforces aggressively while clang ignores it, making testing more annoying than necessary. llvm-svn: 260529
* [GlobalISel][MachineRegisterInfo] Add a method to create generic vregs.Quentin Colombet2016-02-112-0/+21
| | | | | | | | | | | | | | | | For now, generic virtual registers will not have a register class. We may want to change that. For instance, if we want to use all the methods from TargetRegisterInfo with generic virtual registers, we need to either have some sort of generic register classes that do what we want, or teach those methods how to deal with nullptr register class. Although the latter seems easy enough to do, we may still want to differenciate generic register classes from nullptr to catch cases where nullptr gets introduced by a bug of some sort. Anyway, I will file a PR to keep track of that. llvm-svn: 260474
* [GlobalISel] Remember the size of generic virtual registersQuentin Colombet2016-02-102-1/+17
| | | | llvm-svn: 260468
* [GlobalISel] More detailed skeleton for the IRTranslator.Quentin Colombet2016-02-101-2/+31
| | | | llvm-svn: 260456
* [codeview] Describe int local variables using .cv_def_rangeReid Kleckner2016-02-107-288/+498
| | | | | | | | | | | | | | | | Summary: Refactor common value, scope, and label tracking logic out of DwarfDebug into a common base class called DebugHandlerBase. Update an old LLVM IR test case to avoid an assertion in LexicalScopes. Reviewers: dblaikie, majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16931 llvm-svn: 260432
* [CodeGen] Prefer "if (SDValue R = ...)" to "if (R.getNode())". NFCI.Ahmed Bougacha2016-02-094-50/+34
| | | | llvm-svn: 260316
* [SelectionDAG] make getMemBasePlusOffset() accessible; NFCISanjay Patel2016-02-091-12/+9
| | | | | | | | | I reinvented this functionality in http://reviews.llvm.org/D16828 because it was hidden away as a static function. The changes in x86 are not based on a complete audit. I suspect there are other possible uses there, and there are almost certainly more potential users in other targets. llvm-svn: 260295
* [regalloc][WinEH] Do not mark intervals as not spillable if they contain a ↵Andrew Kaylor2016-02-082-2/+39
| | | | | | | | regmask Differential Revision: http://reviews.llvm.org/D16831 llvm-svn: 260164
* [X86] Don't zero/sign-extend i1, i8, or i16 return values to 32 bits (PR22532)Hans Wennborg2016-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | This matches GCC and MSVC's behaviour, and saves on code size. We were already not extending i1 return values on x86_64 after r127766. This takes that patch further by applying it to x86 target as well, and also for i8 and i16. The ABI docs have been unclear about the required behaviour here. The new i386 psABI [1] clearly states (Table 2.4, page 14) that i1, i8, and i16 return vales do not need to be extended beyond 8 bits. The x86_64 ABI doc is being updated to say the same [2]. Differential Revision: http://reviews.llvm.org/D16907 [1]. https://01.org/sites/default/files/file_attach/intel386-psabi-1.0.pdf [2]. https://groups.google.com/d/msg/x86-64-abi/E8O33onbnGQ/_RFWw_ixDQAJ llvm-svn: 260133
* SelectionDAG: Lower some range metadata to AssertZextMatt Arsenault2016-02-082-3/+45
| | | | | | | | | | If a range has a lower bound of 0, add an AssertZext from the nearest floor power of two. This allows operations with some workitem intrinsics with known maximum ranges to use fast 24-bit multiplies. llvm-svn: 260109
* [StatepointLower] Use None instead of Optional<int>()Sanjoy Das2016-02-051-5/+5
| | | | llvm-svn: 259956
* Some stackslots are allocated to vregs which have no real reference.Wei Mi2016-02-051-7/+9
| | | | | | | | | | | | | | LiveRangeEdit::eliminateDeadDef is used to remove dead define instructions after rematerialization. To remove a VNI for a vreg from its LiveInterval, LiveIntervals::removeVRegDefAt is used. However, after non-PHI VNIs are all removed, PHI VNI are still left in the LiveInterval. Such unused vregs will be kept in RegsToSpill[] at the end of InlineSpiller::reMaterializeAll and spiller will allocate stackslot for them. The fix is to get rid of unused reg by checking whether it has non-dbg reference instead of whether it has non-empty interval. llvm-svn: 259895
* Fix printing of f16 machine operandsMatt Arsenault2016-02-051-2/+8
| | | | | | | | | | | | | Only single and double FP immediates are correctly printed by MachineInstr::print() during debug output. Half float type goes to APFloat::convertToDouble() and hits assertion it is not a double semantics. This diff prints half machine operands correctly. This cannot currently be hit by any in-tree target. Patch by Stanislav Mekhanoshin llvm-svn: 259857
* Enable the %s modifier in inline asm template stringNemanja Ivanovic2016-02-041-0/+5
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D16847 There are some files in glibc that use the output operand modifier even though it was deprecated in GCC. This patch just adds support for it to prevent issues with such files. llvm-svn: 259798
* [Power PC] softening long double typePetar Jovanovic2016-02-042-26/+71
| | | | | | | | | | | This patch implements softening of long double type (ppcf128) on ppc32 architecture and enables operations for this type for soft float. Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D15811 llvm-svn: 259791
* [ScheduleDagInstrs] Improved commentsJonas Paulsson2016-02-041-9/+9
| | | | llvm-svn: 259783
* rangify; NFCISanjay Patel2016-02-031-159/+129
| | | | llvm-svn: 259722
* [codeview] Remove EmitLabelDiff in favor emitAbsoluteSymbolDiffReid Kleckner2016-02-031-18/+4
| | | | llvm-svn: 259700
* [codeview] Use the MCStreamer interface directly instead of AsmPrinterReid Kleckner2016-02-032-101/+100
| | | | | | | | | This is mostly about having shorter lines and standardizing on one interface, but it also avoids some needless indirection. No functional change. llvm-svn: 259697
* [DWARFDebug] Fix another case of overlapping rangesKeno Fischer2016-02-031-13/+42
| | | | | | | | | | | | | | | Summary: In r257979, I added code to ensure that we wouldn't merge DebugLocEntries if the pieces they describe overlap. Unfortunately, I failed to cover the case, where there may have multiple active Expressions in the entry, in which case we need to make sure that no two values overlap before we can perform the merge. This fixed PR26148. Reviewers: aprantl Differential Revision: http://reviews.llvm.org/D16742 llvm-svn: 259696
* [SelectionDAG] Fix CombineToPreIndexedLoadStore O(n^2) behaviorTim Shen2016-02-032-6/+9
| | | | | | | | | | | | | | | | | | | | This patch consists of two parts: a performance fix in DAGCombiner.cpp and a correctness fix in SelectionDAG.cpp. The test case tests the bug that's uncovered by the performance fix, and fixed by the correctness fix. The performance fix keeps the containers required by the hasPredecessorHelper (which is a lazy DFS) and reuse them. Since hasPredecessorHelper is called in a loop, the overall efficiency reduced from O(n^2) to O(n), where n is the number of SDNodes. The correctness fix keeps iterating the neighbor list even if it's time to early return. It will return after finishing adding all neighbors to Worklist, so that no neighbors are discarded due to the original early return. llvm-svn: 259691
* [ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.Jonas Paulsson2016-02-031-347/+362
| | | | | | | | | | | | | | | | | | | Recommited, after some fixing with test cases. Updated test cases: test/CodeGen/AArch64/arm64-misched-memdep-bug.ll test/CodeGen/AArch64/tailcall_misched_graph.ll Temporarily disabled test cases: test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll test/CodeGen/PowerPC/ppc64-fastcc.ll (partially updated) test/CodeGen/PowerPC/vsx-fma-m.ll test/CodeGen/PowerPC/vsx-fma-sp.ll http://reviews.llvm.org/D8705 Reviewers: Hal Finkel, Andy Trick. llvm-svn: 259673
* [MachineCopyPropagation] Fix comment. NFCJun Bum Lim2016-02-031-2/+3
| | | | | | | | | | Reviewers: MatzeB, qcolombet, jmolloy, mcrosier Subscribers: llvm-commits, mcrosier Differential Revision: http://reviews.llvm.org/D16806 llvm-svn: 259656
* RegCoalescer: Making sure re-materialization defines all subrangesMarcello Maggioni2016-02-031-0/+30
| | | | | | | | | | | | | The register coalescer can rematerialize constants that define more of a register than the copy it is going to replace was going to do. This is valid in the case the register was undef before the copy happened. This patch makes sure that all the subranges defined by the new rematerialization instructions have at least a dead def. Review: http://reviews.llvm.org/D16693 llvm-svn: 259614
* [codeview] Improve readability of codeview assembly outputDavid Majnemer2016-02-021-32/+81
| | | | | | | Strictly speaking, this is not an improvement in functionality per se but a usability improvement to those debugging codeview. llvm-svn: 259601
* MachineVerifier: Check that defs/uses are live in subregisters as well.Matthias Braun2016-02-021-52/+141
| | | | llvm-svn: 259552
* [codeview] Correctly handle inlining functions post-dominated by unreachableDavid Majnemer2016-02-021-1/+1
| | | | | | | | | | | | | | CodeView requires us to accurately describe the extent of the inlined code. We did this by grabbing the next debug location in source order and using *that* to denote where we stopped inlining. However, this is not sufficient or correct in instances where there is no next debug location or the next debug location belongs to the start of another function. To get this correct, use the end symbol of the function to denote the last possible place the inlining could have stopped at. llvm-svn: 259548
* Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.Eugene Zelenko2016-02-024-22/+9
| | | | | | Differential revision: http://reviews.llvm.org/D16793 llvm-svn: 259539
* [codeview] Wire up the .cv_inline_linetable directiveReid Kleckner2016-02-022-3/+68
| | | | | | | | This directive emits the binary annotations that describe line and code deltas in inlined call sites. Single-stepping through inlined frames in windbg now works. llvm-svn: 259535
* [RegisterCoalescer] Better DebugLoc for reMaterializeTrivialDefDavid Majnemer2016-02-021-0/+2
| | | | | | | | | | When rematerializing a computation by replacing the copy, use the copy's location. The location of the copy is more representative of the original program. This partially fixes PR10003. llvm-svn: 259469
* MachineVerifier: Use report_context() instead of ad-hoc messages.Matthias Braun2016-02-021-10/+32
| | | | llvm-svn: 259457
* [safestack] Make sure the unsafe stack pointer is popped in all casesAnna Zaks2016-02-021-27/+26
| | | | | | | | | | The unsafe stack pointer is only popped in moveStaticAllocasToUnsafeStack so it won't happen if there are no static allocas. Fixes https://llvm.org/bugs/show_bug.cgi?id=26122 Differential Revision: http://reviews.llvm.org/D16339 llvm-svn: 259447
* AArch64: Implement missed conditional compare sequences.Balaram Makam2016-02-011-2/+2
| | | | | | | | | | | | | | | | | | Summary: This is an extension to the existing implementation of r242436 which restricts to only select inputs. This version fixes missed opportunities in pr26084 by attempting to lower conditional compare sequences of and/or trees with setcc leafs. This will additionaly handle the case when a tree with select input is not a conjunction-disjunction tree but some of the sub trees are conjunction-disjunction trees. Reviewers: jmolloy, t.p.northover, mcrosier, MatzeB Subscribers: mcrosier, llvm-commits, junbuml, haicheng, mssimpso, gberry Differential Revision: http://reviews.llvm.org/D16291 llvm-svn: 259387
* [PrologEpilogInserter] Add some debug output for callee-save frame object ↵Geoff Berry2016-02-011-0/+2
| | | | | | | | | | | | allocation Reviewers: mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16733 llvm-svn: 259367
* Improved macro emission in dwarf.Amjad Aboud2016-02-015-78/+38
| | | | | | | | Changed emitting offset of macinfo entry into compiler unit DIE to use "addSectionLabel" method rather than explicitly calculating size/offset of macro entry. Differential Revision: http://reviews.llvm.org/D16292 llvm-svn: 259358
* Revert r258580 and r258581.David Majnemer2016-02-011-113/+0
| | | | | | | | | | | | | | | | | | | | | | | | Those commits created an artificial edge from a cleanup to a synthesized catchswitch in order to get the MSVC personality routine to execute cleanups which don't cleanupret and are not wrapped by a catchswitch. This worked well enough but is not a complete solution in situations where there the cleanup infinite loops. However, the real deal breaker behind this approach comes about from a degenerate case where the cleanup is post-dominated by unreachable *and* throws an exception. This ends poorly because the catchswitch will inadvertently catch the exception. Because of this we should go back to our previous behavior of not executing certain cleanups (identical behavior with the Itanium ABI implementation in clang, GCC and ICC). N.B. I think this could be salvaged by making the catchpad rethrow the exception and properly transforming throwing calls in the cleanup into invokes. llvm-svn: 259338
* [SelectionDAG] Eliminate exponential behavior in WalkChainUsersTim Shen2016-01-311-5/+20
| | | | llvm-svn: 259315
* Avoid overly large SmallPtrSet/SmallSetMatthias Braun2016-01-306-6/+6
| | | | | | | These sets perform linear searching in small mode so it is never a good idea to use SmallSize/N bigger than 32. llvm-svn: 259283
* [Objective-C] Support a new special module flag.Manman Ren2016-01-291-0/+1
| | | | | | | | "Objective-C Class Properties" will be put into the objc_imageinfo struct. rdar://23891898 llvm-svn: 259270
* Annotate dump() methods with LLVM_DUMP_METHOD, addressing Richard Smith ↵Yaron Keren2016-01-2917-25/+24
| | | | | | | | r259192 post commit comment. clang part in r259232, this is the LLVM part of the patch. llvm-svn: 259240
* [codeview] Begin to add support for inlined call sitesReid Kleckner2016-01-292-2/+167
| | | | | | | | | | | | | | | | | | | | | Summary: There are three parts to inlined call frames: 1. The inlinee line subsection 2. The inline site symbol record 3. The function ids referenced by both This change starts by emitting function ids (3) for all subprograms and emitting the base inline site symbol record (2). The actual line numbers in (2) use an encoded format that will come next, along with the inlinee line subsection. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16333 llvm-svn: 259217
* Temporarily revert "[ScheduleDAGInstrs::buildSchedGraph()] Handling of ↵Jonas Paulsson2016-01-291-376/+347
| | | | | | | | memory dependecies rewritten." Some buildbot failures needs to be debugged. llvm-svn: 259213
* [ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.Jonas Paulsson2016-01-291-347/+376
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buildSchedGraph() was in need of reworking as the AA features had been added on top of earlier code. It was very difficult to understand, and buggy. There had been found cases where scheduling dependencies had actually been missed (see r228686). AliasChain, RejectMemNodes, adjustChainDeps() and iterateChainSucc() have been removed. There are instead now just the four maps from Value to SUs, which have been renamed to Stores, Loads, NonAliasStores and NonAliasLoads. An unknown store used to become the AliasChain, but now becomes a store mapped to 'unknownValue' (in Stores). What used to be PendingLoads is instead the list of SUs mapped to 'unknownValue' in Loads. RejectMemNodes and adjustChainDeps() used to be a safety-net for everything. The SU maps were sometimes cleared and SUs were put in RejectMemNodes, where adjustChainDeps() would look. Instead of this, a more straight forward approach is used in maintaining the SU maps without clearing them and simply letting them grow over time. Instead of the cutt-off in adjustChainDeps() search, a reduction of maps will be done if needed (see below). Each SUnit either becomes the BarrierChain, or is put into one of the maps. For each SUnit encountered, all the information about previous ones are still available until a new BarrierChain is set, at which point the maps are cleared. For huge regions, the algorithm becomes slow, therefore the maps will get reduced at a threshold (current default is 1000 nodes), by a fraction (default 1/2). These values can be tuned by use of CL options in case some test case shows that they need to be changed (-dag-maps-huge-region and -dag-maps-reduction-size). There has not been any considerable change observed in output quality or compile time. There may now be more DAG edges inserted than before (i.e. if A->B->C, then A->C is not needed). However, in a comparison run there were fewer total calls to AA, and a somewhat improved compile time, which means this seems to be not a problem. http://reviews.llvm.org/D8705 Reviewers: Hal Finkel, Andy Trick. llvm-svn: 259201
* Minor code cleanup. NFC.Junmo Park2016-01-291-1/+1
| | | | llvm-svn: 259139
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