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* Have getOrCreateSubprogramDIE store the DIE for a subprogramPeter Collingbourne2012-05-271-5/+5
| | | | | | | | | definition in the map before calling itself to retrieve the DIE for the declaration. Without this change, if this causes getOrCreateSubprogramDIE to be recursively called on the definition, it will create multiple DIEs for that definition. Fixes PR12831. llvm-svn: 157541
* Missed parens.Benjamin Kramer2012-05-271-1/+1
| | | | llvm-svn: 157527
* r157525 didn't work, just disable iterator checking.Benjamin Kramer2012-05-271-1/+1
| | | | | | | This is obviosly right but I don't see how to do this with proper vector iterators without building a horrible mess of workarounds. llvm-svn: 157526
* SDAGBuilder: Avoid iterator invalidation harder.Benjamin Kramer2012-05-271-1/+1
| | | | | | vector.begin()-1 is invalid too. llvm-svn: 157525
* SDAGBuilder: Don't create an invalid iterator when there is only one switch ↵Benjamin Kramer2012-05-261-2/+2
| | | | | | | | case. Found by libstdc++'s debug mode. llvm-svn: 157522
* SelectionDAGBuilder: When emitting small compare chains for switches order ↵Benjamin Kramer2012-05-261-3/+18
| | | | | | | | | | | | | | them by using edge weights. SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move the most likely condition to the front so it is checked first and the others can be skipped. This is currently not as effective as it could be because SimplifyCFG destroys profiling metadata when merging branches and switches. Merging branch weight metadata is tricky though. This code touches at most 3 cases so I didn't use a proper sorting algorithm. llvm-svn: 157521
* ScoreboardHazardRecognizer: Remove dead conditional in debug code.Benjamin Kramer2012-05-261-2/+1
| | | | | | Negative cycles are filtered out earlier. llvm-svn: 157514
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-255-81/+91
| | | | | | | | | | to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB llvm-svn: 157479
* misched: trace formattingAndrew Trick2012-05-252-7/+7
| | | | llvm-svn: 157455
* Simplify code for calling a function where CanLowerReturn fails, fixing a ↵Eli Friedman2012-05-252-35/+11
| | | | | | small bug in the process. llvm-svn: 157446
* Silence unused variable warnings from when assertions are disabled.Kaelyn Uhrain2012-05-241-0/+2
| | | | llvm-svn: 157438
* misched: Use the same scheduling heuristics with -misched-topdown/bottomup.Andrew Trick2012-05-241-2/+16
| | | | | | (except the part about choosing direction) llvm-svn: 157437
* misched: Trace regpressure.Andrew Trick2012-05-241-2/+4
| | | | llvm-svn: 157429
* misched: Give each ReadyQ a unique IDAndrew Trick2012-05-241-36/+45
| | | | llvm-svn: 157428
* misched: Added ScoreboardHazardRecognizer.Andrew Trick2012-05-242-49/+240
| | | | | | | | | | | | | | | | | | | The Hazard checker implements in-order contraints, or interlocked resources. Ready instructions with hazards do not enter the available queue and are not visible to other heuristics. The major code change is the addition of SchedBoundary to encapsulate the state at the top or bottom of the schedule, including both a pending and available queue. The scheduler now counts cycles in sync with the hazard checker. These are minimum cycle counts based on known hazards. Targets with no itinerary (x86_64) currently remain at cycle 0. To fix this, we need to provide some maximum issue width for all targets. We also need to add the concept of expected latency vs. minimum latency. llvm-svn: 157427
* misched: Release bottom roots in reverse order.Andrew Trick2012-05-241-9/+23
| | | | llvm-svn: 157426
* misched: rename ReadyQ classAndrew Trick2012-05-241-8/+9
| | | | llvm-svn: 157425
* misched: copy comments so compareRPDelta is readable by itself.Andrew Trick2012-05-241-1/+4
| | | | llvm-svn: 157424
* regpressure: Added RegisterPressure::dumpAndrew Trick2012-05-242-0/+20
| | | | llvm-svn: 157423
* regpressure: physreg livein/out fixAndrew Trick2012-05-241-2/+2
| | | | llvm-svn: 157422
* Mark some static arrays as const.Craig Topper2012-05-241-1/+1
| | | | llvm-svn: 157377
* Add a last resort tryInstructionSplit() to RAGreedy.Jakob Stoklund Olesen2012-05-231-1/+65
| | | | | | | | | | | | | Live ranges with a constrained register class may benefit from splitting around individual uses. It allows the remaining live range to use a larger register class where it may allocate. This is like spilling to a different register class. This is only attempted on constrained register classes. <rdar://problem/11438902> llvm-svn: 157354
* Forgot to reverse conditional.Bill Wendling2012-05-231-1/+1
| | | | llvm-svn: 157349
* Reduce indentation by early detection of 'continue'. No functionality change.Bill Wendling2012-05-231-79/+87
| | | | llvm-svn: 157348
* Correctly deal with identity copies in RegisterCoalescer.Jakob Stoklund Olesen2012-05-231-7/+18
| | | | | | | | | | | | | | | | | Now that the coalescer keeps live intervals and machine code in sync at all times, it needs to deal with identity copies differently. When merging two virtual registers, all identity copies are removed right away. This means that other identity copies must come from somewhere else, and they are going to have a value number. Deal with such copies by merging the value numbers before erasing the copy instruction. Otherwise, we leave dangling value numbers in the live interval. This fixes PR12927. llvm-svn: 157340
* Small fix for the debug output from PBQP (PR12822).Patrik Hägglund2012-05-231-3/+4
| | | | llvm-svn: 157319
* Add support for C++11 enum classes in llvm.Eric Christopher2012-05-231-0/+5
| | | | | | Part of rdar://11496790 llvm-svn: 157303
* Untabify and 80-col.Eric Christopher2012-05-221-17/+17
| | | | llvm-svn: 157274
* Formatting consistency.Eric Christopher2012-05-221-3/+4
| | | | llvm-svn: 157273
* Only erase virtregs with no uses left.Jakob Stoklund Olesen2012-05-221-4/+15
| | | | | | | | | Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. llvm-svn: 157254
* Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. ↵Owen Anderson2012-05-211-1/+1
| | | | | | | | No in-tree targets exercise this path. Patch by Micah Villmow. llvm-svn: 157215
* Typo.Chad Rosier2012-05-211-1/+1
| | | | llvm-svn: 157195
* Give a small negative bias to giant edge bundles.Jakob Stoklund Olesen2012-05-211-0/+11
| | | | | | | | | | | | | | | | This helps compile time when the greedy register allocator splits live ranges in giant functions. Without the bias, we would try to grow regions through the giant edge bundles, usually to find out that the region became too big and expensive. If a live range has many uses in blocks near the giant bundle, the small negative bias doesn't make a big difference, and we still consider regions including the giant edge bundle. Giant edge bundles are usually connected to landing pads or indirect branches. llvm-svn: 157174
* Clear kill flags on the fly when joining intervals.Jakob Stoklund Olesen2012-05-201-36/+22
| | | | | | | | | | | With physreg joining out of the way, it is easy to recognize the instructions that need their kill flags cleared while testing for interference. This allows us to skip the final scan of all instructions for an 11% speedup of the coalescer pass. llvm-svn: 157169
* Constrain regclasses in PeepholeOptimizer.Jakob Stoklund Olesen2012-05-201-1/+10
| | | | | | | It can be necessary to restrict to a sub-class before accessing sub-registers. llvm-svn: 157164
* Constrain register classes in TailDup.Jakob Stoklund Olesen2012-05-201-3/+5
| | | | | | | When rewriting operands, make sure the new registers have a compatible register class. llvm-svn: 157163
* When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne2012-05-201-10/+14
| | | | | | | may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. llvm-svn: 157162
* Plug a leak when using MCJIT.Benjamin Kramer2012-05-201-1/+1
| | | | | | Found by valgrind. llvm-svn: 157160
* Use TargetMachine's register info instead of creating a new one and leaking it.Benjamin Kramer2012-05-201-1/+1
| | | | llvm-svn: 157155
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-201-0/+2
| | | | | | Not all GR64 registers have sub_8bit sub-registers. llvm-svn: 157150
* Properly constrain register classes in 2-addr.Jakob Stoklund Olesen2012-05-201-0/+6
| | | | | | | X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. llvm-svn: 157149
* Missed a push_back in r157147.Jakob Stoklund Olesen2012-05-201-1/+0
| | | | llvm-svn: 157148
* Avoid deleting extra copies when RegistersDefinedFromSameValue is true.Jakob Stoklund Olesen2012-05-201-7/+8
| | | | | | | This function adds copies to be erased to DupCopies, avoid also adding them to DeadCopies. llvm-svn: 157147
* Fix build bots.Jakob Stoklund Olesen2012-05-201-4/+4
| | | | | | Avoid looking at the operands of a potentially erased instruction. llvm-svn: 157146
* LiveRangeQuery simplifies shrinkToUses().Jakob Stoklund Olesen2012-05-201-10/+6
| | | | llvm-svn: 157145
* Use LiveRangeQuery in ScheduleDAGInstrs.Jakob Stoklund Olesen2012-05-201-11/+3
| | | | llvm-svn: 157144
* Eliminate some uses of struct LiveRange.Jakob Stoklund Olesen2012-05-201-12/+15
| | | | | | That struct ought to be a LiveInterval implementation detail. llvm-svn: 157143
* Use LiveRangeQuery instead of getLiveRangeContaining().Jakob Stoklund Olesen2012-05-201-4/+4
| | | | llvm-svn: 157142
* Simplify overlap check.Jakob Stoklund Olesen2012-05-191-8/+1
| | | | llvm-svn: 157137
* Fix 12892.Jakob Stoklund Olesen2012-05-192-4/+24
| | | | | | | | | | | | Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. llvm-svn: 157135
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