Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Re-implement trivial rematerialization. This allows def MIs whose live ↵ | Evan Cheng | 2007-08-13 | 5 | -273/+379 | |
| | | | | | | intervals that are coalesced to be rematerialized. llvm-svn: 41060 | |||||
* | Kill info update bugs. | Evan Cheng | 2007-08-13 | 1 | -5/+2 | |
| | | | | llvm-svn: 41043 | |||||
* | No need to remove dead range from soon-to-be-dead live interval. Its val# ↵ | Evan Cheng | 2007-08-12 | 1 | -3/+3 | |
| | | | | | | may be out of whack. llvm-svn: 41024 | |||||
* | Code to maintain kill information during register coalescing. | Evan Cheng | 2007-08-11 | 3 | -29/+82 | |
| | | | | llvm-svn: 41016 | |||||
* | Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in ↵ | Christopher Lamb | 2007-08-10 | 1 | -17/+24 | |
| | | | | | | LowerSubregs and add more debugging output there. llvm-svn: 41005 | |||||
* | Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to | Dan Gohman | 2007-08-10 | 1 | -3/+5 | |
| | | | | | | | use an intptr ValueType instead of i32 for the index operand in getCopyToParts. llvm-svn: 40987 | |||||
* | propagate struct size and alignment of byval arguments to the DAG | Rafael Espindola | 2007-08-10 | 2 | -2/+19 | |
| | | | | llvm-svn: 40986 | |||||
* | unbreak the build | Chris Lattner | 2007-08-09 | 1 | -1/+1 | |
| | | | | llvm-svn: 40976 | |||||
* | Bug fix. ~1U marks the val# dead. | Evan Cheng | 2007-08-09 | 1 | -1/+1 | |
| | | | | llvm-svn: 40975 | |||||
* | Update per review comments. | Dale Johannesen | 2007-08-09 | 1 | -30/+15 | |
| | | | | llvm-svn: 40965 | |||||
* | long double 9 of N. This finishes up the X86-32 bits | Dale Johannesen | 2007-08-09 | 2 | -22/+48 | |
| | | | | | | | | (constants are still not handled). Adds ConvertActions to control fp-to-fp conversions (these are currently defaulted for all other targets, so no changes there). llvm-svn: 40958 | |||||
* | If a target really needs to custom lower constants, it should be allowed | Scott Michel | 2007-08-08 | 1 | -3/+11 | |
| | | | | | | to do so. llvm-svn: 40955 | |||||
* | Adding kill info to val#. | Evan Cheng | 2007-08-08 | 1 | -3/+10 | |
| | | | | llvm-svn: 40925 | |||||
* | Clean up and bug fix. | Evan Cheng | 2007-08-08 | 1 | -1/+1 | |
| | | | | llvm-svn: 40921 | |||||
* | - Each val# can have multiple kills. | Evan Cheng | 2007-08-08 | 3 | -12/+10 | |
| | | | | | | | - Fix some minor bugs related to special markers on val# def. ~0U means undefined, ~1U means dead val#. llvm-svn: 40916 | |||||
* | Remove a dead assertion. | Evan Cheng | 2007-08-08 | 1 | -1/+0 | |
| | | | | llvm-svn: 40914 | |||||
* | - LiveInterval value#'s now have 3 components: def instruction #, | Evan Cheng | 2007-08-07 | 3 | -26/+30 | |
| | | | | | | | | | | kill instruction #, and source register number (iff the value# is defined by a copy). - Now def instruction # is set for every value#, not just for copy defined ones. - Update some outdated code related inactive live ranges. - Kill info not yet set. That's next patch. llvm-svn: 40913 | |||||
* | Add a missing forward declaration. | David Greene | 2007-08-07 | 1 | -0/+1 | |
| | | | | llvm-svn: 40896 | |||||
* | Fix a regression compiling 2005-05-11-Popcount-ffs-fls with the CBE, | Chris Lattner | 2007-08-06 | 1 | -1/+1 | |
| | | | | | | introduced by chandler's patch. llvm-svn: 40864 | |||||
* | Implement review feedback. No functionality change. | Christopher Lamb | 2007-08-06 | 1 | -137/+152 | |
| | | | | llvm-svn: 40863 | |||||
* | Fix minor doxygen nits. | Reid Spencer | 2007-08-05 | 1 | -3/+3 | |
| | | | | llvm-svn: 40854 | |||||
* | shorten this name | Chris Lattner | 2007-08-05 | 1 | -2/+1 | |
| | | | | llvm-svn: 40843 | |||||
* | This is the patch to provide clean intrinsic function overloading support in ↵ | Chandler Carruth | 2007-08-04 | 1 | -12/+0 | |
| | | | | | | | | LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported. llvm-svn: 40807 | |||||
* | More explicit keywords. | Dan Gohman | 2007-08-02 | 2 | -2/+2 | |
| | | | | llvm-svn: 40757 | |||||
* | don't redefine a parameter | Chris Lattner | 2007-08-02 | 1 | -1/+1 | |
| | | | | llvm-svn: 40748 | |||||
* | Do not emit copies for physical register output if it's not used. | Evan Cheng | 2007-08-02 | 2 | -2/+28 | |
| | | | | llvm-svn: 40722 | |||||
* | Style police: Expand the tabs to spaces! | Scott Michel | 2007-08-02 | 1 | -5/+5 | |
| | | | | llvm-svn: 40712 | |||||
* | Instead of adding copyfromreg's to handle physical definitions. Now isel can | Evan Cheng | 2007-08-02 | 1 | -68/+78 | |
| | | | | | | | | | | | | | | simply specify them as results and let scheduledag handle them. That is, instead of SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...) SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag) Just write: SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...) And let scheduledag emit the move from X86::EAX to a virtual register. llvm-svn: 40710 | |||||
* | Bugs: missing partial uses and redundant partial defs. | Evan Cheng | 2007-08-01 | 1 | -4/+20 | |
| | | | | llvm-svn: 40688 | |||||
* | Expand unaligned loads/stores when the target doesn't support them. (PR1548) | Lauro Ramos Venancio | 2007-08-01 | 1 | -3/+140 | |
| | | | | llvm-svn: 40682 | |||||
* | New CallInst interface to address GLIBCXX_DEBUG errors caused by | David Greene | 2007-08-01 | 1 | -4/+4 | |
| | | | | | | | | indexing an empty std::vector. Updates to all clients. llvm-svn: 40660 | |||||
* | simpleregistercoalescing -> regcoalescing. It's too long for me to handle. | Evan Cheng | 2007-07-31 | 1 | -1/+1 | |
| | | | | llvm-svn: 40654 | |||||
* | - Allow custom lowering for CTPOP, CTTZ, CTLZ. | Scott Michel | 2007-07-30 | 1 | -2/+9 | |
| | | | | | | - Fixed an existing unexpanded tab. llvm-svn: 40605 | |||||
* | Fix a bug in getCopyFromParts turned up in the testcase for PR1132. | Dan Gohman | 2007-07-30 | 1 | -3/+3 | |
| | | | | llvm-svn: 40598 | |||||
* | Print a space between the comment character and the basic block name, | Dan Gohman | 2007-07-30 | 1 | -1/+2 | |
| | | | | | | for prettiness. llvm-svn: 40593 | |||||
* | Support for trampolines, except for X86 codegen which is | Duncan Sands | 2007-07-27 | 3 | -0/+56 | |
| | | | | | | still under discussion. llvm-svn: 40549 | |||||
* | Move subreg lowering pass to be right after regalloc, per feedback. | Christopher Lamb | 2007-07-27 | 1 | -4/+10 | |
| | | | | llvm-svn: 40548 | |||||
* | Fix the alias analysis query in DAGCombiner to not add in two | Dan Gohman | 2007-07-26 | 1 | -2/+2 | |
| | | | | | | | offsets. The SrcValueOffset values are the real offsets from the SrcValue base pointers. llvm-svn: 40534 | |||||
* | Add a MachineFunction pass, which runs post register allocation, that turns ↵ | Christopher Lamb | 2007-07-26 | 2 | -0/+230 | |
| | | | | | | subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. llvm-svn: 40521 | |||||
* | Teach DAG scheduling how to properly emit subreg insert/extract machine ↵ | Christopher Lamb | 2007-07-26 | 1 | -0/+150 | |
| | | | | | | instructions. PR1350 llvm-svn: 40520 | |||||
* | Add selection DAG nodes for subreg insert/extract. PR1350 | Christopher Lamb | 2007-07-26 | 2 | -2/+21 | |
| | | | | llvm-svn: 40516 | |||||
* | Remove subreg index from MachineInstr's and also keep vregs as unsigned when ↵ | Christopher Lamb | 2007-07-26 | 1 | -2/+0 | |
| | | | | | | adding operands. llvm-svn: 40514 | |||||
* | Fix infinite recursion for when extract_vector_elt is legal. Unfortunately ↵ | Christopher Lamb | 2007-07-26 | 1 | -1/+1 | |
| | | | | | | no public targets use this code-path, so no test. llvm-svn: 40510 | |||||
* | EmitAlignment() also emits optional fill value. | Evan Cheng | 2007-07-25 | 1 | -2/+5 | |
| | | | | llvm-svn: 40500 | |||||
* | Minor cleanup: | Anton Korobeynikov | 2007-07-25 | 1 | -1/+1 | |
| | | | | | | | - Split EH and debug infiormation - Make DwarfWriter more verbose in some cases llvm-svn: 40481 | |||||
* | Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. | Dan Gohman | 2007-07-24 | 1 | -2/+2 | |
| | | | | llvm-svn: 40480 | |||||
* | Fix some uses of dyn_cast to be uses of cast. | Dan Gohman | 2007-07-23 | 2 | -2/+2 | |
| | | | | llvm-svn: 40443 | |||||
* | Don't assume that only Uses can be kills. Defs are marked as kills initially | Dan Gohman | 2007-07-20 | 2 | -10/+8 | |
| | | | | | | | | when there are no uses. This fixes a dangling-pointer bug, where pointers to deleted instructions were not removed from kills lists. More info here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-July/009749.html llvm-svn: 40131 | |||||
* | Added -print-emitted-asm to print out JIT generated asm to cerr. | Evan Cheng | 2007-07-20 | 1 | -2/+4 | |
| | | | | llvm-svn: 40123 | |||||
* | As pointed out by g++-4.2, the original code didn't do | Duncan Sands | 2007-07-19 | 1 | -2/+2 | |
| | | | | | | what it thought it was doing. llvm-svn: 40044 |