summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* Some code cleanups from ChrisAlkis Evlogimenos2004-02-231-9/+4
| | | | llvm-svn: 11724
* Fix comments in PhysRegTracker and rename isPhysRegAvail to isRegAvail to be ↵Alkis Evlogimenos2004-02-232-5/+6
| | | | | | consistent with the other two llvm-svn: 11723
* Move LiveIntervals.h up to be the first included headerAlkis Evlogimenos2004-02-231-1/+1
| | | | llvm-svn: 11721
* Pull PhysRegTracker out of RegAllocLinearScan as it can be used by other ↵Alkis Evlogimenos2004-02-232-59/+92
| | | | | | allocators as well llvm-svn: 11720
* Move LiveIntervals.h to lib/CodeGen since it shouldn't be exposed to other ↵Alkis Evlogimenos2004-02-233-2/+217
| | | | | | parts of the compiler llvm-svn: 11719
* Another bug fix for empty MBB'sChris Lattner2004-02-221-1/+1
| | | | llvm-svn: 11716
* Fix a bug where we were implicitly assuming that there would be at leastChris Lattner2004-02-221-2/+2
| | | | | | one terminator instruction in each basic block. llvm-svn: 11714
* Print basic block boundaries in machine instruction debug output.Alkis Evlogimenos2004-02-222-4/+8
| | | | llvm-svn: 11704
* Abstract merging of ranges away from number of slots per instruction.Alkis Evlogimenos2004-02-221-3/+7
| | | | | | | Also make it less aggressive as the current implementation breaks in some cases. llvm-svn: 11696
* Make 'fold' statistic's description the same in both allocators.Alkis Evlogimenos2004-02-212-3/+4
| | | | llvm-svn: 11687
* Some more statistics improvements.Alkis Evlogimenos2004-02-201-11/+17
| | | | llvm-svn: 11676
* Disambiguate statistic descriptions.Alkis Evlogimenos2004-02-201-1/+1
| | | | llvm-svn: 11675
* Rename statistic and add another one.Alkis Evlogimenos2004-02-201-3/+6
| | | | llvm-svn: 11674
* Fix crash in debug output.Alkis Evlogimenos2004-02-201-1/+1
| | | | llvm-svn: 11659
* Fix instruction numbering in debug output.Alkis Evlogimenos2004-02-201-1/+2
| | | | llvm-svn: 11655
* Too many changes in one commit:Alkis Evlogimenos2004-02-202-167/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | 1. LiveIntervals now implement a 4 slot per instruction model. Load, Use, Def and a Store slot. This is required in order to correctly represent caller saved register clobbering on function calls, register reuse in the same instruction (def resues last use) and also spill code added later by the allocator. The previous representation (2 slots per instruction) was insufficient and as a result was causing subtle bugs. 2. Fixes in spill code generation. This was the major cause of failures in the test suite. 3. Linear scan now has core support for folding memory operands. This is untested and not enabled (the live interval update function does not attempt to fold loads/stores in instructions). 4. Lots of improvements in the debugging output of both live intervals and linear scan. Give it a try... it is beautiful :-) In summary the above fixes all the issues with the recent reserved register elimination changes and get the allocator very close to the next big step: folding memory operands. llvm-svn: 11654
* Fix RA::verifyAssignment()Alkis Evlogimenos2004-02-191-4/+8
| | | | llvm-svn: 11629
* Fix problem fusing spill code into instructions: we didn't update the liveChris Lattner2004-02-191-0/+3
| | | | | | | variable information to take into account the change of instruction address. llvm-svn: 11628
* Fix an iterator invalidation problem. :(Chris Lattner2004-02-191-2/+11
| | | | llvm-svn: 11627
* Add method to update livevar when an instruction movesChris Lattner2004-02-191-0/+34
| | | | llvm-svn: 11625
* Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printedChris Lattner2004-02-191-6/+16
| | | | | | | by operator<< on MachineInstr's, and looking up what register "24" is all of the time was greatly annoying. llvm-svn: 11623
* Add a MachineBasicBlock::getParent() methodChris Lattner2004-02-191-3/+7
| | | | llvm-svn: 11622
* Rename reloads/spills to loads/stores.Alkis Evlogimenos2004-02-193-14/+14
| | | | llvm-svn: 11619
* Implement assignment correctness verification.Alkis Evlogimenos2004-02-181-0/+15
| | | | llvm-svn: 11609
* Eliminate operator[] is deprecated warningsChris Lattner2004-02-181-16/+21
| | | | llvm-svn: 11578
* Fix deprecated operator[] warningsChris Lattner2004-02-181-15/+17
| | | | llvm-svn: 11577
* Be more agressive when joining ranges.Alkis Evlogimenos2004-02-181-9/+9
| | | | llvm-svn: 11575
* Fix overly conservative spill interval computation.Alkis Evlogimenos2004-02-181-4/+3
| | | | llvm-svn: 11574
* Beautify debug output.Alkis Evlogimenos2004-02-181-3/+8
| | | | llvm-svn: 11573
* Remove the -disable-kill option. The register allocator is buggy with it,Chris Lattner2004-02-171-50/+39
| | | | | | and it was only for debugging in the first place. llvm-svn: 11557
* Add support to the local allocator for fusing spill code into the instructionsChris Lattner2004-02-171-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that need them. This is very useful on CISCy targets like the X86 because it reduces the total spill pressure, and makes better use of it's (large) instruction set. Though the X86 backend doesn't know how to rewrite many instructions yet, this already makes a substantial difference on 176.gcc for example: Before: Time: 8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator Code quality: 734559 asm-printer - Number of machine instrs printed 111395 ra-local - Number of registers reloaded 79902 ra-local - Number of registers spilled 231554 x86-peephole - Number of peephole optimization performed After: Time: 7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator Code quality: 733083 asm-printer - Number of machine instrs printed 2379 ra-local - Number of reloads fused into instructions 109046 ra-local - Number of registers reloaded 79881 ra-local - Number of registers spilled 230658 x86-peephole - Number of peephole optimization performed So by fusing 2300 instructions, we reduced the static number of instructions by 1500, and reduces the number of peepholes (and thus the work) by about 900. This also clearly reduces the number of reload/spill instructions that are emitted. llvm-svn: 11542
* Fix a bug in my previous refactoring change... arg!Chris Lattner2004-02-171-1/+3
| | | | llvm-svn: 11535
* Once we have a way to fold spill code reloads into instructions, we have a ↵Chris Lattner2004-02-171-2/+17
| | | | | | way to use it. :) llvm-svn: 11517
* Fix spilled interval update. It was too conservative.Alkis Evlogimenos2004-02-171-1/+4
| | | | llvm-svn: 11516
* Refactor code a bit. No functionality changes, though the comment hints at ↵Chris Lattner2004-02-171-30/+46
| | | | | | things to come. llvm-svn: 11515
* Add LeakDetection to MachineInstr.Alkis Evlogimenos2004-02-163-11/+80
| | | | | | | Move out of line member functions of MachineBasicBlock to MachineBasicBlock.cpp. llvm-svn: 11497
* This pass should not require phi elimination or live variableAlkis Evlogimenos2004-02-151-13/+13
| | | | | | | analysis. It should only preserve them and update LiveVariables if it already ran. llvm-svn: 11479
* Finegrainify namespacificationChris Lattner2004-02-151-8/+12
| | | | | | Remove one of the operands of a two operand instruction llvm-svn: 11478
* Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos2004-02-154-7/+6
| | | | | | | | | | MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. llvm-svn: 11477
* Eliminate the use of spill (reserved) registers.Alkis Evlogimenos2004-02-152-336/+317
| | | | llvm-svn: 11476
* Allow for fixed objects to reside in the local area, and if they don't to notChris Lattner2004-02-151-6/+13
| | | | | | clobber them by allocating other objects in the same space! llvm-svn: 11454
* Add back machine code deleter pass until we get a MachineCode passAlkis Evlogimenos2004-02-151-0/+21
| | | | | | | that will be responsible for the creation of MachineFunctions and will be required by all MachineFunctionPass passes. llvm-svn: 11453
* There is no reason to align the stack pointer if there are no callees of ↵Chris Lattner2004-02-141-2/+5
| | | | | | this function! llvm-svn: 11449
* Use newly added next() and prior() utility functions.Alkis Evlogimenos2004-02-142-6/+5
| | | | llvm-svn: 11430
* Use std::numeric_limits<float>::infinity() instead ofAlkis Evlogimenos2004-02-142-2/+2
| | | | | | | std::numeric_limits<float>::max() for weighting preallocated intervals. llvm-svn: 11427
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-138-26/+26
| | | | llvm-svn: 11393
* Use getNumVirtualRegs().Alkis Evlogimenos2004-02-131-41/+34
| | | | | | Whitespace cleanups. llvm-svn: 11389
* Refactor MachineFunction::print() into MachineBasicBlock::print().Brian Gaeke2004-02-131-8/+12
| | | | | | Add MachineBasicBlock::dump(). llvm-svn: 11364
* Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.Brian Gaeke2004-02-131-36/+32
| | | | | | | | Rename SetMachineOperandConst's formal parameters to match other methods here. Mark some methods as being used only by the SPARC back-end. Fix a missing-paren bug in OutputValue(). llvm-svn: 11363
* Add parent pointer to MachineInstr that points to owningAlkis Evlogimenos2004-02-121-7/+14
| | | | | | | | MachineBasicBlock. Also change opcode to a short and numImplicitRefs to an unsigned char so that overall MachineInstr's size stays the same. llvm-svn: 11357
OpenPOWER on IntegriCloud