| Commit message (Collapse) | Author | Age | Files | Lines |
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and an iterator invalidation issue.
FreeBench/pifft no longer miscompiles with these fixes!
llvm-svn: 63293
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llvm-svn: 63276
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vast majority of code size regressions introduced by pre-alloc-splitting.
llvm-svn: 63274
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- Modify TableGen to add the DebugLoc when calling getTargetNode.
(The light-weight wrappers are only temporary. The non-DebugLoc version will be
removed once the whole debug info stuff is finished with.)
llvm-svn: 63273
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llvm-svn: 63267
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dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
llvm-svn: 63266
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register getReg() should not call getFreeReg().
llvm-svn: 63263
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functions. Currently omitted: memcpy, memmove, memset.
llvm-svn: 63259
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llvm-svn: 63255
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llvm-svn: 63245
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classes (those that reasonably have a DebugLoc
associated with them).
llvm-svn: 63236
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llvm-svn: 63233
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widened.
llvm-svn: 63217
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new isOperationLegalOrCustom, which does what isOperationLegal
previously did.
Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.
This is for the second half of PR3376.
llvm-svn: 63212
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llvm-svn: 63199
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llvm-svn: 63198
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llvm-svn: 63170
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shift amounts, to avoid implicitly assuming that
target architectures will ignore the high bits.
llvm-svn: 63169
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llvm-svn: 63154
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llvm-svn: 63152
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llvm-svn: 63132
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a uint64_t to verify that the value is in range for the given type,
to help catch accidental overflow. Fix a few places that relied on
getConstant implicitly truncating the value.
llvm-svn: 63128
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llvm-svn: 63120
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llvm-svn: 63091
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- DW_AT_bit_size is only suitable for bitfields.
- Encode source location info for derived types.
- Source location and type size info is not useful for subroutine_type (info is included in respective DISubprogram) and array_type.
llvm-svn: 63077
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llvm-svn: 63070
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doesn't support it. The default is set to 'true', so this should not
impact any other target backends.
llvm-svn: 63058
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llvm-svn: 63049
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checking logic. Rather than make the checking more
complicated, I've tweaked some logic to make things
conform to how the checking thought things ought to
be, since this results in a simpler "mental model".
llvm-svn: 63048
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llvm-svn: 63041
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llvm-svn: 63040
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(theoretically)
allow us to generate more efficient code. We don't do this now though :)
llvm-svn: 63027
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llvm-svn: 63026
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markers, and ended up foiling the interval reconstruction.
This allows us to turn on reconstruction in the pre alloc splitter, which
fixes a number of miscompilations.
llvm-svn: 63025
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llvm-svn: 63021
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Eliminate the StringMap.
llvm-svn: 63009
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llvm-svn: 63008
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tidy up SDUse and related code.
- Replace the operator= member functions with a set method, like
LLVM Use has, and variants setInitial and setNode, which take
care up updating use lists, like LLVM Use's does. This simplifies
code that calls these functions.
- getSDValue() is renamed to get(), as in LLVM Use, though most
places can either use the implicit conversion to SDValue or the
convenience functions instead.
- Fix some more node vs. value terminology issues.
Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.
llvm-svn: 62995
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of each use in the SelectionDAG ReplaceAllUses* functions. Thanks
to Chris for spotting this opportunity.
Also, factor out code from all 5 of the ReplaceAllUses* functions
into AddNonLeafNodeToCSEMaps, which is now renamed
AddModifiedNodeToCSEMaps to more accurately reflect its purpose.
llvm-svn: 62964
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llvm-svn: 62963
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DeleteNodeNotInCSEMaps, since DeleteNode just calls
DeleteNodeNotInCSEMaps.
llvm-svn: 62962
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instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1
%reg1029<def> = MOV8rr %reg1028
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
insert => %reg1030<def> = MOV8rr %reg1028
%reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
In this case, it might not be possible to coalesce the second MOV8rr
instruction if the first one is coalesced. So it would be profitable to
commute it:
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1
%reg1029<def> = MOV8rr %reg1028
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
insert => %reg1030<def> = MOV8rr %reg1029
%reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>
llvm-svn: 62954
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llvm-svn: 62940
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llvm-svn: 62917
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llvm-svn: 62893
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DW_AT_APPLE_flags.
DW_AT_APPLE_optimized flag is set when a compile_unit is optimized. The debugger takes advantage of this information some way.
DW_AT_APPLE_flags encodes command line options when certain env. variable is set. This is used by build engineers to track various gcc command lines used by by a project, irrespective of whether the project used makefile, Xcode or something else.
llvm-gcc patch is next.
llvm-svn: 62888
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llvm-svn: 62861
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testcase from PR3376, and in fact is sufficient to completely
avoid the problem in that testcase.
There's an underlying problem though; TLI.isOperationLegal
considers Custom to be Legal, which might be ok in some
cases, but that's what DAGCombiner is using in many places
to test if something is legal when LegalOperations is true.
When DAGCombiner is running after legalize, this isn't
sufficient. I'll address this in a separate commit.
llvm-svn: 62860
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restrictive register class.
llvm-svn: 62837
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restores that are just
going to be re-spilled again.
This also helps performance. Pre-alloc-splitting now seems to be an overall win on SPEC.
llvm-svn: 62834
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