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* Add some new bits of debug info handling. NoDale Johannesen2010-03-063-0/+129
| | | | | | functional change yet. llvm-svn: 97855
* Reapply r97778 and r97779, enabled only for unsigned i64 to f64Dan Gohman2010-03-061-0/+25
| | | | | | conversions. llvm-svn: 97854
* Don't emit global symbols into the (__TEXT,__ustring) section on Darwin. ThisCharles Davis2010-03-051-1/+1
| | | | | | | | | is a workaround for <rdar://problem/7672401/> (which I filed). This let's us build Wine on Darwin, and it gets the Qt build there a little bit further (so Doug says). llvm-svn: 97845
* Better handling of dead super registers in LiveVariables. We used to do this:Jakob Stoklund Olesen2010-03-051-21/+21
| | | | | | | | | | | | | | | | | | | | | CALL ... %RAX<imp-def> ... [not using %RAX] %EAX = ..., %RAX<imp-use, kill> RET %EAX<imp-use,kill> Now we do this: CALL ... %RAX<imp-def, dead> ... [not using %RAX] %EAX = ... RET %EAX<imp-use,kill> By not artificially keeping %RAX alive, we lower register pressure a bit. The correct number of instructions for 2008-08-05-SpillerBug.ll is obviously 55, anybody can see that. Sheesh. llvm-svn: 97838
* We don't really care about correct register liveness information after theJakob Stoklund Olesen2010-03-051-4/+10
| | | | | | post-ra scheduler has run. Disable the verifier checks that late in the game. llvm-svn: 97837
* Avoid creating bad PHI instructions when BR is being const-folded.Jakob Stoklund Olesen2010-03-051-0/+2
| | | | llvm-svn: 97836
* Fix PR6497, a bug where we'd fold a load into an addcChris Lattner2010-03-051-0/+7
| | | | | | | | | | | node which has a flag. That flag in turn was used by an already-selected adde which turned into an ADC32ri8 which used a selected load which was chained to the load we folded. This flag use caused us to form a cycle. Fix this by not ignoring chains in IsLegalToFold even in cases where the isel thinks it can. llvm-svn: 97791
* inline a small function with one call site.Chris Lattner2010-03-051-16/+4
| | | | llvm-svn: 97789
* Revert r97778 and r97779. They're somehow breaking llvm-gcc builds.Dan Gohman2010-03-051-17/+41
| | | | llvm-svn: 97781
* Fix these constants to be more portable.Dan Gohman2010-03-051-3/+3
| | | | llvm-svn: 97779
* Rewrite i64-to-f64 conversion using an algorithm which handlesDan Gohman2010-03-051-41/+17
| | | | | | | | | rounding correctly. This implementation is a generalization of the x86_64 code in compiler-rt. This fixes rdar://7683708. llvm-svn: 97778
* Fix some more places where dbg_value affected codegen.Dale Johannesen2010-03-054-4/+22
| | | | llvm-svn: 97765
* Fix memcheck-found leaks: one false positive from using new[], and one trueJeffrey Yasskin2010-03-041-9/+28
| | | | | | positive where pointers would be leaked on llvm_shutdown. llvm-svn: 97759
* For SJLJ exception handling, make sure that all calls that are not markedJim Grosbach2010-03-041-31/+36
| | | | | | | | as nounwind are marked with a -1 call-site value. This is necessary to, for example, correctly process exceptions thrown from within an "unexpected" execption handler (see SingleSource/Regression/C++/EH/expection_spec_test.cpp). llvm-svn: 97757
* Run machine licm before machine cse to avoid messing up licm opportunities.Evan Cheng2010-03-041-2/+2
| | | | llvm-svn: 97752
* Avoid cse load instructions unless they are known to be invariant loads.Evan Cheng2010-03-041-10/+36
| | | | llvm-svn: 97747
* add a statistic for # times fastisel fails.Chris Lattner2010-03-041-0/+6
| | | | llvm-svn: 97738
* Fix a typo Duncan noticed.Dan Gohman2010-03-041-1/+1
| | | | llvm-svn: 97735
* Rename -machine-cse to -enable-machine-cse.Evan Cheng2010-03-041-1/+1
| | | | llvm-svn: 97713
* Look ahead a bit to determine if a physical register def that is not marked ↵Evan Cheng2010-03-041-6/+61
| | | | | | dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86. llvm-svn: 97706
* change the new isel matcher to emit ComplexPattern matchesChris Lattner2010-03-041-3/+7
| | | | | | | | | | as the very last thing before node emission. This should dramatically reduce the number of times we do 'MatchAddress' on X86, speeding up compile time. This also improves comments in the tables and shrinks the table a bit, now down to 80506 bytes for x86. llvm-svn: 97703
* Fix more code to work properly with vector operands. Based onDan Gohman2010-03-041-5/+5
| | | | | | a patch my Micah Villmow for PR6465. llvm-svn: 97692
* inline CannotYetSelectIntrinsic into CannotYetSelect and simplify.Chris Lattner2010-03-041-19/+16
| | | | llvm-svn: 97690
* Fix a logic error. An instruction that has a live physical register def ↵Evan Cheng2010-03-031-2/+5
| | | | | | cannot be CSE'ed, but it *can* be used to replace a common subexpression. llvm-svn: 97688
* Remove PHINodeTraits and use MachineInstrExpressionTrait instead.Evan Cheng2010-03-032-39/+2
| | | | llvm-svn: 97687
* Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip ↵Evan Cheng2010-03-031-0/+45
| | | | | | over only virtual register defs. This matches what isEqual() is doing. llvm-svn: 97680
* Re-apply r97667 but with a little bit of thought put into the patch. This ↵Evan Cheng2010-03-031-65/+3
| | | | | | implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. llvm-svn: 97678
* Revert 97667. It broke a bunch of tests.Dan Gohman2010-03-031-0/+63
| | | | llvm-svn: 97673
* Fix funky indentation and add comments.Evan Cheng2010-03-031-17/+24
| | | | llvm-svn: 97670
* Move DenseMapInfo for MachineInstr* to MachineInstr.hEvan Cheng2010-03-031-63/+0
| | | | llvm-svn: 97667
* Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case whereDan Gohman2010-03-031-4/+45
| | | | | | | | | | CSE and recursive RAUW calls delete a node from the use list, invalidating the use list iterator. There's currently no known way to reproduce this in an unmodified LLVM, however there's no fundamental reason why a SelectionDAG couldn't be formed which would trigger this case. llvm-svn: 97665
* Machine CSE work in progress. It's doing some CSE now. But implicit def of ↵Evan Cheng2010-03-031-24/+61
| | | | | | physical registers are getting in the way. llvm-svn: 97664
* Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.Evan Cheng2010-03-032-6/+16
| | | | llvm-svn: 97663
* Revert...Bill Wendling2010-03-031-3/+3
| | | | | | | --- Reverse-merging r97592 into '.': U lib/CodeGen/TargetLoweringObjectFileImpl.cpp llvm-svn: 97657
* add some of the more obscure predicate types to the Chris Lattner2010-03-031-56/+99
| | | | | | Scope accelerator. llvm-svn: 97652
* speed up scope node processing: if the first element of a scopeChris Lattner2010-03-031-38/+141
| | | | | | | | | | | | | entry we're about to process is obviously going to fail, don't bother pushing a scope only to have it immediately be popped. This avoids a lot of scope stack traffic in common cases. Unfortunately, this requires duplicating some of the predicate dispatch. To avoid duplicating the actual logic I pulled each predicate out to its own static function which gets used in both places. llvm-svn: 97651
* introduce a new SwitchTypeMatcher node (which is analogous toChris Lattner2010-03-031-3/+34
| | | | | | | | SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it. This speeds up selection, particularly for X86 which has lots of variants of instructions with only type differences. llvm-svn: 97645
* Work in progress. Finding some cse now.Evan Cheng2010-03-031-4/+88
| | | | llvm-svn: 97635
* Use APInt instead of zext value.Bill Wendling2010-03-031-1/+1
| | | | llvm-svn: 97631
* - Change MachineInstr::isIdenticalTo to take a new option that determines ↵Evan Cheng2010-03-033-32/+29
| | | | | | | | whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). llvm-svn: 97628
* Add an option to enable machine cse (it's not doing anything yet.Evan Cheng2010-03-031-0/+5
| | | | llvm-svn: 97627
* This test case:Bill Wendling2010-03-031-5/+7
| | | | | | | | | | | | | | | | | | | | | long test(long x) { return (x & 123124) | 3; } Currently compiles to: _test: orl $3, %edi movq %rdi, %rax andq $123127, %rax ret This is because instruction and DAG combiners canonicalize (or (and x, C), D) -> (and (or, D), (C | D)) However, this is only profitable if (C & D) != 0. It gets in the way of the 3-addressification because the input bits are known to be zero. llvm-svn: 97616
* Fix some issues in WalkChainUsers dealing with Chris Lattner2010-03-021-11/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | CopyToReg/CopyFromReg/INLINEASM. These are annoying because they have the same opcode before an after isel. Fix this by setting their NodeID to -1 to indicate that they are selected, just like what automatically happens when selecting things that end up being machine nodes. With that done, give IsLegalToFold a new flag that causes it to ignore chains. This lets the HandleMergeInputChains routine be the one place that validates chains after a match is successful, enabling the new hotness in chain processing. This smarter chain processing eliminates the need for "PreprocessRMW" in the X86 and MSP430 backends and enables MSP to start matching it's multiple mem operand instructions more aggressively. I currently #if out the dead code in the X86 backend and MSP backend, I'll remove it for real in a follow-on patch. The testcase changes are: test/CodeGen/X86/sse3.ll: we generate better code test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was miscompiling this before, we now generate correct code Convert it to filecheck while I'm at it. test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem folding to make anton happy. :) llvm-svn: 97596
* Okay. One last attempt:Bill Wendling2010-03-021-3/+3
| | | | | | Place the LSDA into the TEXT section on Mach-O. This saves space. llvm-svn: 97592
* run HandleMergeInputChains even if we only have one input chain.Chris Lattner2010-03-021-29/+3
| | | | llvm-svn: 97581
* Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng2010-03-025-10/+10
| | | | llvm-svn: 97578
* Fix typo.Evan Cheng2010-03-021-1/+1
| | | | llvm-svn: 97577
* Fix grammar.Devang Patel2010-03-021-1/+1
| | | | | | Thanks Duncan! llvm-svn: 97572
* Fix the xfail I added a couple of patches back. The issueChris Lattner2010-03-021-12/+40
| | | | | | | | | was that we weren't properly handling the case when interior nodes of a matched pattern become dead after updating chain and flag uses. Now we handle this explicitly in UpdateChainsAndFlags. llvm-svn: 97561
* I was confused about this, it turns out that MorphNodeToChris Lattner2010-03-021-3/+2
| | | | | | *does* delete ex-operands that become dead. llvm-svn: 97559
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