summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* Revert 101825, which is causing trouble.Dan Gohman2010-04-191-15/+14
| | | | llvm-svn: 101832
* Make BreakAntiDependencies' SUnits argument const, and make the BeginDan Gohman2010-04-195-41/+42
| | | | | | and End arguments by-value rather than by-reference. llvm-svn: 101830
* Eliminate SelectionDAGISel's "current block" member. Just pass it asDan Gohman2010-04-191-14/+15
| | | | | | an argument to things that need it. llvm-svn: 101825
* Eliminate the CurMBB member from SelectionDAGBuilder. For places thatDan Gohman2010-04-193-84/+106
| | | | | | | need it, just pass around the parent block of the current instruction explicitly. llvm-svn: 101822
* More progress on promoting i16 operations to i32 for x86. Work in progress.Evan Cheng2010-04-191-9/+118
| | | | llvm-svn: 101808
* Give SelectionDAG a TargetMachine too, rather than having itDan Gohman2010-04-192-7/+3
| | | | | | fetch one from the MachineFunction. llvm-svn: 101807
* More 80 col violation.Evan Cheng2010-04-191-2/+4
| | | | llvm-svn: 101806
* Add DW_AT_APPLE_omit_frame_ptr to encode -fomit-frame-pointer flag.Devang Patel2010-04-191-0/+5
| | | | llvm-svn: 101805
* Code that needs a TargetMachine should have access to one directly, ratherDan Gohman2010-04-196-20/+22
| | | | | | than just getting one through a TargetLowering. llvm-svn: 101802
* Move isInTailCallPosition out of SelectionDAGBuilder, as it isn'tDan Gohman2010-04-193-86/+95
| | | | | | SelectionDAG-specific. llvm-svn: 101801
* Fix -Wcast-qual warnings.Dan Gohman2010-04-172-6/+6
| | | | llvm-svn: 101655
* Add const qualifiers to TargetLoweringObjectFile usage.Dan Gohman2010-04-171-1/+1
| | | | llvm-svn: 101640
* Use const_cast instead of a C-style cast to cast away const.Dan Gohman2010-04-171-2/+3
| | | | llvm-svn: 101639
* Start function numbering at 0.Dan Gohman2010-04-171-1/+2
| | | | llvm-svn: 101638
* Delete now-unnecessary const_casts.Dan Gohman2010-04-172-8/+8
| | | | llvm-svn: 101637
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-179-15/+18
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Postra machine licm must add registers defined by loop invariants to *all* ofEvan Cheng2010-04-171-48/+23
| | | | | | | | the live-in sets of BBs in the loop. Otherwise later pass may end up using the registers and override the invariant. rdar://7852937 No reasonablly sized test case possible. llvm-svn: 101626
* Fix codegen passes. -disable-ssc shouldn't disable postra machine licm.Evan Cheng2010-04-171-5/+11
| | | | llvm-svn: 101622
* More work to allow dag combiner to promote 16-bit ops to 32-bit.Evan Cheng2010-04-173-44/+123
| | | | llvm-svn: 101621
* Another 80 col violation.Evan Cheng2010-04-171-1/+2
| | | | llvm-svn: 101620
* As a temporary workaround for post-RA not handling DebugValue instructions,Bob Wilson2010-04-171-0/+11
| | | | | | | just remove them all. Radar 7873207 (working around the root problem of Radar 7759363). llvm-svn: 101604
* Revert "Use a simpler data structure to calculate the least recently used ↵Jakob Stoklund Olesen2010-04-171-41/+112
| | | | | | | | register in RegAllocLocal." This reverts commit 101392. It broke a buildbot. llvm-svn: 101595
* Revert 101465, it broke internal OpenGL testing.Eric Christopher2010-04-167-177/+178
| | | | | | | Probably the best way to know that all getOperand() calls have been handled is to replace that API instead of updating. llvm-svn: 101579
* Add support to emit dwarf ranges.Devang Patel2010-04-164-5/+59
| | | | llvm-svn: 101575
* Use a simpler data structure to calculate the least recently used register ↵Jakob Stoklund Olesen2010-04-161-112/+41
| | | | | | | | in RegAllocLocal. This makes the local register allocator about 20% faster. llvm-svn: 101574
* (i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test ↵Evan Cheng2010-04-161-1/+2
| | | | | | case until -promote-16bit is enabled. llvm-svn: 101551
* Create a new TargetSelectionDAGInfo class. This will eventually acquireDan Gohman2010-04-162-0/+22
| | | | | | SelectionDAG-specific parts of TargetLowering. llvm-svn: 101537
* Commit this, which should have accompanied 101531.Dan Gohman2010-04-161-1/+2
| | | | llvm-svn: 101532
* 80 col.Evan Cheng2010-04-161-1/+2
| | | | llvm-svn: 101501
* 80 col.Evan Cheng2010-04-161-1/+1
| | | | llvm-svn: 101500
* Avoid creating virtual registers for unused values.Dan Gohman2010-04-162-5/+5
| | | | llvm-svn: 101480
* Fix an assertion string.Dan Gohman2010-04-161-1/+1
| | | | llvm-svn: 101478
* Fix a comment.Dan Gohman2010-04-161-1/+1
| | | | llvm-svn: 101477
* reapply r101434Gabor Greif2010-04-167-178/+177
| | | | | | | | | | | | | with a fix for self-hosting rotate CallInst operands, i.e. move callee to the back of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101465
* The JIT calls TidyLandingPads to tidy up the landing pads. However, because theBill Wendling2010-04-161-3/+8
| | | | | | | | | | | | | | | | JIT doesn't use the MC back-end asm printer to emit labels that it uses, the section for the MCSymbol is never set. And thus the MCSymbol for the EH label isn't marked as "defined". Because of that, TidyLandingPads removes the needed landing pads from the JIT output. This breaks EH for every JIT program. This is a work-around for this limitation. We pass in the label locations map. If the label has a non-zero value, then it was "emitted" by the JIT and TidyLandingPads shouldn't remove that label. A nicer solution would be to mark the MCSymbol as "used" by the JIT and not rely upon the section being set to determine if it's defined or not. llvm-svn: 101453
* Adding support for dag combiner to promote operations for profit. This ↵Evan Cheng2010-04-161-6/+47
| | | | | | | | | | requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding. x86 support is off by default. It can be enabled with -promote-16bit. Work in progress. llvm-svn: 101448
* Refine further the scope where the global DebugLoc value is active.Dan Gohman2010-04-161-7/+5
| | | | llvm-svn: 101443
* back out r101423 and r101397, they break llvm-gcc self-host on darwin10Gabor Greif2010-04-167-175/+176
| | | | llvm-svn: 101434
* Avoid sinking machine instructions into a loop.Jakob Stoklund Olesen2010-04-151-0/+11
| | | | | | | | | | MachineLoopInfo is already available when MachineSinking runs, so the check is free. There is no test case because it would require a critical edge into a loop, and CodeGenPrepare splits those. This check is just to be extra careful. llvm-svn: 101420
* reapply r101364, which has been backed out in r101368Gabor Greif2010-04-157-176/+175
| | | | | | | | | | | | | with a fix rotate CallInst operands, i.e. move callee to the back of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101397
* Fix PR6847. RegScavenger should ignore DebugValues.Jakob Stoklund Olesen2010-04-151-0/+3
| | | | llvm-svn: 101392
* Make sure the initialization of a GC root is after its definition.Nicolas Geoffray2010-04-151-3/+4
| | | | llvm-svn: 101388
* prune includesGabor Greif2010-04-151-2/+0
| | | | llvm-svn: 101385
* Fix a bunch of namespace polution.Dan Gohman2010-04-153-3/+6
| | | | llvm-svn: 101376
* typosGabor Greif2010-04-151-2/+2
| | | | llvm-svn: 101371
* back out r101364, as it trips the linux nightlybot on some clang C++ testsGabor Greif2010-04-157-175/+176
| | | | llvm-svn: 101368
* rotate CallInst operands, i.e. move callee to the backGabor Greif2010-04-157-176/+175
| | | | | | | | | | of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101364
* enhance the load/store narrowing optimization to handle aChris Lattner2010-04-151-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | tokenfactor in between the load/store. This allows us to optimize test7 into: _test7: ## @test7 ## BB#0: ## %entry movl (%rdx), %eax ## kill: SIL<def> ESI<kill> movb %sil, 5(%rdi) ret instead of: _test7: ## @test7 ## BB#0: ## %entry movl 4(%esp), %ecx movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF andl 4(%ecx), %eax movzbl 8(%esp), %edx shll $8, %edx addl %eax, %edx movl 12(%esp), %eax movl (%eax), %eax movl %edx, 4(%ecx) ret llvm-svn: 101355
* teach codegen to turn trunc(zextload) into load when possible.Chris Lattner2010-04-151-1/+1
| | | | | | | | This doesn't occur much at all, it only seems to formed in the case when the trunc optimization kicks in due to phase ordering. In that case it is saves a few bytes on x86-32. llvm-svn: 101350
* add a simple dag combine to replace trivial shl+lshr withChris Lattner2010-04-151-0/+9
| | | | | | and. This happens with the store->load narrowing stuff. llvm-svn: 101348
OpenPOWER on IntegriCloud