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* Switch over from SelectionNodeCSEMap to FoldingSet.Jim Laskey2006-10-272-399/+211
| | | | llvm-svn: 31240
* remove debug codeChris Lattner2006-10-271-2/+0
| | | | llvm-svn: 31233
* Codegen cond&cond with two branches. This compiles (f.e.) ↵Chris Lattner2006-10-271-15/+35
| | | | | | | | | | | | | | | | | | | | | | | | PowerPC/and-branch.ll to: cmpwi cr0, r4, 4 bgt cr0, LBB1_2 ;UnifiedReturnBlock LBB1_3: ;entry cmplwi cr0, r3, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r3, r4, r3 rlwinm r2, r2, 30, 31, 31 or r2, r2, r3 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock LBB1_1: ;cond_true llvm-svn: 31232
* Turn conditions like x<Y|z==q into multiple blocks.Chris Lattner2006-10-271-19/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This compiles Regression/CodeGen/X86/or-branch.ll into: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $5, %eax jl LBB1_1 #cond_true LBB1_3: #entry testl %ecx, %ecx jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret instead of: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $4, %eax setg %al testl %ecx, %ecx setne %cl testb %cl, %al jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret And on ppc to: cmpwi cr0, r29, 5 blt cr0, LBB1_1 ;cond_true LBB1_3: ;entry cmplwi cr0, r30, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r30, r4, r3 rlwinm r29, r2, 30, 31, 31 and r2, r29, r30 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock llvm-svn: 31230
* getPreIndexedLoad -> getIndexedLoad.Evan Cheng2006-10-261-21/+7
| | | | llvm-svn: 31209
* For PR950:Reid Spencer2006-10-261-24/+44
| | | | | | | | Make necessary changes to support DIV -> [SUF]Div. This changes llvm to have three division instructions: signed, unsigned, floating point. The bytecode and assembler are bacwards compatible, however. llvm-svn: 31195
* simplify codeChris Lattner2006-10-251-1/+1
| | | | llvm-svn: 31188
* turn off tail merging for nowChris Lattner2006-10-251-0/+2
| | | | llvm-svn: 31180
* be more aggressive about matching identical instructions.Chris Lattner2006-10-251-1/+1
| | | | llvm-svn: 31179
* Move getPreferredAlignmentLog from AsmPrinter to TargetDataDevang Patel2006-10-241-23/+0
| | | | llvm-svn: 31171
* visitSwitchCase knows how to insert conditional branches well. ChangeChris Lattner2006-10-241-37/+8
| | | | | | visitBr to just call visitSwitchCase, eliminating duplicate logic. llvm-svn: 31167
* Generalize CaseBlock a bit more:Chris Lattner2006-10-241-57/+74
| | | | | | | Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null, in which case the LHS is treated as a bool. llvm-svn: 31166
* generalize 'CaseBlock'. It really allows any comparison to be inserted.Chris Lattner2006-10-241-3/+2
| | | | llvm-svn: 31161
* Don't do dead block elimination in fast mode.Jim Laskey2006-10-241-1/+2
| | | | llvm-svn: 31155
* LinearScanner hotspot.Jim Laskey2006-10-241-3/+2
| | | | llvm-svn: 31153
* Tighter data structure for deleted debug labels.Jim Laskey2006-10-242-4/+20
| | | | llvm-svn: 31152
* move single basic blocks that are neither fallen into nor fall out of intoChris Lattner2006-10-241-13/+96
| | | | | | | | | | | a place more useful. In particular, if we can put them in a place where code will be able to fall into it, do so. Otherwise, put it in a place it can fall through into a successor. Otherwise, if preventing a fallthrough, move to the end of the function, out of the way. This deletes several hundred unconditional branches from spass. llvm-svn: 31149
* add moveBefore/moveAfter helper methodsChris Lattner2006-10-241-0/+12
| | | | llvm-svn: 31145
* Enable tail merging by default.Chris Lattner2006-10-231-4/+0
| | | | llvm-svn: 31140
* Minor tweak. Instead of generating:Chris Lattner2006-10-231-0/+13
| | | | | | | | | | | | | | | | | | | | | | | movl 32(%esp), %eax cmpl $1, %eax je LBB1_1 #bb LBB1_4: #entry cmpl $2, %eax je LBB1_2 #bb2 jmp LBB1_3 #UnifiedReturnBlock LBB1_1: #bb notice that we would miss the fall through and emit this instead: movl 32(%esp), %eax cmpl $2, %eax je LBB1_2 #bb2 LBB1_4: #entry cmpl $1, %eax jne LBB1_3 #UnifiedReturnBlock LBB1_1: #bb llvm-svn: 31130
* More complete solution to deleting blocks and debug info.Jim Laskey2006-10-233-14/+28
| | | | llvm-svn: 31129
* Fix phi node updating for switches lowered to linear sequences of branches.Chris Lattner2006-10-221-1/+13
| | | | llvm-svn: 31125
* disable this code for now, it's not yet safely updating phi nodesChris Lattner2006-10-221-3/+3
| | | | llvm-svn: 31124
* Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.llChris Lattner2006-10-221-5/+44
| | | | llvm-svn: 31119
* don't break infinite loopsChris Lattner2006-10-211-6/+19
| | | | llvm-svn: 31102
* Use branch reversal to do stuff like this:Chris Lattner2006-10-211-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | call L_strcmp$stub testl %eax, %eax - jne LBB26_208 #cond_true6020 - jmp LBB26_227 #bb7119 + je LBB26_227 #bb7119 LBB26_208: #cond_true6020 movl $l31_str14, 4(%esp) testl %eax, %eax - jne LBB26_704 #cond_true13042 - jmp LBB26_713 #bb13151 + je LBB26_713 #bb13151 LBB26_704: #cond_true13042 movl $_str52, 4(%esp) cmpl 76(%ecx), %eax - jge LBB26_1628 #cond_false63.i.i - jmp LBB26_1769 #_Z8makeGridP13mrSurfaceListidiidd.exit.i + jl LBB26_1769 #_Z8makeGridP13mrSurfaceListidiidd.exit.i LBB26_1628: #cond_false63.i.i movl $0, 48964(%esp) llvm-svn: 31100
* Transform code like:Chris Lattner2006-10-211-2/+13
| | | | | | | | | | | | | | | jle FOO jmp BAR BAR: into: jle FOO BAR: ... whoa! llvm-svn: 31098
* Three changes:Chris Lattner2006-10-211-117/+117
| | | | | | | | | | | | 1. Remove a bunch of ifdef'd code. 2. When a block just contains an uncond branch, change all blocks branching to it to jump to the destination instead. 3. If branch analysis tells us some edges in the machinecfg are not actually possible, remove them. #2 triggers a suprisingly large number of times. llvm-svn: 31094
* Add an experimental cross-jumping implementation.Chris Lattner2006-10-211-13/+231
| | | | | | | This is currently disabled by default and limited in several ways, but does have a positive effect. llvm-svn: 31090
* implement MachineOperand::isIdenticalToChris Lattner2006-10-201-0/+29
| | | | llvm-svn: 31088
* Make flag and chain edges visually distinguishable from value edges in DOTChris Lattner2006-10-201-1/+16
| | | | | | output. llvm-svn: 31067
* For PR950:Reid Spencer2006-10-205-79/+84
| | | | | | | | This patch implements the first increment for the Signless Types feature. All changes pertain to removing the ConstantSInt and ConstantUInt classes in favor of just using ConstantInt. llvm-svn: 31063
* Partially in response to PR926: insert the newly created machine basicBill Wendling2006-10-191-8/+17
| | | | | | | | blocks into the basic block list when lowering the switch inst. into a binary tree of if-then statements. This allows the "visitSwitchCase" func to allow for fall-through behavior. llvm-svn: 31057
* Add option for controlling inclusion of global AA.Jim Laskey2006-10-181-6/+12
| | | | llvm-svn: 31040
* Use global info for alias analysis.Jim Laskey2006-10-181-9/+38
| | | | llvm-svn: 31035
* Teach the branch folder to update debug info if it removes blocks with lineChris Lattner2006-10-171-2/+23
| | | | | | # notes in it. llvm-svn: 31026
* add a method to remove a line # record.Chris Lattner2006-10-171-0/+14
| | | | llvm-svn: 31025
* Do not leak all of the SourceLineInfo objects. Do not bother mallocing eachChris Lattner2006-10-172-14/+15
| | | | | | one separately. llvm-svn: 31022
* Trivial patch to speed up legalizing common i64 constants.Chris Lattner2006-10-171-0/+7
| | | | llvm-svn: 31020
* Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.llChris Lattner2006-10-171-1/+1
| | | | llvm-svn: 31019
* Fix printer for StoreSDNode.Evan Cheng2006-10-171-4/+5
| | | | llvm-svn: 31017
* Reflect MemOpAddrMode change; added a helper to create pre-indexed load.Evan Cheng2006-10-171-4/+68
| | | | llvm-svn: 31016
* Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty ↵Jim Laskey2006-10-173-10/+7
| | | | | | optimization. llvm-svn: 31009
* Enable deleting branches to successor blocks. With the previous patches,Chris Lattner2006-10-171-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | branch folding can now compile stuff like this: void foo(int W, int X, int Y, int Z) { if (W & 1) { for (; X;--X) bar(); } else if (W & 2) { for (; Y;--Y) bar(); } else if (W & 4) { for (; Z;--Z) bar(); } else if (W & 8) { for (; W;--W) bar(); } if (W) { bar(); } } contrived testcase where loops exits all end up merging together. To have the loop merges be: ... cmplw cr0, r30, r27 bne cr0, LBB1_14 ;bb38 LBB1_16: ;cond_next48.loopexit mr r27, r29 LBB1_20: ;cond_next48 cmplwi cr0, r27, 0 beq cr0, LBB1_22 ;UnifiedReturnBlock ... instead of: ... cmplw cr0, r30, r27 bne cr0, LBB1_14 ;bb38 LBB1_16: ;cond_next48.loopexit mr r27, r29 b LBB1_20 ;cond_next48 LBB1_17: ;cond_next48.loopexit1 b LBB1_20 ;cond_next48 LBB1_18: ;cond_next48.loopexit2 b LBB1_20 ;cond_next48 LBB1_19: ;cond_next48.loopexit3 LBB1_20: ;cond_next48 cmplwi cr0, r27, 0 beq cr0, LBB1_22 ;UnifiedReturnBlock ... This is CodeGen/PowerPC/branch-opt.ll llvm-svn: 31006
* Clean up interface to getGlobalLinkName.Jim Laskey2006-10-172-4/+4
| | | | llvm-svn: 31001
* Reenable this pass, fixing the bugs in it.Chris Lattner2006-10-171-23/+32
| | | | | | It now correctly deletes unreachable blocks and blocks that are empty. llvm-svn: 31000
* Make sure operand does have size and element type operands.Evan Cheng2006-10-171-1/+2
| | | | llvm-svn: 30999
* Basic support for getGlobalLinkName.Jim Laskey2006-10-172-2/+12
| | | | llvm-svn: 30997
* Be careful when looking through a vbit_convert. Optimizing this:Evan Cheng2006-10-161-2/+11
| | | | | | | | | | | (vector_shuffle (vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32), (undef, undef, undef, undef), (0, 0, 0, 0), 4, f32) to the vbitconvert is a very bad idea. llvm-svn: 30989
* Pass AliasAnalysis thru to DAGCombiner.Jim Laskey2006-10-162-6/+18
| | | | llvm-svn: 30984
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