summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* [CodeGen] Assert on getNode(FP_EXTEND) with a smaller dst type.Ahmed Bougacha2015-08-131-0/+2
| | | | | | This would have caught the problem in r244858. llvm-svn: 244859
* [CodeGen] When Promoting, don't extend the 2nd FCOPYSIGN operand.Ahmed Bougacha2015-08-131-1/+1
| | | | | | | | | | | We don't care about its type, and there's even a combine that'll fold away the FP_EXTEND if we let it run. However, until it does, we'll have something broken like: (f32 (fp_extend (f64 v))) Scalar f16 follow-up to r243924. llvm-svn: 244858
* [CodeGen] Simplify getNode(*EXT/TRUNC) type size assert. NFC.Ahmed Bougacha2015-08-131-8/+8
| | | | | | | | We already check that vectors have the same number of elements, we don't need to use the scalar types explicitly: comparing the size of the whole vector is enough. llvm-svn: 244857
* MIR Parser: Allow the MI IR references to reference global values.Alex Lorenz2015-08-121-0/+3
| | | | | | | This commit fixes a bug where MI parser couldn't resolve the named IR references that referenced named global values. llvm-svn: 244817
* MIR Serialization: Serialize the fixed stack pseudo source values.Alex Lorenz2015-08-122-1/+14
| | | | llvm-svn: 244816
* NFC. Convert comments in MachineBasicBlock.cpp into new style.Cong Hou2015-08-121-35/+23
| | | | llvm-svn: 244815
* MIR Parser: Move the parsing of fixed stack object indices into new method. NFCAlex Lorenz2015-08-121-2/+11
| | | | | | | | | This commit moves the code that parses the frame indices for the fixed stack objects from the method 'parseFixedStackObjectOperand' to a new method named 'parseFixedStackFrameIndex', so that it can be reused when parsing fixed stack pseudo source values. llvm-svn: 244814
* MIR Serialization: Serialize the jump table pseudo source values.Alex Lorenz2015-08-124-1/+9
| | | | llvm-svn: 244813
* MIR Serialization: Serialize the GOT pseudo source values.Alex Lorenz2015-08-124-1/+10
| | | | llvm-svn: 244809
* MIR Serialization: Serialize the stack pseudo source values.Alex Lorenz2015-08-124-1/+9
| | | | llvm-svn: 244806
* MIR Serialization: Serialize the constant pool pseudo source values.Alex Lorenz2015-08-124-16/+60
| | | | llvm-svn: 244803
* Redo "Make global aliases have symbol size equal to their type"John Brawn2015-08-121-0/+14
| | | | | | | | | | | | r242520 was reverted in r244313 as the expected behaviour of the alias attribute in C is that the alias has the same size as the aliasee. However we can re-introduce adding the size on the alias when the aliasee does not, from a source code or object perspective, exist as a discrete entity. This happens when the aliasee is not a symbol, or when that symbol is private. Differential Revision: http://reviews.llvm.org/D11943 llvm-svn: 244752
* [GlobalMerge] Only emit aliases for internal linkage variables for non-Mach-OJohn Brawn2015-08-121-3/+10
| | | | | | | | On Mach-O emitting aliases for the variables that make up a MergedGlobals variable can cause problems when linking with dead stripping enabled so don't do that, except for external variables where we must emit an alias. llvm-svn: 244748
* [X86] Allow x86 call frame optimization to fold more loads into pushesMichael Kuperstein2015-08-122-3/+7
| | | | | | | | | | This abstracts away the test for "when can we fold across a MachineInstruction" into the the MI interface, and changes call-frame optimization use the same test the peephole optimizer users. Differential Revision: http://reviews.llvm.org/D11945 llvm-svn: 244729
* PseudoSourceValue: Transform the mips subclass to target independent subclassesAlex Lorenz2015-08-111-1/+42
| | | | | | | | | | | | This commit transforms the mips-specific 'MipsCallEntry' subclass of the 'PseudoSourceValue' class into two, target-independent subclasses named 'GlobalValuePseudoSourceValue' and 'ExternalSymbolPseudoSourceValue'. This change makes it easier to serialize the pseudo source values by removing target-specific pseudo source values. Reviewers: Akira Hatanaka llvm-svn: 244698
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-1114-137/+135
| | | | | | | | | | | | | | | | | | | | | | This commit removes the global manager variable which is responsible for storing and allocating pseudo source values and instead it introduces a new manager class named 'PseudoSourceValueManager'. Machine functions now own an instance of the pseudo source value manager class. This commit also modifies the 'get...' methods in the 'MachinePointerInfo' class to construct pseudo source values using the instance of the pseudo source value manager object from the machine function. This commit updates calls to the 'get...' methods from the 'MachinePointerInfo' class in a lot of different files because those calls now need to pass in a reference to a machine function to those methods. This change will make it easier to serialize pseudo source values as it will enable me to transform the mips specific MipsCallEntry PseudoSourceValue subclass into two target independent subclasses. Reviewers: Akira Hatanaka llvm-svn: 244693
* PseudoSourceValue: Introduce a 'PSVKind' enumerator.Alex Lorenz2015-08-111-17/+19
| | | | | | | | | | | | | | This commit introduces a new enumerator named 'PSVKind' in the 'PseudoSourceValue' class. This enumerator is now used to distinguish between the various kinds of pseudo source values. This change is done in preparation for the changes to the pseudo source value object management and to the PseudoSourceValue's class hierarchy - the next two PseudoSourceValue commits will get rid of the global variable that manages the pseudo source values and the mips specific MipsCallEntry subclass. Reviewers: Akira Hatanaka llvm-svn: 244687
* PseudoSourceValue: Update comments and fix lowercase variable names. NFC.Alex Lorenz2015-08-111-1/+1
| | | | | | | | | | | This commit updates the documentation comments in PseudoSourceValue.cpp and PseudoSourceValue.h based on the LLVM's documentation style. It also fixes several instances of variable names that started with a lowercase letter. This change is done in preparation for the changes to the pseudo source value object management and to the PseudoSourceValue's class hierarchy. llvm-svn: 244686
* Reformat PseudoSourceValue.cpp and PseudoSourceValue.h. NFC.Alex Lorenz2015-08-111-29/+26
| | | | | | | | | This commit reformats the files lib/CodeGen/PseudoSourceValue.cpp and include/llvm/CodeGen/PseudoSourceValue.h using clang-format. This change is done in preparation for the changes to the pseudo source value object management and to the PseudoSourceValue's class hierarchy. llvm-svn: 244685
* Make DW_AT_[MIPS_]linkage_name optional, and off by default for SCE.Paul Robinson2015-08-113-1/+21
| | | | | | | | | | | | | | Mangled "linkage" names can be huge, and if the debugger (or other tools) have no use for them, the size savings can be very impressive (on the order of 40%). Add one test for controlling behavior, and modify a number of tests to either stop using linkage names, or make llc emit them (so these tests will still run when the default triple is for PS4). Differential Revision: http://reviews.llvm.org/D11374 llvm-svn: 244678
* NFC SelectionDAGDumper: fix typoJF Bastien2015-08-111-1/+1
| | | | | | | | Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11959 llvm-svn: 244667
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-2/+1
| | | | | | Also, add a test for optsize because this was not part of any existing regression test. llvm-svn: 244651
* SelectionDAG: Prefer to combine multiplication with less uses for fmaJingyue Wu2015-08-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: For example: s6 = s0*s5; s2 = s6*s6 + s6; ... s4 = s6*s3; We notice that it is possible for s2 is folded to fma (s0, s5, fmul (s6 s6)). This only happens when Aggressive is true, otherwise hasOneUse() check already prevents from folding the multiplication with more uses. Test Plan: test/CodeGen/NVPTX/fma-assoc.ll Patch by Xuetian Weng Reviewers: hfinkel, apazos, jingyue, ohsallen, arsenm Subscribers: arsenm, jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D11855 llvm-svn: 244649
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-4/+3
| | | | llvm-svn: 244631
* [GlobalMerge] Use private linkage for MergedGlobals variablesJohn Brawn2015-08-111-25/+5
| | | | | | | | | | | | | | | Other objects can never reference the MergedGlobals symbol so external linkage is never needed. Using private instead of internal linkage means the object is more similar to what it looks like when global merging is not enabled, with the only difference being that the merged variables are addressed indirectly relative to the start of the section they are in. Also add aliases for merged variables with internal linkage, as this also makes the object be more like what it is when they are not merged. Differential Revision: http://reviews.llvm.org/D11942 llvm-svn: 244615
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-111-3/+1
| | | | llvm-svn: 244604
* Add new ISD nodes: ISD::FMINNAN and ISD::FMAXNANJames Molloy2015-08-114-0/+12
| | | | | | | | | | | | | | | | | | The intention of these is to be a corollary to ISD::FMINNUM/FMAXNUM, differing only on how NaNs are treated. FMINNUM returns the non-NaN input (when given one NaN and one non-NaN), FMINNAN returns the NaN input instead. This patch includes support for scalarizing, widening and splitting vectors, but not expansion or softening. The reason is that these should never be needed - FMINNAN nodes are only going to be created in one place (SDAGBuilder::visitSelect) and there we'll check if the node is legal or custom. I could preemptively add expand and soften code, but I'm fairly opposed to adding code I can't test. It's bad enough I can't create tests with this patch, but at least this code will be exercised by the ARM and AArch64 backends fairly shortly. llvm-svn: 244581
* Add support for floating-point minnum and maxnumJames Molloy2015-08-111-1/+2
| | | | | | | | | | | | | | | | | The select pattern recognition in ValueTracking (as used by InstCombine and SelectionDAGBuilder) only knew about integer patterns. This teaches it about minimum and maximum operations. matchSelectPattern() has been extended to return a struct containing the existing Flavor and a new enum defining the pattern's behavior when given one NaN operand. C minnum() is defined to return the non-NaN operand in this case, but the idiomatic C "a < b ? a : b" would return the NaN operand. ARM and AArch64 at least have different instructions for these different cases. llvm-svn: 244580
* Allow PeepholeOptimizer to fold a few more casesMichael Kuperstein2015-08-111-5/+4
| | | | | | | | | | The condition for clearing the folding candidate list was clamped together with the "uninteresting instruction" condition. This is too conservative, e.g. we don't need to clear the list when encountering an IMPLICIT_DEF. Differential Revision: http://reviews.llvm.org/D11591 llvm-svn: 244577
* [WinEHPrepare] Add rudimentary support for the new EH instructionsDavid Majnemer2015-08-111-8/+373
| | | | | | | | | | | | | | | | | | This adds somewhat basic preparation functionality including: - Formation of funclets via coloring basic blocks. - Cloning of polychromatic blocks to ensure that funclets have unique program counters. - Demotion of values used between different funclets. - Some amount of cleanup once we have removed predecessors from basic blocks. - Verification that we are left with a CFG that makes some amount of sense. N.B. Arguments and numbering still need to be done. Differential Revision: http://reviews.llvm.org/D11750 llvm-svn: 244558
* MIR Serialization: Serialize UsedPhysRegMask from the machine register info.Alex Lorenz2015-08-112-0/+46
| | | | | | | | | | | | This commit serializes the UsedPhysRegMask register mask from the machine register information class. The mask is serialized as an inverted 'calleeSavedRegisters' mask to keep the output minimal. This commit also allows the MIR parser to infer this mask from the register mask operands if the machine function doesn't specify it. Reviewers: Duncan P. N. Exon Smith llvm-svn: 244548
* use range-based for loops; NFCISanjay Patel2015-08-111-8/+2
| | | | llvm-svn: 244545
* MIR Parser: Report an error when a stack object is redefined.Alex Lorenz2015-08-101-2/+5
| | | | llvm-svn: 244536
* MIR Parser: Report an error when a fixed stack object is redefined.Alex Lorenz2015-08-101-2/+6
| | | | llvm-svn: 244534
* use range-based for loop; NFCISanjay Patel2015-08-101-5/+5
| | | | llvm-svn: 244531
* MIR Serialization: Serialize the liveout register mask machine operands.Alex Lorenz2015-08-104-0/+47
| | | | llvm-svn: 244529
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-101-3/+1
| | | | llvm-svn: 244528
* NFC. Fix some format issues in lib/CodeGen/MachineBasicBlock.cpp.Cong Hou2015-08-101-11/+13
| | | | llvm-svn: 244518
* MachineVerifier: Handle the optional def operand in a PATCHPOINT instruction.Alex Lorenz2015-08-101-1/+4
| | | | | | | | | | | | The PATCHPOINT instructions have a single optional defined register operand, but the machine verifier can't verify the optional defined register operands. This commit makes sure that the machine verifier won't report an error when a PATCHPOINT instruction doesn't have its optional defined register operand. This change will allow us to enable the machine verifier for the code generation tests for the patchpoint intrinsics. Reviewers: Juergen Ributzka llvm-svn: 244513
* remove function names from comments; NFCSanjay Patel2015-08-101-22/+20
| | | | llvm-svn: 244509
* StackMap: FastISel: Add an appropriate number of immediate operands to theAlex Lorenz2015-08-101-3/+6
| | | | | | | | | | | | | | | | | | frame setup instruction. This commit ensures that the stack map lowering code in FastISel adds an appropriate number of immediate operands to the frame setup instruction. The previous code added just one immediate operand, which was fine for a target like AArch64, but on X86 the ADJCALLSTACKDOWN64 instruction needs two explicit operands. This caused the machine verifier to report an error when the old code added just one. Reviewers: Juergen Ributzka Differential Revision: http://reviews.llvm.org/D11853 llvm-svn: 244508
* x86: Emit LAHF/SAHF instead of PUSHF/POPFJF Bastien2015-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NaCl's sandbox doesn't allow PUSHF/POPF out of security concerns (priviledged emulators have forgotten to mask system bits in the past, and EFLAGS's DF bit is a constant source of hilarity). Commit r220529 fixed PR20376 by saving cmpxchg's flags result using EFLAGS, this commit now generated LAHF/SAHF instead, for all of x86 (not just NaCl) because it leads to an overall performance gain over PUSHF/POPF. As with the previous patch this code generation is pretty bad because it occurs very later, after register allocation, and in many cases it rematerializes flags which were already available (e.g. already in a register through SETE). Fortunately it's somewhat rare that this code needs to fire. I did [[ https://github.com/jfbastien/benchmark-x86-flags | a bit of benchmarking ]], the results on an Intel Haswell E5-2690 CPU at 2.9GHz are: | Time per call (ms) | Runtime (ms) | Benchmark | | 0.000012514 | 6257 | sete.i386 | | 0.000012810 | 6405 | sete.i386-fast | | 0.000010456 | 5228 | sete.x86-64 | | 0.000010496 | 5248 | sete.x86-64-fast | | 0.000012906 | 6453 | lahf-sahf.i386 | | 0.000013236 | 6618 | lahf-sahf.i386-fast | | 0.000010580 | 5290 | lahf-sahf.x86-64 | | 0.000010304 | 5152 | lahf-sahf.x86-64-fast | | 0.000028056 | 14028 | pushf-popf.i386 | | 0.000027160 | 13580 | pushf-popf.i386-fast | | 0.000023810 | 11905 | pushf-popf.x86-64 | | 0.000026468 | 13234 | pushf-popf.x86-64-fast | Clearly `PUSHF`/`POPF` are suboptimal. It doesn't really seems to be worth teaching LLVM about individual flags, at least not for this purpose. Reviewers: rnk, jvoung, t.p.northover Subscribers: llvm-commits Differential revision: http://reviews.llvm.org/D6629 llvm-svn: 244503
* Trace copies when checking for rematerializability in spill weight calculationRobert Lougher2015-08-105-8/+43
| | | | | | | | | | | | | | | PR24139 contains an analysis of poor register allocation. One of the findings was that when calculating the spill weight, a rematerializable interval once split is no longer rematerializable. This is because the isRematerializable check in CalcSpillWeights.cpp does not follow the copies introduced by live range splitting (after splitting, the live interval register definition is a copy which is not rematerializable). Reviewers: qcolombet Differential Revision: http://reviews.llvm.org/D11686 llvm-svn: 244439
* Fix some comment typos.Benjamin Kramer2015-08-0813-36/+37
| | | | llvm-svn: 244402
* MIR Serialization: Serialize the base alignment for the machine memory operands.Alex Lorenz2015-08-074-4/+18
| | | | llvm-svn: 244357
* MIR Serialization: Serialize the offsets for the machine memory operands.Alex Lorenz2015-08-072-1/+6
| | | | llvm-svn: 244356
* MIR Parser: Extract the parsing of the operand's offset into a new method. NFC.Alex Lorenz2015-08-071-2/+10
| | | | | | | | This commit extract the code that parses the 64-bit offset from the method 'parseOperandsOffset' to a new method 'parseOffset' so that we can reuse it when parsing the offset for the machine memory operands. llvm-svn: 244355
* [MC/Dwarf] Allow to specify custom parameters for linetable emission.Frederic Riss2015-08-071-1/+2
| | | | | | | | | NFC patch for current users, but llvm-dsymutil will use the new functionality to adapt to the input linetable. Based on a patch by Adrian Prantl. llvm-svn: 244318
* Revert "Make global aliases have symbol size equal to their type"John Brawn2015-08-071-10/+0
| | | | | | | This reverts r242520, as it caused pr24379. Also removes part of the test added by r243874 that checks the size of alias symbols. llvm-svn: 244313
* ShrinkWrap.cpp: Tweak r244235 for a non-functional member, PredicateFtor. ↵NAKAMURA Takumi2015-08-071-2/+2
| | | | | | [-Wdocumentation] llvm-svn: 244309
OpenPOWER on IntegriCloud