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* Stop using dead function.Jakob Stoklund Olesen2011-04-133-18/+0
| | | | llvm-svn: 129442
* Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor ↵Andrew Trick2011-04-132-156/+190
| | | | | | | | | | | | | | | | | | | | | latency. Additional fixes: Do something reasonable for subtargets with generic itineraries by handle node latency the same as for an empty itinerary. Now nodes default to unit latency unless an itinerary explicitly specifies a zero cycle stage or it is a TokenFactor chain. Original fixes: UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make the ndoe latency adjustments work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. llvm-svn: 129421
* Temporarily revert r129408 to see if it brings the bots back.Eric Christopher2011-04-131-0/+2
| | | | llvm-svn: 129417
* Fix a bug where we were counting the alias sets as completely usedEric Christopher2011-04-121-2/+0
| | | | | | | | registers for fast allocation. Fixes rdar://9207598 llvm-svn: 129408
* I missed this new file in previous commit.Devang Patel2011-04-121-0/+973
| | | | llvm-svn: 129407
* Simplify. There is no need to use static variable.Devang Patel2011-04-121-3/+1
| | | | llvm-svn: 129406
* Do not reuse parameter name.Devang Patel2011-04-121-1/+1
| | | | llvm-svn: 129405
* This mechanical patch moves type handling into CompileUnit from DwarfDebug. ↵Devang Patel2011-04-124-1304/+377
| | | | | | In case of multiple compile unit in one object file, each compile unit is responsible for its own set of type entries anyway. This refactoring makes this obvious. llvm-svn: 129402
* Add more comments... err debug statements to the fast allocator.Eric Christopher2011-04-121-3/+16
| | | | llvm-svn: 129400
* SparseBitVector is SLOW.Jakob Stoklund Olesen2011-04-122-48/+58
| | | | | | | Use a Bitvector instead, we didn't need the smaller memory footprint anyway. This makes the greedy register allocator 10% faster. llvm-svn: 129390
* Revert 129383. It causes some targets to hit a scheduler assert.Andrew Trick2011-04-122-184/+157
| | | | llvm-svn: 129385
* PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.Andrew Trick2011-04-122-157/+184
| | | | | | | | | | | | UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make these heuristic adjustments to node latency work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. llvm-svn: 129383
* Create new intervals for isolated blocks during region splitting.Jakob Stoklund Olesen2011-04-123-37/+46
| | | | | | | | | This merges the behavior of splitSingleBlocks into splitAroundRegion, so the RS_Region and RS_Block register stages can be coalesced. That means the leftover intervals after region splitting go directly to spilling instead of a second pass of per-block splitting. llvm-svn: 129379
* Add SplitKit API to query and select the current interval being worked on.Jakob Stoklund Olesen2011-04-122-2/+17
| | | | | | This makes it possible to target multiple registers in one pass. llvm-svn: 129374
* Fix a bug in RegAllocBase::addMBBLiveIns() where a basic block could ↵Jakob Stoklund Olesen2011-04-121-1/+1
| | | | | | accidentally be skipped. llvm-svn: 129373
* Remove dead typedef.Devang Patel2011-04-121-2/+0
| | | | llvm-svn: 129368
* Refactor CompileUnit into a separate header.Devang Patel2011-04-122-98/+124
| | | | llvm-svn: 129367
* Fix typo.Eric Christopher2011-04-121-1/+1
| | | | llvm-svn: 129334
* Reuse live interval union between functions. This saves a bit of compile timeJakob Stoklund Olesen2011-04-112-4/+11
| | | | | | when compiling many small functions. llvm-svn: 129321
* Just because a GlobalVariable's initializer is [N x { i32, void ()* }] doesn'tNick Lewycky2011-04-111-1/+5
| | | | | | | | | | | | mean that it has to be ConstantArray of ConstantStruct. We might have ConstantAggregateZero, at either level, so don't crash on that. Also, semi-deprecate the sentinal value. The linker isn't aware of sentinals so we end up with the two lists appended, each with their "sentinals" on them. Different parts of LLVM treated sentinals differently, so make them all just ignore the single entry and continue on with the rest of the list. llvm-svn: 129307
* Speed up eviction by stopping collectInterferingVRegs as soon as the spillJakob Stoklund Olesen2011-04-113-14/+23
| | | | | | weight limit has been exceeded. llvm-svn: 129305
* The default of the dispatch switch statement was to branch to a BB that executedBill Wendling2011-04-111-7/+8
| | | | | | | | | | | | | | | | | | | | the 'unwind' instruction. However, later on that instruction was converted into a jump to the basic block it was located in, causing an infinite loop when we get there. It turns out, we get there if the _Unwind_Resume_or_Rethrow call returns (which it's not supposed to do). It returns if it cannot find a place to unwind to. Thus we would get what appears to be a "hang" when in reality it's just that the EH couldn't be propagated further along. Instead of infinitely looping (or calling `unwind', which none of our back-ends support (it's lowered into nothing...)), call the @llvm.trap() intrinsic instead. This may not conform to specific rules of a particular language, but it's rather better than infinitely looping. <rdar://problem/9175843&9233582> llvm-svn: 129302
* Look pass copies when determining whether hoisting would end up inserting ↵Evan Cheng2011-04-111-8/+17
| | | | | | more copies. rdar://9266679 llvm-svn: 129297
* Use a faster algorithm for computing MBB live-in registers after register ↵Jakob Stoklund Olesen2011-04-111-18/+20
| | | | | | | | allocation. LiveIntervals::findLiveInMBBs has to do a full binary search for each segment. llvm-svn: 129292
* Fix a couple of places where changes are made but not tracked.Evan Cheng2011-04-112-3/+10
| | | | llvm-svn: 129287
* Don't add live ranges for sub-registers when clobbering a physical register.Jakob Stoklund Olesen2011-04-112-15/+7
| | | | | | | | | Both coalescing and register allocation already check aliases for interference, so these extra segments are only slowing us down. This speeds up both linear scan and the greedy register allocator. llvm-svn: 129283
* Speed up LiveIntervalUnion::unify by handling end insertion specially.Jakob Stoklund Olesen2011-04-111-1/+9
| | | | | | This particularly helps with the initial transfer of fixed intervals. llvm-svn: 129277
* Time the initial seeding of live registersJakob Stoklund Olesen2011-04-111-0/+1
| | | | llvm-svn: 129276
* Don't shrink live ranges after dead code elimination unless it is going to help.Jakob Stoklund Olesen2011-04-111-4/+10
| | | | | | In particular, don't repeatedly recompute the PIC base live range after rematerialization. llvm-svn: 129275
* Don't include Operator.h from InstrTypes.h.Jay Foad2011-04-111-0/+1
| | | | llvm-svn: 129271
* Avoid excess precision issues that lead to generating host-compiler-specific ↵Chris Lattner2011-04-091-2/+6
| | | | | | | | code. Switch lowering probably shouldn't be using FP for this. This resolves PR9581. llvm-svn: 129199
* Build the Hopfield network incrementally when splitting global live ranges.Jakob Stoklund Olesen2011-04-096-84/+176
| | | | | | | | | It is common for large live ranges to have few basic blocks with register uses and many live-through blocks without any uses. This approach grows the Hopfield network incrementally around the use blocks, completely avoiding checking interference for some through blocks. llvm-svn: 129188
* Precompute interference for neighbor blocks as long as there is no interference.Jakob Stoklund Olesen2011-04-092-22/+37
| | | | | | This doesn't require seeking in the live interval union, so it is very cheap. llvm-svn: 129187
* have dag combine zap "store undef", which can be formed during call loweringChris Lattner2011-04-091-2/+8
| | | | | | with undef arguments. llvm-svn: 129185
* Simplify array bound checks and clarify comments. One element array can ↵Devang Patel2011-04-081-10/+7
| | | | | | have same non-zero number as lower bound as well as upper bound. llvm-svn: 129170
* Do not emit DW_AT_upper_bound and DW_AT_lower_bound for unbouded array.Devang Patel2011-04-081-3/+15
| | | | | | | | If lower bound is more then upper bound then consider it is an unbounded array. An array is unbounded if non-zero lower bound is same as upper bound. If lower bound and upper bound are zero than array has one element. llvm-svn: 129156
* Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap ↵Evan Cheng2011-04-081-2/+15
| | | | | | is lowered into a call to the specified trap function at sdisel time. llvm-svn: 129152
* llvm.global_[cd]tor is defined to be either external, or appending with an arrayNick Lewycky2011-04-081-11/+9
| | | | | | | of { i32, void ()* }. Teach the verifier to verify that, deleting copies of checks strewn about. llvm-svn: 129128
* Added a check in the preRA scheduler for potential interference on aAndrew Trick2011-04-073-4/+107
| | | | | | | | | induction variable. The preRA scheduler is unaware of induction vars, so we look for potential "virtual register cycles" instead. Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing llvm-svn: 129100
* Recompute hasPHIKill flags when shrinking live intervals.Jakob Stoklund Olesen2011-04-071-1/+3
| | | | | | PHI values may be deleted, causing the flags to be wrong. This fixes PR9616. llvm-svn: 129092
* Avoid moving iterators when the previous block was just visited.Jakob Stoklund Olesen2011-04-071-8/+13
| | | | llvm-svn: 129081
* Prefer multiplications to divisions.Jakob Stoklund Olesen2011-04-071-7/+13
| | | | llvm-svn: 129080
* Extract SpillPlacement::addLinks for handling the special transparent blocks.Jakob Stoklund Olesen2011-04-073-37/+49
| | | | llvm-svn: 129079
* Remove dead code. rdar://9221736.Evan Cheng2011-04-071-5/+0
| | | | llvm-svn: 129044
* Also account for the spill code that would be inserted in live-through ↵Jakob Stoklund Olesen2011-04-061-5/+16
| | | | | | blocks with interference. llvm-svn: 129030
* Abort the constraint calculation early when all positive bias is lost.Jakob Stoklund Olesen2011-04-061-33/+63
| | | | | | | Without any positive bias, there is nothing for the spill placer to to. It will spill everywhere. llvm-svn: 129029
* Keep track of the number of positively biased nodes when adding constraints.Jakob Stoklund Olesen2011-04-063-3/+16
| | | | | | If there are no positive nodes, the algorithm can be aborted early. llvm-svn: 129021
* Break the spill placement algorithm into three parts: prepare, ↵Jakob Stoklund Olesen2011-04-063-30/+39
| | | | | | | | addConstraints, and finish. This will allow us to abort the algorithm early if it is determined to be futile. llvm-svn: 129020
* Oops. Scary.Jakob Stoklund Olesen2011-04-061-1/+1
| | | | llvm-svn: 128986
* Analyze blocks with uses separately from live-through blocks without uses.Jakob Stoklund Olesen2011-04-063-89/+120
| | | | | | | | About 90% of the relevant blocks are live-through without uses, and the only information required about them is their number. This saves memory and enables later optimizations that need to look at only the use-blocks. llvm-svn: 128985
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