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* Formatting.Eric Christopher2013-09-231-6/+6
| | | | llvm-svn: 191235
* Reformat code with clang-format.Bill Wendling2013-09-231-107/+108
| | | | llvm-svn: 191226
* Handle gnu pubtypes sections:Eric Christopher2013-09-231-5/+11
| | | | | | | | | | | a) Make sure we are emitting the correct section in our section labels when we begin the module. b) Make sure we are emitting the correct pubtypes section in the presence of gnu pubtypes. c) For C++ struct, union, class, and enumeration types are default external. llvm-svn: 191225
* fix typo: than -> thenKay Tiong Khoo2013-09-231-1/+1
| | | | llvm-svn: 191214
* Fixed debug_aranges handling for common symbols.Richard Mitton2013-09-233-5/+20
| | | | | | | | | | The size of common symbols is now tracked correctly, so they can be listed in the arange section without needing knowledge of other following symbols. .comm (and .lcomm) do not indicate to the system assembler any particular section to use, so we have to treat them as having no section. Test case update to account for this. llvm-svn: 191210
* Provide basic type safety for array_pod_sort comparators.Benjamin Kramer2013-09-221-3/+2
| | | | | | | | This makes using array_pod_sort significantly safer. The implementation relies on function pointer casting but that should be safe as we're dealing with void* here. llvm-svn: 191175
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-5/+5
| | | | | | | | | | | | | | | | | Previously, the DAGISel function WalkChainUsers was spotting that it had entered already-selected territory by whether a node was a MachineNode (amongst other things). Since it's fairly common practice to insert MachineNodes during ISelLowering, this was not the correct check. Looking around, it seems that other nodes get their NodeId set to -1 upon selection, so this makes sure the same thing happens to all MachineNodes and uses that characteristic to determine whether we should stop looking for a loop during selection. This should fix PR15840. llvm-svn: 191165
* Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs ↵Juergen Ributzka2013-09-212-35/+8
| | | | | | | | splitting too." This reverts commit r191130. llvm-svn: 191138
* SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.Juergen Ributzka2013-09-212-8/+35
| | | | | | | | | | | | | | | | | | The Type Legalizer recognizes that VSELECT needs to be split, because the type is to wide for the given target. The same does not always apply to SETCC, because less space is required to encode the result of a comparison. As a result VSELECT is split and SETCC is unrolled into scalar comparisons. This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG Combiner. If a matching pattern is found, then the result mask of SETCC is promoted to the expected vector mask for the given target. This mask has usually te same size as the VSELECT return type (except for Intel KNL). Now the type legalizer will split both VSELECT and SETCC. This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>. llvm-svn: 191130
* Move emission of the debug string table to early in the debugEric Christopher2013-09-203-22/+46
| | | | | | | info finalization to greatly reduce the number of fixups that the assembler has to handle in order to improve compile time. llvm-svn: 191119
* Migrate addGlobalName to the .cpp file as an intermediate stepEric Christopher2013-09-202-2/+6
| | | | | | to further work. llvm-svn: 191113
* Allow subtarget selection of the default MachineScheduler and document the ↵Andrew Trick2013-09-201-12/+22
| | | | | | | | | | | interface. The global registry is used to allow command line override of the scheduler selection, but does not work well as the normal selection API. For example, the same LLVM process should be able to target multiple targets or subtargets. llvm-svn: 191071
* DebugInfo: GDBIndexEntry*String conversion functions now return const char* ↵David Blaikie2013-09-201-2/+2
| | | | | | | | | for easy llvm::formating This was previously invoking UB by passing a user-defined type to format. Thanks to Jordan Rose for pointing this out. llvm-svn: 191060
* Add braces to suppress Clang's dangling-else warning.David Blaikie2013-09-201-2/+4
| | | | | | These violations were introduced in r191049 llvm-svn: 191059
* Added support for generate DWARF .debug_aranges sections automatically.Richard Mitton2013-09-194-12/+226
| | | | llvm-svn: 191052
* Rename ConvergingScheduler to GenericScheduler.Andrew Trick2013-09-191-63/+63
| | | | | | | | | | This was an experimental scheduler a year ago. It's now used by several subtargets, both in-order and out-of-order, and it is about to be enabled by default for x86 and armv7. It will be the new GenericScheduler for subtargets that don't provide their own SchedulingStrategy. llvm-svn: 191051
* DebugInfo: llvm-dwarfdump support for gnu_pubnames sectionDavid Blaikie2013-09-191-2/+2
| | | | llvm-svn: 191050
* PR16726: extend rol/ror matchingKai Nacke2013-09-191-2/+37
| | | | | | | | | | | | | | | | | | | | | C-like languages promote types like unsigned short to unsigned int before performing an arithmetic operation. Currently the rotate matcher in the DAGCombiner does not consider this situation. This commit extends the DAGCombiner in the way that the pattern (or (shl ([az]ext x), (*ext y)), (srl ([az]ext x), (*ext (sub 32, y)))) is folded into ([az]ext (rotl x, y)) The matching is restricted to aext and zext because in this cases the upper bits are either undefined or known. Test case is included. This fixes PR16726. llvm-svn: 191049
* Revert PR16726: extend rol/ror matchingKai Nacke2013-09-191-35/+0
| | | | | | There is a buildbot failure. Need to investigate this. llvm-svn: 191048
* PR16726: extend rol/ror matchingKai Nacke2013-09-191-0/+35
| | | | | | | | | | | | | | | | | | | | | C-like languages promote types like unsigned short to unsigned int before performing an arithmetic operation. Currently the rotate matcher in the DAGCombiner does not consider this situation. This commit extends the DAGCombiner in the way that the pattern (or (shl ([az]ext x), (*ext y)), (srl ([az]ext x), (*ext (sub 32, y)))) is folded into ([az]ext (rotl x, y)) The matching is restricted to aext and zext because in this cases the upper bits are either undefined or known. Test case is included. This fixes PR16726. llvm-svn: 191045
* DebugInfo: Improve IR annotation comments for GNU pubthings.David Blaikie2013-09-191-4/+10
| | | | llvm-svn: 191043
* Unshift the GDB index/GNU pubnames constants modified in r191025David Blaikie2013-09-191-13/+14
| | | | | | | | | | | | Based on code review feedback from Eric Christopher, unshifting these constants as they can appear in the gdb_index itself, shifted a further 24 bits. This means that keeping them preshifted is a bit inflexible, so let's not do that. Given the motivation, wrap up some nicer enums, more type safety, and some utility functions. llvm-svn: 191035
* DebugInfo: Simplify gnu_pubnames index computation.David Blaikie2013-09-191-35/+10
| | | | | | | Names open to bikeshedding. Could switch back to the constants being unshifted, but this way seems a bit easier to work with. llvm-svn: 191025
* Remove unnecessary conditional operators performing bool->bool conversion.David Blaikie2013-09-191-2/+2
| | | | llvm-svn: 191020
* Fix a typo and simplify a boolean expression.David Blaikie2013-09-191-3/+2
| | | | llvm-svn: 191018
* DAGCombiner: Don't fold vector muls with constants that look like a splat of ↵Benjamin Kramer2013-09-191-3/+7
| | | | | | | | a power of 2 but differ in bit width. PR17283. llvm-svn: 191000
* Debug info: Get rid of the VLA indirection hack in FastISel.Adrian Prantl2013-09-181-15/+10
| | | | | | | | Use the DIVariable::isIndirect() flag set by the frontend instead of guessing whether to set the machine location's indirection bit. Paired commit with CFE. llvm-svn: 190961
* Costmodel: Add support for horizontal vector reductionsArnold Schwaighofer2013-09-171-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upcoming SLP vectorization improvements will want to be able to estimate costs of horizontal reductions. Add infrastructure to support this. We model reductions as a series of (shufflevector,add) tuples ultimately followed by an extractelement. For example, for an add-reduction of <4 x float> we could generate the following sequence: (v0, v1, v2, v3) \ \ / / \ \ / + + (v0+v2, v1+v3, undef, undef) \ / ((v0+v2) + (v1+v3), undef, undef) %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7 %r = extractelement <4 x float> %bin.rdx8, i32 0 This commit adds a cost model interface "getReductionCost(Opcode, Ty, Pairwise)" that will allow clients to ask for the cost of such a reduction (as backends might generate more efficient code than the cost of the individual instructions summed up). This interface is excercised by the CostModel analysis pass which looks for reduction patterns like the one above - starting at extractelements - and if it sees a matching sequence will call the cost model interface. We will also support a second form of pairwise reduction that is well supported on common architectures (haddps, vpadd, faddp). (v0, v1, v2, v3) \ / \ / (v0+v1, v2+v3, undef, undef) \ / ((v0+v1)+(v2+v3), undef, undef, undef) %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef> %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 undef, i32 undef> %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1 %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1 %r = extractelement <4 x float> %bin.rdx.1, i32 0 llvm-svn: 190876
* Added documentation to getMemsetStores.Serge Pavlov2013-09-171-0/+18
| | | | llvm-svn: 190866
* [SelectionDAG] Teach the vector scalarizer about TRUNCATE.Quentin Colombet2013-09-172-3/+4
| | | | | | | | | | | When a truncate node defines a legal vector type but uses an illegal vector type, the legalization process was splitting the vector until <1 x vector> type, but then it was failing to scalarize the node because it did not know how to handle TRUNCATE. <rdar://problem/14989896> llvm-svn: 190830
* Debug info: Fix PR16736 and rdar://problem/14990587.Adrian Prantl2013-09-165-5/+7
| | | | | | | A DBG_VALUE is register-indirect iff the first operand is a register _and_ the second operand is an immediate. llvm-svn: 190821
* Use reference instead of copy.Jakub Staszak2013-09-161-2/+2
| | | | llvm-svn: 190813
* Implement function prefix data as an IR feature.Peter Collingbourne2013-09-161-0/+4
| | | | | | | | | Previous discussion: http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/063909.html Differential Revision: http://llvm-reviews.chandlerc.com/D1191 llvm-svn: 190773
* Replace some unnecessary vector copies with references.Benjamin Kramer2013-09-151-2/+2
| | | | llvm-svn: 190770
* Prevent assert in CombinerGlobalAA with null valuesHal Finkel2013-09-151-1/+1
| | | | | | | DAGCombiner::isAlias can be called with SrcValue1 or SrcValue2 null, and we can't use AA in this case (if we try, then the casting code in AA will assert). llvm-svn: 190763
* [Peephole] Rewrite copies to avoid cross register banks copies.Quentin Colombet2013-09-131-84/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By definition copies across register banks are not coalescable. Still, it may be possible to get rid of such a copy when the value is available in another register of the same register file. Consider the following example, where capital and lower letters denote different register file: b = copy A <-- cross-bank copy ... C = copy b <-- cross-bank copy This could have been optimized this way: b = copy A <-- cross-bank copy ... C = copy A <-- same-bank copy Note: b and C's definitions may be in different basic blocks. This patch adds a peephole optimization that looks through a chain of copies leading to a cross-bank copy and reuses a source that is on the same register file if available. This solution could also be used to get rid of some copies (e.g., A could have been used instead of C). However, we do not do so because: - It may over constrain the coloring of the source register for coalescing. - The register allocator may not be able to find a nice split point for the longer live-range, leading to more spill. <rdar://problem/14742333> llvm-svn: 190713
* Add initial support for handling gnu style pubnames accepted by someEric Christopher2013-09-132-8/+117
| | | | | | | | versions of gold. This support is designed to allow gold to produce gdb_index sections similar to the accelerator tables and consumable by gdb. llvm-svn: 190649
* Reformat and hoist section grabbing to top level.Eric Christopher2013-09-131-25/+30
| | | | llvm-svn: 190648
* Add an instruction deprecation feature to TableGen.Joey Gouly2013-09-122-2/+2
| | | | | | | | | | | | | | | | | | | | | | The 'Deprecated' class allows you to specify a SubtargetFeature that the instruction is deprecated on. The 'ComplexDeprecationPredicate' class allows you to define a custom predicate that is called to check for deprecation. For example: ComplexDeprecationPredicate<"MCR"> would mean you would have to define the following function: bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, std::string &Info) Which returns 'false' for not deprecated, and 'true' for deprecated and store the warning message in 'Info'. The MCTargetAsmParser constructor was chaned to take an extra argument of the MCInstrInfo class, so out-of-tree targets will need to be changed. llvm-svn: 190598
* Fix crash in AggressiveAntiDepBreaker with empty CriticalPathSetHal Finkel2013-09-121-1/+1
| | | | | | | | | | | | If no register classes are added to CriticalPathRCs, then the CriticalPathSet bitmask will be empty. In that case, ExcludeRegs must remain NULL or else this line will cause a segfault: } else if ((ExcludeRegs != NULL) && ExcludeRegs->test(AntiDepReg)) { I have no in-tree test case. llvm-svn: 190584
* Remove pointless assertion after r190376Matt Arsenault2013-09-121-2/+0
| | | | llvm-svn: 190565
* Debug info: add more comments.Manman Ren2013-09-111-2/+14
| | | | llvm-svn: 190544
* Add getUnrollingPreferences to TTIHal Finkel2013-09-111-0/+3
| | | | | | | | | Allow targets to customize the default behavior of the generic loop unrolling transformation. This will be used by the PowerPC backend when targeting the A2 core (which is in-order with a deep pipeline), and using more aggressive defaults is important. llvm-svn: 190542
* Revert "Give internal classes hidden visibility."Benjamin Kramer2013-09-1122-42/+41
| | | | | | | It works with clang, but GCC has different rules so we can't make all of those hidden. This reverts commit r190534. llvm-svn: 190536
* Give internal classes hidden visibility.Benjamin Kramer2013-09-1122-41/+42
| | | | | | Worth 100k on a linux/x86_64 Release+Asserts clang. llvm-svn: 190534
* Simplify the checking of function attributes by using the simple methods.Bill Wendling2013-09-111-6/+3
| | | | llvm-svn: 190499
* Rename variables for consistency.Eli Friedman2013-09-111-6/+6
| | | | | | No functional change. llvm-svn: 190466
* Fix unused variables.Eli Friedman2013-09-102-1/+2
| | | | llvm-svn: 190448
* Hoist section call out of loop.Eric Christopher2013-09-101-2/+2
| | | | llvm-svn: 190440
* Debug Info: create scope children DIEs when the scope DIE is not null.Manman Ren2013-09-102-19/+54
| | | | | | | | | | | | | | | | We try to create the scope children DIEs after we create the scope DIE. But to avoid emitting empty lexical block DIE, we first check whether a scope DIE is going to be null, then create the scope children if it is not null. From the number of children, we decide whether to actually create the scope DIE. This patch also removes an early exit which checks for a special condition. It also removes deletion of un-used children DIEs that are generated because we used to generate children DIEs before the scope DIE. Deletion of un-used children DIEs may cause problem because we sometimes keep created DIEs in a member variable of a CU. llvm-svn: 190421
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