| Commit message (Collapse) | Author | Age | Files | Lines |
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types. After all there was a reason why std::map was used initially!
llvm-svn: 62555
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llvm-svn: 62547
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llvm-svn: 62545
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SDNode subclasses to keep state that requires non-trivial
destructors, however it was already effectively impossible,
since the destructor isn't actually ever called. There currently
aren't any SDNode subclasses affected by this, and in general
it's desireable to keep SDNode objects light-weight.
This eliminates the last virtual member function in the SDNode
class, so it eliminates the need for a vtable pointer, making
SDNode smaller.
llvm-svn: 62539
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uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.
Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.
This fixes PR3018.
llvm-svn: 62533
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llvm-svn: 62467
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llvm-svn: 62459
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llvm-svn: 62423
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llvm-svn: 62421
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llvm-svn: 62412
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llvm-svn: 62410
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llvm-svn: 62406
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llvm-svn: 62383
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and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.
Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.
llvm-svn: 62366
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to 0, to ensure that the subsequent code doesn't try to break the
dependence.
llvm-svn: 62365
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member directly, which is private as of r55504.
llvm-svn: 62364
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array instead, since this is what the scheduler actually cares about.
And remove a check that is unnecessary, since it can assume that
SUnits isn't empty.
llvm-svn: 62362
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llvm-svn: 62359
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llvm-svn: 62358
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by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
llvm-svn: 62356
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llvm-svn: 62341
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llvm-svn: 62328
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warning.
llvm-svn: 62327
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Split Support/Registry.h into two files so that we have less to
recompile every time CommandLine.h is changed.
llvm-svn: 62312
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llvm-svn: 62307
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llvm-svn: 62298
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llvm-svn: 62294
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a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.
llvm-svn: 62291
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llvm-svn: 62288
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llvm-svn: 62286
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llvm-svn: 62285
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to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.
llvm-svn: 62284
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loops, hoisting instructions all the way out in one step rather
than hoisting them one nest level at a time. Also, make a few
other code simplifications. This speeds up MachineLICM
by several fold.
llvm-svn: 62283
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llvm-svn: 62279
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llvm-svn: 62276
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and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
llvm-svn: 62275
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Use light weight DebugInfo object directly.
llvm-svn: 62269
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previous commit.
llvm-svn: 62266
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llvm-svn: 62262
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llvm-svn: 62260
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llvm-svn: 62256
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llvm-svn: 62209
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hierarchy) that were used to handle debug info.
llvm-svn: 62199
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between AsmPrinter and CodeGen.
llvm-svn: 62191
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llvm-svn: 62190
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llvm-svn: 62185
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llvm-svn: 62184
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llvm-svn: 62178
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scheduling dependencies. Add assertion checks to help catch
this.
It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.
llvm-svn: 62177
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been modified, to avoid trouble in the (unlikely) scenario that
D is a reference to an element in one of those arrays.
llvm-svn: 62173
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