summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* Fix a comment to say nonnegative instead of positive.Dan Gohman2008-07-161-1/+1
| | | | llvm-svn: 53681
* Add an assert to check for empty flags for MachineMemOperand.Dan Gohman2008-07-161-0/+1
| | | | llvm-svn: 53680
* Reorder methods alphabetically. No functionality change.Duncan Sands2008-07-163-922/+913
| | | | | | | | While this is not a wonderful organizing principle, it does make it easy to find routines, and clear where to insert new ones. llvm-svn: 53672
* Turn on LegalizeTypes by default.Duncan Sands2008-07-161-4/+6
| | | | llvm-svn: 53671
* SelectionDAG::AssignNodeIds is unused.Dan Gohman2008-07-151-11/+0
| | | | llvm-svn: 53636
* Don't sort SDNodes by their addresses in SelectionDAG::dump. Instead,Dan Gohman2008-07-151-9/+5
| | | | | | | just use the AllNodes order, which is at least relatively stable across runs. llvm-svn: 53632
* LegalizeTypes support for fabs on ppc long double.Duncan Sands2008-07-152-0/+15
| | | | llvm-svn: 53613
* LegalizeTypes support for promotion of bswap.Duncan Sands2008-07-152-0/+12
| | | | | | | | | | | | In LegalizeDAG the value is zero-extended to the new type before byte swapping. It doesn't matter how the extension is done since the new bits are shifted off anyway after the swap, so extend by any old rubbish bits. This results in the final assembler for the testcase being one line shorter. llvm-svn: 53604
* LegalizeTypes support for promotion of SIGN_EXTEND_INREG.Duncan Sands2008-07-152-0/+9
| | | | llvm-svn: 53603
* Reorder the integer promotion methods alphabetically.Duncan Sands2008-07-151-365/+356
| | | | | | No change in functionality. llvm-svn: 53602
* Fixed potential bug if the source and target of a bit convert have different ↵Mon P Wang2008-07-151-1/+3
| | | | | | alignment llvm-svn: 53590
* Reapply 53476 and 53480, with a fix so that it properly updatesDan Gohman2008-07-144-33/+41
| | | | | | | the BB member to the current basic block after emitting instructions. llvm-svn: 53567
* Improve debug output for MemOperandSDNode. PseudoSourceValue nodesDan Gohman2008-07-141-4/+7
| | | | | | | don't have value names, so use print instead of getName() to get a useful string. llvm-svn: 53563
* Fix edito in the PseudoSourceValue name list.Dan Gohman2008-07-141-1/+1
| | | | llvm-svn: 53562
* I don't think BUILD_PAIR can have a vector result.Duncan Sands2008-07-141-12/+0
| | | | | | Remove support for this. llvm-svn: 53559
* Tighten up some checks. Fix FPOWI splitting forDuncan Sands2008-07-141-3/+3
| | | | | | non-power-of-two vectors. llvm-svn: 53558
* An INSERT_VECTOR_ELT can insert a larger valueDuncan Sands2008-07-141-4/+5
| | | | | | | | than the vector element type. Don't forget to handle this when the insertion index is not a constant. llvm-svn: 53556
* According to the docs, it is possible to have anDuncan Sands2008-07-141-11/+19
| | | | | | | | | | extending load of a vector. Handle this case when splitting vector loads. I'm not completely sure what is supposed to happen, but I think it means hi should be set to undef. LegalizeDAG does not consider this case. llvm-svn: 53555
* There should be no extending loads or truncatingDuncan Sands2008-07-141-4/+4
| | | | | | | | stores of one-element vectors. Also, neaten the handling of INSERT_VECTOR_ELT when the inserted type is larger than the vector element type. llvm-svn: 53554
* Ignore TargetConstant with an illegal type. TheseDuncan Sands2008-07-142-10/+23
| | | | | | | | | | are used for passing huge immediates in inline ASM from the front-end straight down to the ASM writer. Of course this is a hack, but it is simple, limited in scope, works in practice, and is what LegalizeDAG does. llvm-svn: 53553
* Typos.Evan Cheng2008-07-121-2/+2
| | | | llvm-svn: 53504
* Fix PR2536: a nasty spiller bug. If a two-address instruction uses a ↵Evan Cheng2008-07-121-0/+23
| | | | | | | | | | | register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. 8 %reg1024<def> = IMPLICIT_DEF 12 %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2 The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap. llvm-svn: 53503
* Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.Evan Cheng2008-07-124-38/+30
| | | | llvm-svn: 53502
* Include a frame index in the "fixed stack" pseudo source valueDan Gohman2008-07-113-26/+44
| | | | | | | instead of using the frame index for the SVOffset, which was inconsistent. llvm-svn: 53486
* Fix an obsolete top-level comment.Dan Gohman2008-07-111-3/+2
| | | | llvm-svn: 53481
* Factor out debugging code into the common base class.Dan Gohman2008-07-113-8/+5
| | | | llvm-svn: 53480
* Add support for putting NamedRegionTimers in TimerGroups, andDan Gohman2008-07-113-22/+33
| | | | | | | | use a timer group for the timers in SelectionDAGISel. Also, Split scheduling out from emitting, to give each their own timer. llvm-svn: 53476
* Trim unnecessary #includes.Dan Gohman2008-07-113-3/+0
| | | | llvm-svn: 53471
* Remove an apparently useless routine: there shouldDuncan Sands2008-07-112-15/+0
| | | | | | | be no need to split the result of a vector RET node, since they are always already legal. llvm-svn: 53462
* It is pointless to turn a UINT_TO_FP into anDuncan Sands2008-07-113-79/+118
| | | | | | | | | SINT_TO_FP libcall plus additional operations: it might as well be a direct UINT_TO_FP libcall. So only turn it into an SINT_TO_FP if the target has special handling for SINT_TO_FP. llvm-svn: 53461
* Add two missing SINT_TO_FP libcalls.Duncan Sands2008-07-112-11/+21
| | | | llvm-svn: 53460
* Port a shift-by-1 optimization from LegalizeDAG: itDuncan Sands2008-07-111-0/+7
| | | | | | | was presumably added after the rest of the code was copied to LegalizeTypes. llvm-svn: 53459
* Add support for 128 bit shifts and 32 bit shiftsDuncan Sands2008-07-112-6/+23
| | | | | | on 16 bit machines. llvm-svn: 53458
* Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticedChris Lattner2008-07-101-2/+5
| | | | | | | when working on legalizetypes. Both legalizetypes and legalizeops now produce hte same code for CodeGen/ARM/fcopysign.ll. llvm-svn: 53435
* make legalize types be a command line option: -enable-legalize-types.Chris Lattner2008-07-101-5/+8
| | | | llvm-svn: 53434
* Make stack slot coloring's debug output more consistent withDan Gohman2008-07-101-1/+1
| | | | | | other passes. llvm-svn: 53415
* Change StackSlotForVirtReg (which maps vregs to frame indices) from std::map ↵Evan Cheng2008-07-101-8/+8
| | | | | | to IndexedMap. llvm-svn: 53414
* Add support for 128 bit multiplicative operations.Duncan Sands2008-07-102-21/+62
| | | | | | | | | Lack of these caused a bootstrap failure with Fortran on x86-64 with LegalizeTypes turned on. While there, be nice to 16 bit machines and support expansion of i32 too. llvm-svn: 53408
* Add a mysteriously missing libcall, FPTOSINT_F80_I32.Duncan Sands2008-07-104-6/+32
| | | | | | | Be nice to 16 bit machines by supporting FP_TO_XINT expansion for these. llvm-svn: 53407
* Fix a FIXME: use an apint in CTTZ legalization.Duncan Sands2008-07-101-3/+3
| | | | llvm-svn: 53406
* Remove PromoteIntRes_FP_ROUND - not sure what itDuncan Sands2008-07-104-14/+1
| | | | | | | was doing there: FP_ROUND returns a float, not an integer. llvm-svn: 53405
* Make sure the alignment of the temporary createdDuncan Sands2008-07-101-2/+6
| | | | | | | in CreateStackStoreLoad is good enough for both the source and destination types. llvm-svn: 53404
* Make the LegalizeType method naming scheme more regular.Duncan Sands2008-07-105-49/+43
| | | | llvm-svn: 53403
* Don't barf when dumping a constant that containsDuncan Sands2008-07-101-1/+1
| | | | | | a ginormous value (eg: i128 -1). llvm-svn: 53402
* - Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply ↵Evan Cheng2008-07-103-32/+19
| | | | | | | | the operand index of def machineoperand and at most one full scan of non-implicit operands is needed. - Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel. llvm-svn: 53394
* Use DenseMap instead of std::map in local register allocation. This ↵Owen Anderson2008-07-101-3/+16
| | | | | | improves the time on instcombine from .31s to .22s llvm-svn: 53390
* Fix 403.gcc. Finally got the check for two-address-ness correct.Owen Anderson2008-07-101-10/+14
| | | | llvm-svn: 53389
* Revert r53367, which was breaking things.Owen Anderson2008-07-091-1/+3
| | | | llvm-svn: 53378
* Simplify hasNUsesOfValue and hasAnyUsesOfValue even more. ThisDan Gohman2008-07-091-14/+2
| | | | | | | | | | | makes their special-case checks of use_size() less beneficial, so remove them. This eliminates all but one use of use_size(), which is in AssignTopologicalOrder, which uses it only once for each node, and so can reasonably afford to recompute it, as this allows the UsesSize field of SDNode to be removed altogether. llvm-svn: 53377
* hasAnyUseOfValue can check SDUse nodes of its users directly insteadDan Gohman2008-07-091-13/+3
| | | | | | of examining every operand of every user. llvm-svn: 53374
OpenPOWER on IntegriCloud