| Commit message (Collapse) | Author | Age | Files | Lines |
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The standard function epilog includes a .size directive, but ppc64 uses
an alternate local symbol to tag the actual start of each function.
Until recently, binutils accepted the .size directive as:
.size test1, .Ltmp0-test1
however, using this directive with recent binutils will result in the error:
.size expression for XXX does not evaluate to a constant
so we must use the label which actually tags the start of the function.
llvm-svn: 151200
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Patch by Joe Groff!
llvm-svn: 151183
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llvm-svn: 151178
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llvm-svn: 151169
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llvm-svn: 151167
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Worth another 45k (1%) off of a large C++ testcase.
rdar://10909458
llvm-svn: 151144
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llvm-svn: 151143
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llvm-svn: 151142
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The vast majority of virtual register definitions don't need an entry
in the DAG builder's VRegDefs set.
llvm-svn: 151136
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Affect on SD scheduling and postRA scheduling:
Printing the DAG will display the nodes in top-down topological order.
This matches the order within the MBB and makes my life much easier in general.
Affect on misched:
We don't need to track virtual register uses at all. This is awesome.
I also intend to rely on the SUnit ID as a topo-sort index. So if A < B then we cannot have an edge B -> A.
llvm-svn: 151135
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to static data that should not be modified.
llvm-svn: 151134
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This makes RAFast 4% faster, and it gets rid of the dodgy DenseMap
iteration.
This also revealed that RAFast would sometimes dereference DenseMap
iterators after erasing other elements from the map. That does seem to
work in the current DenseMap implementation, but SparseSet doesn't allow
it.
llvm-svn: 151111
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into
bundles. This method takes a bundle start and an MI being bundled, and makes
the intervals for the MI's operands appear to start/end on the bundle start.
Also fixes some minor cosmetic issues (whitespace, naming convention) in the
HMEditor code.
llvm-svn: 151099
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Part of rdar://10493979 where it reduces by about .5% (10k)
llvm-svn: 151097
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Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().
PEI resets virtual regs when it's done scavenging.
PTX will either have to provide its own PEI pass or assign physregs.
llvm-svn: 151032
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llvm-svn: 151031
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llvm-svn: 151006
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ecx = mov eax
al = mov ch
The second copy is not a nop because the sub-indices of ecx,ch is not the
same of that of eax/al.
Re-enabled machine-cp.
PR11940
llvm-svn: 151002
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converted to zeroexts.
llvm-svn: 150957
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flow changes have already hidden the bug. rdar://10893812
llvm-svn: 150949
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llvm-svn: 150921
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llvm-svn: 150918
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llvm-svn: 150915
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llvm-svn: 150914
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llvm-svn: 150912
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llvm-svn: 150910
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Hold (LiveInterval, LiveRange) pairs to update, rather than vregs.
llvm-svn: 150909
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llvm-svn: 150851
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llvm-svn: 150848
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llvm-svn: 150842
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llvm-svn: 150841
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llvm-svn: 150840
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MRI keeps track of which physregs have been used. Make sure it gets
updated with all the regmask-clobbered registers.
Delete the closePhysRegsUsed() function which isn't necessary.
llvm-svn: 150830
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any changes.
Internally this adds a private inner class HMEditor, to LiveIntervals. HMEditor provides
an API for updating live intervals when code is moved or bundled.
llvm-svn: 150826
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llvm-svn: 150820
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This caused miscompilations on out-of-tree targets, and possibly i386 as
well.
I'll find some other way of hoisting %rip-relative loads from loops
containing calls.
llvm-svn: 150816
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guessing that it's the same as the size.
llvm-svn: 150813
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ld sulk. GNU ld is perfectly happy with it, which is worrying for a whole other set of reasons...
Thanks to Anton, Duncan and Rafael for helping me track this down.
Pointy hat to Rafael for introducing the bug in the first place.
llvm-svn: 150811
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llvm-svn: 150778
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llvm-svn: 150773
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NDEBUG guards.
llvm-svn: 150771
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bail on reserved registers. This *should* be safe as of r150786.
llvm-svn: 150769
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un-allocatable registers.
llvm-svn: 150768
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and introduces subtle miscompiles in many places.
llvm-svn: 150703
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llvm-svn: 150670
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N) for all operations. This fixes a horrible worst case with lots of nodes where 99% of the time was being spent in std::remove.
llvm-svn: 150669
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llvm-svn: 150655
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registers.
llvm-svn: 150653
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Don't attempt to move instructions with regmask operands. They are most
likely calls anyway.
llvm-svn: 150634
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The existing framework for postra scheduling is library local. We want to keep it that way. Soon we will have a more general MachineScheduler interface. At that time, various bits will be exposed to targets. In the meantime, the VLIWPacketizer wants to use ScheduleDAGInstrs directly, so it needs to wrapped in a PIMPL to avoid exposing it to the target interface.
llvm-svn: 150633
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