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* Add ordering of SDNodes to LowerCallTo.Bill Wendling2009-12-221-19/+44
| | | | llvm-svn: 91866
* Now add ordering to SDNodes created by the massive intrinsic lowering function.Bill Wendling2009-12-221-100/+183
| | | | llvm-svn: 91863
* To make things interesting, I added MORE code to set the ordering ofBill Wendling2009-12-221-32/+387
| | | | | | SDNodes. This time in the load/store and limited-precision code. llvm-svn: 91860
* Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames2009-12-226-33/+28
| | | | | | This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. llvm-svn: 91859
* Add more plumbing to assign ordering to SDNodes. Have the "getValue" methodBill Wendling2009-12-211-59/+133
| | | | | | | assign the ordering when called. Combine some of the ordering assignments to keep things simple. llvm-svn: 91857
* More ordering plumbing. This time for GEP. I need to remember to assignBill Wendling2009-12-211-4/+32
| | | | | | orderings to values returned by getValue(). llvm-svn: 91850
* Another incremental check-in for assigning ordering to SDNodes. This time forBill Wendling2009-12-211-25/+75
| | | | | | shuffle and insert vector. llvm-svn: 91847
* Assign ordering to more instructions. Incremental check-in.Bill Wendling2009-12-211-57/+156
| | | | llvm-svn: 91846
* - Add a bit more plumbing assigning an order to SDNodes.Bill Wendling2009-12-212-9/+32
| | | | | | - Modify the "dump" method to emit the order of an SDNode. llvm-svn: 91845
* First wave of plumbing for assigning an ordering to SDNodes. This takes care ofBill Wendling2009-12-211-28/+43
| | | | | | a lot of the branching instructions. llvm-svn: 91838
* Place SDNodeOrdering.h in the directory it's used.Bill Wendling2009-12-212-1/+59
| | | | llvm-svn: 91834
* Fix setting and default setting of code model for jit. Do thisEric Christopher2009-12-211-0/+26
| | | | | | | | | | by allowing backends to override routines that will default the JIT and Static code generation to an appropriate code model for the architecture. Should fix PR 5773. llvm-svn: 91824
* Fix a bunch of little errors that Clang complains about when its being pedanticDouglas Gregor2009-12-196-8/+8
| | | | llvm-svn: 91764
* Use 4-arg getVTList) variant instead of generic one, when possibleAnton Korobeynikov2009-12-191-0/+1
| | | | llvm-svn: 91744
* Changes from review:Bill Wendling2009-12-184-143/+67
| | | | | | | | | | | - Move DisableScheduling flag into TargetOption.h - Move SDNodeOrdering into its own header file. Give it a minimal interface that doesn't conflate construction with storage. - Move assigning the ordering into the SelectionDAGBuilder. This isn't used yet, so there should be no functional changes. llvm-svn: 91727
* Increase opportunities to optimize (brcond (srl (and c1), c2)).Evan Cheng2009-12-181-1/+28
| | | | llvm-svn: 91717
* Add Loop contains utility methods for testing whether a loopDan Gohman2009-12-181-1/+1
| | | | | | | | contains another loop, or an instruction. The loop form is substantially more efficient on large loops than the typical code it replaces. llvm-svn: 91654
* Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson2009-12-181-1/+1
| | | | | | | | The change in SelectionDAGBuilder is needed to allow using bitcasts to convert between f64 (the default type for ARM "d" registers) and 64-bit Neon vector types. Radar 7457110. llvm-svn: 91649
* Sundry dependent-name fixes flagged by clang++.John McCall2009-12-171-4/+4
| | | | llvm-svn: 91636
* Revert accidental commit.Bill Wendling2009-12-171-1/+1
| | | | llvm-svn: 91635
* Turn off critical edge splitting for landing pads. The introduction of aBill Wendling2009-12-172-4/+5
| | | | | | | | | | non-landing pad basic block as the successor to a block that ends in an unconditional jump will cause block folding to remove the added block as a successor. Thus eventually removing it AND the landing pad entirely. Critical edge splitting is an optimization, so we can safely turn it off when dealing with landing pads. llvm-svn: 91634
* Temporarily revert 91337. It's causing testcase failures.Bill Wendling2009-12-171-6/+7
| | | | | | | | $ svn merge -c -91337 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91337 into '.': U lib/CodeGen/AsmPrinter/DwarfException.cpp llvm-svn: 91618
* Introduce EVT::getHalfSizedIntegerVT() for use in ExpandUnalignedStore() inKen Dyck2009-12-171-6/+3
| | | | | | | | | | | | | | LegalizeDAG.cpp. Unlike the code it replaces, which simply decrements the simple type by one, getHalfSizedIntegerVT() searches for the smallest simple integer type that is at least half the size of the type it is called on. This approach has the advantage that it will continue working if a new value type (such as i24) is added to MVT. Also, in preparation for new value types, remove the assertions that non-power-of-2 8-bit-mutiple types are Extended when legalizing extload and truncstore operations. llvm-svn: 91614
* Remove debugging code.Evan Cheng2009-12-171-24/+0
| | | | llvm-svn: 91604
* Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently ↵Evan Cheng2009-12-171-0/+24
| | | | | | introduced a non-deterministic behavior in the optimizer somewhere. llvm-svn: 91598
* Fix a comment grammaro.Bob Wilson2009-12-171-2/+2
| | | | llvm-svn: 91584
* Revert this dag combine change:Evan Cheng2009-12-171-13/+0
| | | | | | | | Fold (zext (and x, cst)) -> (and (zext x), cst) DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping. llvm-svn: 91574
* Reapply r91392, it was only unmasking the bug, and since TOT is still broken ↵Daniel Dunbar2009-12-163-29/+155
| | | | | | having it reverted does no good. llvm-svn: 91560
* Add @earlyclobber TableGen constraintJim Grosbach2009-12-161-3/+21
| | | | llvm-svn: 91554
* Reuse lowered phi nodes.Jakob Stoklund Olesen2009-12-163-43/+124
| | | | | | | | | | | | | | Tail duplication produces lots of identical phi nodes in different basic blocks. Teach PHIElimination to reuse the join registers when lowering a phi node that is identical to an already lowered node. This saves virtual registers, and more importantly it avoids creating copies the the coalescer doesn't know how to eliminate. Teach LiveIntervalAnalysis about the phi joins with multiple uses. This patch significantly reduces code size produced by -pre-regalloc-taildup. llvm-svn: 91549
* Revert "Initial work on disabling the scheduler. This is a work in progress, andDaniel Dunbar2009-12-163-155/+29
| | | | | | | this", this broke llvm-gcc bootstrap for release builds on x86_64-apple-darwin10. llvm-svn: 91533
* Do better with physical reg operands (typically, from inline asm)Dale Johannesen2009-12-161-16/+41
| | | | | | | | | | | | | | | | | | in local register allocator. If a reg-reg copy has a phys reg input and a virt reg output, and this is the last use of the phys reg, assign the phys reg to the virt reg. If a reg-reg copy has a phys reg output and we need to reload its spilled input, reload it directly into the phys reg than passing it through another reg. Following 76208, there is sometimes no dependency between the def of a phys reg and its use; this creates a window where that phys reg can be used for spilling (this is true in linear scan also). This is bad and needs to be fixed a better way, although 76208 works too well in practice to be reverted. However, there should normally be no spilling within inline asm blocks. The patch here goes a long way towards making this actually be true. llvm-svn: 91485
* Explicit template instantiations must happen in the template's immediatelyJohn McCall2009-12-162-0/+4
| | | | | | enclosing namespace. Caught by clang++. llvm-svn: 91480
* Helpful comment added. Some code cleanup. No functional change.Bill Wendling2009-12-161-11/+27
| | | | llvm-svn: 91479
* Initialize uninitialized variables.Bill Wendling2009-12-161-1/+1
| | | | llvm-svn: 91477
* Initialize uninitialized variables.Bill Wendling2009-12-161-1/+1
| | | | llvm-svn: 91475
* Add support to emit debug info for C++ namespaces.Devang Patel2009-12-153-22/+77
| | | | llvm-svn: 91440
* Remove isPod() from DenseMapInfo, splitting it out to its ownChris Lattner2009-12-151-1/+0
| | | | | | | | isPodLike type trait. This is a generally useful type trait for more than just DenseMap, and we really care about whether something acts like a pod, not whether it really is a pod. llvm-svn: 91421
* Make 91378 more conservative.Evan Cheng2009-12-151-1/+11
| | | | | | | 1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest. 2. If the shift is a left shift, make sure the original shift cannot shift out bits. llvm-svn: 91399
* Initial work on disabling the scheduler. This is a work in progress, and thisBill Wendling2009-12-153-29/+155
| | | | | | | | | | | | | | | stuff isn't used just yet. We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2' flags. The hypothesis is that the people who use these flags know what they are doing, and have hand-optimized the C code to reduce latencies and other conflicts. The idea behind our scheme to turn off scheduling is to create a map "on the side" during DAG generation. It will order the nodes by how they appeared in the code. This map is then used during scheduling to get the ordering. llvm-svn: 91392
* Tail duplication should zap a copy it inserted for SSA update if the copy is ↵Evan Cheng2009-12-151-13/+37
| | | | | | the only use of its source. llvm-svn: 91390
* Fold (zext (and x, cst)) -> (and (zext x), cst).Evan Cheng2009-12-151-0/+13
| | | | llvm-svn: 91380
* Propagate zest through logical shift.Evan Cheng2009-12-151-0/+10
| | | | llvm-svn: 91378
* Revert these. They may have been causing 483_xalancbmk to fail:Bill Wendling2009-12-152-52/+26
| | | | | | | | | | | | | | | | | | | | $ svn merge -c -91161 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91161 into '.': U lib/CodeGen/BranchFolding.cpp U lib/CodeGen/MachineBasicBlock.cpp $ svn merge -c -91113 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91113 into '.': G lib/CodeGen/MachineBasicBlock.cpp $ svn merge -c -91101 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91101 into '.': U include/llvm/CodeGen/MachineBasicBlock.h G lib/CodeGen/MachineBasicBlock.cpp $ svn merge -c -91092 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91092 into '.': G include/llvm/CodeGen/MachineBasicBlock.h G lib/CodeGen/MachineBasicBlock.cpp llvm-svn: 91376
* Fix integer cast code to handle vector types.Dan Gohman2009-12-142-20/+45
| | | | llvm-svn: 91362
* Fix this to properly clear the FastISel debug location. Thanks toDan Gohman2009-12-141-1/+1
| | | | | | Bill for spotting this! llvm-svn: 91355
* The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,Bill Wendling2009-12-141-7/+6
| | | | | | but we need it to actually be 4-bytes in the FDE. llvm-svn: 91337
* Use DW_AT_specification to point to DIE describing function declaration.Devang Patel2009-12-142-63/+32
| | | | llvm-svn: 91278
* Added CalcSpillWeights to CMakeLists.Lang Hames2009-12-141-0/+1
| | | | llvm-svn: 91275
* Whitespace changes, comment clarification. No functional changes.Bill Wendling2009-12-141-3/+3
| | | | llvm-svn: 91274
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