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* mi-sched: update PressureDiffs on-the-fly for liveness.Andrew Trick2013-08-303-29/+85
| | | | | | | This removes all expensive pressure tracking logic from the scheduling critical path of node comparison. llvm-svn: 189643
* Replace LiveInterval::killedAt with isKilledAtInstr.Andrew Trick2013-08-302-4/+4
| | | | | | Return true for LRGs that end at EarlyClobber or Register slots. llvm-svn: 189642
* mi-sched: improve the generic register pressure comparison.Andrew Trick2013-08-301-14/+12
| | | | | | | Only compare pressure within the same set. When multiple sets are affected, we prioritize the most constrained set. llvm-svn: 189641
* mi-sched: Precompute a PressureDiff for each instruction, adjust for ↵Andrew Trick2013-08-303-66/+264
| | | | | | | | | | | | | liveness later. Created SUPressureDiffs array to hold the per node PDiff computed during DAG building. Added a getUpwardPressureDelta API that will soon replace the old one. Compute PressureDelta here from the precomputed PressureDiffs. Updating for liveness will come next. llvm-svn: 189640
* comment typoAndrew Trick2013-08-301-1/+1
| | | | llvm-svn: 189635
* Don't bother emitting the pubtypes section on darwin since there aren'tEric Christopher2013-08-301-7/+3
| | | | | | any maintained consumers of it on that platform. llvm-svn: 189631
* Reformat slightly.Eric Christopher2013-08-301-4/+4
| | | | llvm-svn: 189630
* Comment and revise the cyclic critical path code.Andrew Trick2013-08-292-72/+116
| | | | | | This should be much more clear now. It's still disabled pending testing. llvm-svn: 189597
* Revert: r189565 - Add getUnrollingPreferences to TTIHal Finkel2013-08-291-5/+0
| | | | | | | | | | | | | | | Revert unintentional commit (of an unreviewed change). Original commit message: Add getUnrollingPreferences to TTI Allow targets to customize the default behavior of the generic loop unrolling transformation. This will be used by the PowerPC backend when targeting the A2 core (which is in-order with a deep pipeline), and using more aggressive defaults is important. llvm-svn: 189566
* Add getUnrollingPreferences to TTIHal Finkel2013-08-291-0/+5
| | | | | | | | | Allow targets to customize the default behavior of the generic loop unrolling transformation. This will be used by the PowerPC backend when targeting the A2 core (which is in-order with a deep pipeline), and using more aggressive defaults is important. llvm-svn: 189565
* Use TargetSubtargetInfo::useAA() in DAGCombineHal Finkel2013-08-291-3/+10
| | | | | | | This uses the TargetSubtargetInfo::useAA() function to control the defaults of the -combiner-alias-analysis and -combiner-global-alias-analysis options. llvm-svn: 189564
* Add useAA() to TargetSubtargetInfoHal Finkel2013-08-291-13/+19
| | | | | | | | | | | | | There are several optional (off-by-default) features in CodeGen that can make use of alias analysis. These features are important for generating code for some kinds of cores (for example the (in-order) PPC A2 core). This adds a useAA() function to TargetSubtargetInfo to allow these features to be enabled by default on a per-subtarget basis. Here is the first use of this function: To control the default of the -enable-aa-sched-mi feature. llvm-svn: 189563
* Fix a typo and coding style of a previous commit. No functional change.Juergen Ributzka2013-08-281-3/+2
| | | | llvm-svn: 189526
* Remove support for the .debug_inlined section. No known softwareEric Christopher2013-08-282-113/+0
| | | | | | in use supports it. llvm-svn: 189439
* Add a TODO here.Eric Christopher2013-08-281-0/+1
| | | | llvm-svn: 189428
* Add support for DW_FORM_dataN and DW_FORM_udata to the DIE hashingEric Christopher2013-08-282-0/+12
| | | | | | | algorithm. Update the split dwarf hashing testcase accordingly - this should be the last time that the hash of an empty file changes. llvm-svn: 189427
* Use DW_FORM_sdata for signed constant values and udata on occasionEric Christopher2013-08-271-22/+53
| | | | | | | | | | when we can. Migrate from using blocks when we're adding just a single attribute and floating point values are an unsigned, not signed, bag of bits. Update all test cases accordingly. llvm-svn: 189419
* DAGCombiner: make sure or/shl/srl really has zero high bits before forming bswapTim Northover2013-08-271-6/+24
| | | | | | | | We want to convert code like (or (srl N, 8), (shl N, 8)) into (srl (bswap N), const), but this is only valid if the bits above 16 on the source pattern are 0, the checks we were doing on this were slightly wrong before. llvm-svn: 189348
* Remove an over-zealous assertion. A pointer type could be illegal if the ↵Owen Anderson2013-08-271-1/+0
| | | | | | target is prepared to custom-legalize pointer operands. This assertion was evaluated before the target would have a chance to do so, making it impossible. llvm-svn: 189299
* Formatting.Eric Christopher2013-08-261-10/+10
| | | | llvm-svn: 189296
* Make the lifetime of the DICompileUnit we're constructing from theEric Christopher2013-08-261-2/+1
| | | | | | MDNode more clear as just for a single argument. llvm-svn: 189294
* Have the skeleton compile unit construction method take the CU itEric Christopher2013-08-262-6/+6
| | | | | | | | | | is constructing from as an input and keep the same unique identifier. We can use this to connect items which must stay in the .o file (e.g. pubnames and pubtypes) to the skeleton cu rather than having duplicate unique numbers for the sections and needing to do lookups based on MDNode. llvm-svn: 189293
* Remove duplicate set of CompilationDir.Eric Christopher2013-08-261-1/+0
| | | | llvm-svn: 189292
* Remove the language parameter and variable from the compile unit. WeEric Christopher2013-08-263-16/+16
| | | | | | can get it via the MDNode that's passed in. Save that instead. llvm-svn: 189291
* Treat the pubtypes section similarly to the pubnames section and emitEric Christopher2013-08-262-17/+20
| | | | | | | | | it by default under linux or when we're trying to keep compatibility with old gdb versions. Fix testcase for option name change. llvm-svn: 189289
* Only emit the section sym if we're emitting the section.Eric Christopher2013-08-261-1/+2
| | | | llvm-svn: 189288
* Fix thinko.Eric Christopher2013-08-261-1/+1
| | | | llvm-svn: 189279
* SelectionDAG: Remove unnecessary uses of TargetLowering::getPointerTy()Tom Stellard2013-08-267-43/+50
| | | | | | | | | | | | If we have a binary operation like ISD:ADD, we can set the result type equal to the result type of one of its operands rather than using TargetLowering::getPointerTy(). Also, any use of DAG.getIntPtrConstant(C) as an operand for a binary operation can be replaced with: DAG.getConstant(C, OtherOperand.getValueType()); llvm-svn: 189227
* SelectionDAG: Use correct pointer size when splitting vector storesTom Stellard2013-08-261-1/+1
| | | | llvm-svn: 189224
* SelectionDAG: Use correct pointer size when lowering function arguments v2Tom Stellard2013-08-262-5/+21
| | | | | | | | | | | | | | | | This adds minimal support to the SelectionDAG for handling address spaces with different pointer sizes. The SelectionDAG should now correctly lower pointer function arguments to the correct size as well as generate the correct code when lowering getelementptr. This patch also updates the R600 DataLayout to use 32-bit pointers for the local address space. v2: - Add more helper functions to TargetLoweringBase - Use CHECK-LABEL for tests llvm-svn: 189221
* AsmPrinter: Get rid of llvm$workaround$fake$stub$David Majnemer2013-08-251-10/+0
| | | | | | | | | We currently emit labels with the prefix Lllvm$workaround$fake$stub$ if the target's MCAsmInfo has getLinkOnceDirective() mapped to something interesting. This was apparently a work around introduced in r31033 for binutils that we don't need anymore. llvm-svn: 189187
* Add a function object to compare the first or second component of a std::pair.Benjamin Kramer2013-08-243-29/+7
| | | | | | Replace instances of this scattered around the code base. llvm-svn: 189169
* Simplify code. No functionality change.Benjamin Kramer2013-08-241-6/+1
| | | | llvm-svn: 189168
* DwarfDebug: Delete orphaned children.Benjamin Kramer2013-08-241-1/+4
| | | | | | Leak found by valgrind. llvm-svn: 189167
* PrintVRegOrUnitAndrew Trick2013-08-231-0/+8
| | | | llvm-svn: 189124
* Rename to RegPressure API parameters RegUnits.Andrew Trick2013-08-231-13/+14
| | | | llvm-svn: 189123
* Simplify RegPressure helpers.Andrew Trick2013-08-231-15/+12
| | | | llvm-svn: 189122
* Add a convenient PSetIterator for visiting pressure sets affected by a register.Andrew Trick2013-08-231-68/+21
| | | | llvm-svn: 189121
* Adds cyclic critical path computation and heuristics, temporarily disabled.Andrew Trick2013-08-232-21/+129
| | | | | | | | | | | Estimate the cyclic critical path within a single block loop. If the acyclic critical path is longer, then the loop will exhaust OOO resources after some number of iterations. If lag between the acyclic critical path and cyclic critical path is longer the the time it takes to issue those loop iterations, then aggressively schedule for latency. llvm-svn: 189120
* MI Sched: record local vreg uses.Andrew Trick2013-08-231-3/+5
| | | | | | | | | This will be used to compute the cyclic critical path and to update precomputed per-node pressure differences. In the longer term, it could also be used to speed up LiveInterval update by avoiding visiting all global vreg users. llvm-svn: 189118
* mi-sched: Don't call MBB.size() in initSUnits. The driver already has instr ↵Andrew Trick2013-08-234-16/+30
| | | | | | | | | count. This fixes a pathological compile time problem with very large blocks and lots of scheduling boundaries. llvm-svn: 189116
* Turn MipsOptimizeMathLibCalls into a target-independent scalar transformRichard Sandiford2013-08-231-0/+7
| | | | | | | | | | ...so that it can be used for z too. Most of the code is the same. The only real change is to use TargetTransformInfo to test when a sqrt instruction is available. The pass is opt-in because at the moment it only handles sqrt. llvm-svn: 189097
* [stack protector] Work around an issue with the BMOVPCB_CALL instruction on ↵Michael Gottesman2013-08-221-1/+1
| | | | | | | | | | ARM by disabling does not return on __stack_chk_fail. This is to fix the bots while I look to see if there is something I can do here. rdar://14811848 llvm-svn: 189076
* Check only if we have this attribute. If it's not an attribute, then it's ↵Bill Wendling2013-08-221-4/+2
| | | | | | assumed false. llvm-svn: 189063
* [stackprotector] When finding the split point to splice off the end of a ↵Michael Gottesman2013-08-221-9/+44
| | | | | | | | parentmbb into a successmbb, include any DBG_VALUE MI. Fix for PR16954. llvm-svn: 188987
* SelectionDAG: Make sure stores are always added to the LegalizedNodes listTom Stellard2013-08-211-1/+1
| | | | | | | | | | | | | | | | When truncated vector stores were being custom lowered in VectorLegalizer::LegalizeOp(), the old (illegal) and new (legal) node pair was not being added to LegalizedNodes list. Instead of the legalized result being passed to VectorLegalizer::TranslateLegalizeResult(), the result was being passed back into VectorLegalizer::LegalizeOp(), which ended up adding a (new, new) pair to the list instead. This was causing an assertion failure when a custom lowered truncated vector store was the last instruction a basic block and the VectorLegalizer was unable to find it in the LegalizedNodes list when updating the DAG root. llvm-svn: 188953
* Teach BaseIndexOffset::match to identify base pointers in loops.Juergen Ributzka2013-08-211-2/+14
| | | | | | | | | | | | | | The small utility function that pattern matches Base + Index + Offset patterns for loads and stores fails to recognize the base pointer for loads/stores from/into an array at offset 0 inside a loop. As a result DAGCombiner::MergeConsecutiveStores was not able to merge all stores. This commit fixes the issue by adding an additional pattern match and also a test case. Reviewer: Nadav llvm-svn: 188936
* DebugInfo: Do not use the DWARF Version for the .debug_pubnames or ↵David Majnemer2013-08-211-2/+3
| | | | | | | | | | | | | | | | | | | | | | | .debug_pubtypes version field Summary: LLVM would generate DWARF with version 3 in the .debug_pubname and .debug_pubtypes version fields. This would lead SGI dwarfdump to fail parsing the DWARF with (in the instance of .debug_pubnames) would exit with: dwarfdump ERROR: dwarf_get_globals: DW_DLE_PUBNAMES_VERSION_ERROR (123) This fixes PR16950. Reviewers: echristo, dblaikie Reviewed By: echristo CC: cfe-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1454 llvm-svn: 188869
* [SystemZ] Use SRST to optimize memchrRichard Sandiford2013-08-202-0/+36
| | | | | | | | | | | | | | | | | | | SystemZTargetLowering::emitStringWrapper() previously loaded the character into R0 before the loop and made R0 live on entry. I'd forgotten that allocatable registers weren't allowed to be live across blocks at this stage, and it confused LiveVariables enough to cause a miscompilation of f3 in memchr-02.ll. This patch instead loads R0 in the loop and leaves LICM to hoist it after RA. This is actually what I'd tried originally, but I went for the manual optimisation after noticing that R0 often wasn't being hoisted. This bug forced me to go back and look at why, now fixed as r188774. We should also try to optimize null checks so that they test the CC result of the SRST directly. The select between null and the SRST GPR result could then usually be deleted as dead. llvm-svn: 188779
* Fix overly pessimistic shortcut in post-RA MachineLICMRichard Sandiford2013-08-201-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Post-RA LICM keeps three sets of registers: PhysRegDefs, PhysRegClobbers and TermRegs. When it sees a definition of R it adds all aliases of R to the corresponding set, so that when it needs to test for membership it only needs to test a single register, rather than worrying about aliases there too. E.g. the final candidate loop just has: unsigned Def = Candidates[i].Def; if (!PhysRegClobbers.test(Def) && ...) { to test whether register Def is multiply defined. However, there was also a shortcut in ProcessMI to make sure we didn't add candidates if we already knew that they would fail the final test. This shortcut was more pessimistic than the final one because it checked whether _any alias_ of the defined register was multiply defined. This is too conservative for targets that define register pairs. E.g. on z, R0 and R1 are sometimes used as a pair, so there is a 128-bit register that aliases both R0 and R1. If a loop used R0 and R1 independently, and the definition of R0 came first, we would be able to hoist the R0 assignment (because that used the final test quoted above) but not the R1 assignment (because that meant we had two definitions of the paired R0/R1 register and would fail the shortcut in ProcessMI). This patch just uses the same check for the ProcessMI shortcut as we use in the final candidate loop. llvm-svn: 188774
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