summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* Generate an error message instead of asserting or segfaulting when we can'tChad Rosier2013-03-011-0/+1
| | | | | | | handle indirect register inputs. rdar://13322011 llvm-svn: 176367
* Fix PR10475Michael Liao2013-03-014-13/+25
| | | | | | | | | | | | | | - ISD::SHL/SRL/SRA must have either both scalar or both vector operands but TLI.getShiftAmountTy() so far only return scalar type. As a result, backend logic assuming that breaks. - Rename the original TLI.getShiftAmountTy() to TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to return target-specificed scalar type or the same vector type as the 1st operand. - Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar type. llvm-svn: 176364
* Scheduler diagnostics. Print the register name.Andrew Trick2013-03-011-0/+2
| | | | llvm-svn: 176316
* Instructions schedulers should report correct height/depth.Andrew Trick2013-03-011-2/+2
| | | | | | | | | | | | | We avoided computing DAG height/depth during Node printing because it shouldn't depend on an otherwise valid DAG. But this has become far too annoying for the common case of a valid DAG where we want to see valid values. If doing the computation on-the-fly turns out to be a problem in practice, then I'll add a mode to the diagnostics to only force it when we're likely to have a valid DAG, otherwise explicitly print INVALID instead of bogus numbers. For now, just go for it all the time. llvm-svn: 176314
* A small refactoring + adding comments.Eli Bendersky2013-02-282-10/+5
| | | | | | | | | | | SelectionDAGIsel::LowerArguments needs a function, not a basic block. So it makes sense to pass it the function instead of extracting a basic-block from the function and then tossing it. This is also more self-documenting (functions have arguments, BBs don't). In addition, added comments to a couple of Select* methods. llvm-svn: 176305
* Cost model support for lowered math builtins.Benjamin Kramer2013-02-281-12/+67
| | | | | | | | | | We make the cost for calling libm functions extremely high as emitting the calls is expensive and causes spills (on x86) so performance suffers. We still vectorize important calls like ceilf and friends on SSE4.1. and fabs. Differential Revision: http://llvm-reviews.chandlerc.com/D466 llvm-svn: 176287
* Put some per-instruction statistics of fast isel under NDEBUG, together withEli Bendersky2013-02-281-3/+5
| | | | | | other per-instruction statistics. llvm-svn: 176273
* Remove unnecessary check against isGlobalVariable. We check itEric Christopher2013-02-271-1/+1
| | | | | | a few lines above. llvm-svn: 176224
* Rework comment slightly and fix a few typos.Eric Christopher2013-02-271-8/+5
| | | | llvm-svn: 176223
* Remove unnecessary cast to void.Eric Christopher2013-02-271-1/+0
| | | | llvm-svn: 176222
* Debug Info: for static member variables, always put AT_MIPS_linkage_name to theManman Ren2013-02-271-5/+12
| | | | | | | | | | | | definition DIE (TAG_variable), and put AT_MIPS_linkage_name to TAG_member when DarwinGDBCompat is true. Darwin GDB needs AT_MIPS_linkage_name at both places to work. Follow-up patch to r176143. rdar://problem/13291234 llvm-svn: 176220
* Silence the unused variable warning. Nadav Rotem2013-02-271-5/+7
| | | | llvm-svn: 176218
* The FastISEL should be fast. But when we record statistics we use atomic ↵Nadav Rotem2013-02-271-9/+10
| | | | | | | | operations to increment the counters. This patch disables the counters on non-debug builds. This reduces the runtime of SelectionDAGISel::SelectCodeCommon by ~5%. llvm-svn: 176214
* Reverted: r176136 - Have a way for a target to opt-out of target-independent ↵Michael Ilseman2013-02-271-1/+1
| | | | | | fast isel llvm-svn: 176204
* SelectionDAG: If llvm.donothing has a landingpad, we should clearManman Ren2013-02-271-0/+7
| | | | | | | | | CurrentCallSite to avoid an assertion failure: assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!"); rdar://problem/13228754 llvm-svn: 176154
* Debug Info: for static member variables, add AT_MIPS_linkage_name to theManman Ren2013-02-271-1/+7
| | | | | | | | | | | | definition DIE, to make old GDB happy. We have a regression for old GDB when Clang uses DW_TAG_member to declare static members inside a class, instead of DW_TAG_variable. This patch will fix this regression. rdar://problem/13291234 llvm-svn: 176143
* Have a way for a target to opt-out of target-independent fast iselMichael Ilseman2013-02-261-1/+1
| | | | llvm-svn: 176136
* Revert r176120 as it caused a failure at static-member.cppManman Ren2013-02-261-4/+1
| | | | llvm-svn: 176129
* Debug Info: for static member variables, move AT_MIPS_linkage_name fromManman Ren2013-02-261-1/+4
| | | | | | | | | | | TAG_member inside a class to the specification DIE. Having AT_MIPS_linkage_name on TAG_member caused old gdb (GNU 6.3.50) to error out. Also gcc 4.7 has AT_MIPS_linkage_name on the specification DIE. rdar://problem/13291234 llvm-svn: 176120
* Fix wording.Chad Rosier2013-02-251-3/+4
| | | | llvm-svn: 176055
* [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 orChad Rosier2013-02-251-0/+10
| | | | | | | | | | fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. llvm-svn: 176052
* pre-RA-sched fix: only reevaluate physreg interferences when necessary.Andrew Trick2013-02-251-33/+61
| | | | | | Fixes rdar:13279013: scheduler was blowing up on select instructions. llvm-svn: 176037
* 'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay2013-02-251-2/+2
| | | | llvm-svn: 176031
* Fix spelling noticed by Duncan.Chandler Carruth2013-02-251-3/+3
| | | | llvm-svn: 176023
* Fix the root cause of PR15348 by correctly handling alignment 0 onChandler Carruth2013-02-252-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. llvm-svn: 176022
* Add a use of an otherwise unused variable to remove a warning in non-AssertsCameron Zwarich2013-02-241-0/+1
| | | | | | builds. llvm-svn: 175981
* TwoAddressInstructionPass::tryInstructionTransform() only potentially returnsCameron Zwarich2013-02-241-5/+4
| | | | | | | true when shouldOnlyCommute is false, so we can remove code that checks otherwise. llvm-svn: 175980
* TwoAddrInstructionPass::tryInstructionTransform() has a case where it callsCameron Zwarich2013-02-241-5/+10
| | | | | | | | | | | | | | | | itself recursively with a new instruction that has not been finalized, in order to determine whether to keep the instruction. On 'make check' and test-suite the only cases where the recursive invocation made any transformations were simple instruction commutations, so I am restricting the recursive invocation to do only this. The other cases wouldn't work correctly when updating LiveIntervals, since the new instructions don't have slot indices and LiveIntervals hasn't yet been updated. If the other transformations were actually triggering in any test case it would be possible to support it with a lot of effort, but since they don't it's not worth it. llvm-svn: 175979
* TargetInstrInfo::commuteInstruction() doesn't actually return a new instructionCameron Zwarich2013-02-231-13/+3
| | | | | | | unless it was requested to with an optional parameter that defaults to false, so we don't need to handle that case in TwoAddressInstructionPass. llvm-svn: 175974
* Make some fixes for LiveInterval repair with debug info. Debug valueCameron Zwarich2013-02-232-2/+6
| | | | | | MachineInstrs don't have a slot index. llvm-svn: 175961
* Fix a bug with the LiveIntervals updating in the two-address pass found byCameron Zwarich2013-02-231-1/+1
| | | | | | running ASCI_Purple/SMG2000 in the test-suite. llvm-svn: 175957
* Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.Cameron Zwarich2013-02-231-15/+34
| | | | llvm-svn: 175956
* Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware inCameron Zwarich2013-02-231-30/+85
| | | | | | | | TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky, since multiple instructions need to be moved down, one-at-a-time, in reverse order. llvm-svn: 175955
* Use getSplitDebugFilename when constructing the skeleton cu andEric Christopher2013-02-221-4/+2
| | | | | | update testcase accordingly to give the correct name to the cu. llvm-svn: 175934
* SelectionDAG compile time improvement.Nadav Rotem2013-02-221-0/+19
| | | | | | | | One of the phases of SelectionDAG is LegalizeVectors. We don't need to sort the DAG and copy nodes around if there are no vector ops. Speeds up the compilation time of SelectionDAG on a big scalar workload by ~8%. llvm-svn: 175929
* Fix isa<> check which could never be true.Pete Cooper2013-02-221-1/+1
| | | | | | | | | | | | It was incorrectly checking a Function* being an IntrinsicInst* which isn't possible. It should always have been checking the CallInst* instead. Added test case for x86 which ensures we only get one constant load. It was 2 before this change. rdar://problem/13267920 llvm-svn: 175853
* Stop relying on physical register kill flags in isKilled() in the two-addressCameron Zwarich2013-02-211-3/+10
| | | | | | | | | | | | | | pass. One of the callers of isKilled() can cope with overapproximation of kills and the other can't, so I added a flag to indicate this. In theory this could pessimize code slightly, but in practice most physical register uses are kills, and most important kills of physical registers are the only uses of that register prior to register allocation, so we can recognize them as kills even without kill flags. This is relevant because LiveIntervals gets rid of all kill flags. llvm-svn: 175821
* Re-apply r175688, with the changes suggested by Jakob in PR15320.Lang Hames2013-02-211-24/+15
| | | | llvm-svn: 175809
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-3/+2
| | | | | | | | | | | | | | | to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. llvm-svn: 175788
* Make RAFast::UsedInInstr indexed by register units.Jakob Stoklund Olesen2013-02-211-22/+30
| | | | | | | | | | This fixes some problems with too conservative checking where we were marking all aliases of a register as used, and then also checking all aliases when allocating a register. <rdar://problem/13249625> llvm-svn: 175782
* Revert r175688 - It broke a test case (see PR15320).Lang Hames2013-02-211-13/+25
| | | | llvm-svn: 175765
* DAGCombiner: Make the post-legalize vector op optimization more aggressive.Benjamin Kramer2013-02-211-10/+0
| | | | | | | | A legal BUILD_VECTOR goes in and gets constant folded into another legal BUILD_VECTOR so we don't lose any legality here. The problematic PPC optimization that made this check necessary was fixed recently. llvm-svn: 175759
* Don't rely on the isDead() MachineOperand flag when updating LiveIntervals.Cameron Zwarich2013-02-211-1/+3
| | | | llvm-svn: 175732
* Use getInterval() instead of getOrCreateInterval().Cameron Zwarich2013-02-211-1/+1
| | | | llvm-svn: 175731
* Make another kill check LiveIntervals-aware.Cameron Zwarich2013-02-211-1/+1
| | | | | | | This brings the number of remaining failures in 'make check' without LiveVariables down to 39, with 1 unexpectedly passing test. llvm-svn: 175727
* Split part of isKilled() into a separate function for use elsewhere.Cameron Zwarich2013-02-211-22/+28
| | | | llvm-svn: 175726
* Update isKilledAt in TwoAddressInstructionPass.cpp to use LiveIntervals whenCameron Zwarich2013-02-211-4/+26
| | | | | | | | | | available. With this commit there are no longer any assertion or verifier failures when running 'make check' without LiveVariables. There are still 56 failing tests with codegen differences and 1 unexpectedly passing test. llvm-svn: 175719
* Don't allocate memory in LiveInterval::join().Jakob Stoklund Olesen2013-02-201-10/+7
| | | | | | | Rewrite value numbers directly in the 'Other' LiveInterval which is moribund anyway. This avoids allocating the OtherAssignments vector. llvm-svn: 175690
* Kill of TransferDeadFlag - Dead copies and subreg-to-reg instructions shouldLang Hames2013-02-201-25/+13
| | | | | | just be turned into kills on the spot. llvm-svn: 175688
* Copy single reaching defs directly into the LiveInterval.Jakob Stoklund Olesen2013-02-202-47/+76
| | | | | | | | | | | | | | | | | | When findReachingDefs() finds that only one value can reach the basic block, just copy the work list of visited blocks directly into the live interval. Sort the block list and use a LiveRangeUpdater to make the bulk add fast. When multiple reaching defs are found, transfer the work list to the updateSSA() work list as before. Also use LiveRangeUpdater in updateLiveIns() following updateSSA(). This makes live interval analysis more than 3x faster on one huge test case. llvm-svn: 175685
OpenPOWER on IntegriCloud