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* Eliminate operator[] is deprecated warningsChris Lattner2004-02-181-16/+21
| | | | llvm-svn: 11578
* Fix deprecated operator[] warningsChris Lattner2004-02-181-15/+17
| | | | llvm-svn: 11577
* Be more agressive when joining ranges.Alkis Evlogimenos2004-02-181-9/+9
| | | | llvm-svn: 11575
* Fix overly conservative spill interval computation.Alkis Evlogimenos2004-02-181-4/+3
| | | | llvm-svn: 11574
* Beautify debug output.Alkis Evlogimenos2004-02-181-3/+8
| | | | llvm-svn: 11573
* Remove the -disable-kill option. The register allocator is buggy with it,Chris Lattner2004-02-171-50/+39
| | | | | | and it was only for debugging in the first place. llvm-svn: 11557
* Add support to the local allocator for fusing spill code into the instructionsChris Lattner2004-02-171-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that need them. This is very useful on CISCy targets like the X86 because it reduces the total spill pressure, and makes better use of it's (large) instruction set. Though the X86 backend doesn't know how to rewrite many instructions yet, this already makes a substantial difference on 176.gcc for example: Before: Time: 8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator Code quality: 734559 asm-printer - Number of machine instrs printed 111395 ra-local - Number of registers reloaded 79902 ra-local - Number of registers spilled 231554 x86-peephole - Number of peephole optimization performed After: Time: 7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator Code quality: 733083 asm-printer - Number of machine instrs printed 2379 ra-local - Number of reloads fused into instructions 109046 ra-local - Number of registers reloaded 79881 ra-local - Number of registers spilled 230658 x86-peephole - Number of peephole optimization performed So by fusing 2300 instructions, we reduced the static number of instructions by 1500, and reduces the number of peepholes (and thus the work) by about 900. This also clearly reduces the number of reload/spill instructions that are emitted. llvm-svn: 11542
* Fix a bug in my previous refactoring change... arg!Chris Lattner2004-02-171-1/+3
| | | | llvm-svn: 11535
* Once we have a way to fold spill code reloads into instructions, we have a ↵Chris Lattner2004-02-171-2/+17
| | | | | | way to use it. :) llvm-svn: 11517
* Fix spilled interval update. It was too conservative.Alkis Evlogimenos2004-02-171-1/+4
| | | | llvm-svn: 11516
* Refactor code a bit. No functionality changes, though the comment hints at ↵Chris Lattner2004-02-171-30/+46
| | | | | | things to come. llvm-svn: 11515
* Add LeakDetection to MachineInstr.Alkis Evlogimenos2004-02-163-11/+80
| | | | | | | Move out of line member functions of MachineBasicBlock to MachineBasicBlock.cpp. llvm-svn: 11497
* This pass should not require phi elimination or live variableAlkis Evlogimenos2004-02-151-13/+13
| | | | | | | analysis. It should only preserve them and update LiveVariables if it already ran. llvm-svn: 11479
* Finegrainify namespacificationChris Lattner2004-02-151-8/+12
| | | | | | Remove one of the operands of a two operand instruction llvm-svn: 11478
* Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos2004-02-154-7/+6
| | | | | | | | | | MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. llvm-svn: 11477
* Eliminate the use of spill (reserved) registers.Alkis Evlogimenos2004-02-152-336/+317
| | | | llvm-svn: 11476
* Allow for fixed objects to reside in the local area, and if they don't to notChris Lattner2004-02-151-6/+13
| | | | | | clobber them by allocating other objects in the same space! llvm-svn: 11454
* Add back machine code deleter pass until we get a MachineCode passAlkis Evlogimenos2004-02-151-0/+21
| | | | | | | that will be responsible for the creation of MachineFunctions and will be required by all MachineFunctionPass passes. llvm-svn: 11453
* There is no reason to align the stack pointer if there are no callees of ↵Chris Lattner2004-02-141-2/+5
| | | | | | this function! llvm-svn: 11449
* Use newly added next() and prior() utility functions.Alkis Evlogimenos2004-02-142-6/+5
| | | | llvm-svn: 11430
* Use std::numeric_limits<float>::infinity() instead ofAlkis Evlogimenos2004-02-142-2/+2
| | | | | | | std::numeric_limits<float>::max() for weighting preallocated intervals. llvm-svn: 11427
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-138-26/+26
| | | | llvm-svn: 11393
* Use getNumVirtualRegs().Alkis Evlogimenos2004-02-131-41/+34
| | | | | | Whitespace cleanups. llvm-svn: 11389
* Refactor MachineFunction::print() into MachineBasicBlock::print().Brian Gaeke2004-02-131-8/+12
| | | | | | Add MachineBasicBlock::dump(). llvm-svn: 11364
* Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.Brian Gaeke2004-02-131-36/+32
| | | | | | | | Rename SetMachineOperandConst's formal parameters to match other methods here. Mark some methods as being used only by the SPARC back-end. Fix a missing-paren bug in OutputValue(). llvm-svn: 11363
* Add parent pointer to MachineInstr that points to owningAlkis Evlogimenos2004-02-121-7/+14
| | | | | | | | MachineBasicBlock. Also change opcode to a short and numImplicitRefs to an unsigned char so that overall MachineInstr's size stays the same. llvm-svn: 11357
* Rename the opCode instance variable to OpcodeChris Lattner2004-02-121-29/+15
| | | | llvm-svn: 11348
* This field is never readChris Lattner2004-02-121-3/+0
| | | | llvm-svn: 11346
* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-1212-148/+115
| | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. llvm-svn: 11340
* getOpCode() --> getOpcode().Brian Gaeke2004-02-124-53/+53
| | | | llvm-svn: 11339
* Add #includeChris Lattner2004-02-101-0/+1
| | | | llvm-svn: 11285
* Do not use MachineOperand::isVirtualRegister either!Chris Lattner2004-02-107-27/+29
| | | | llvm-svn: 11283
* Eliminate users of MachineOperand::isPhysicalRegisterChris Lattner2004-02-103-5/+8
| | | | llvm-svn: 11278
* Move InstrSchedule's iterator begin/end methods inline.Brian Gaeke2004-02-091-28/+4
| | | | llvm-svn: 11239
* Make SchedGraph::dump() use SchedGraphNodeCommon's const_iteratorBrian Gaeke2004-02-091-25/+14
| | | | | | | | | instead of randomly groping about inside its outEdges array. Make SchedGraph::addDummyEdges() use getNumOutEdges() instead of outEdges.size(). Get rid of ifdefed-out code in SchedGraph::buildGraph(). llvm-svn: 11238
* Another nice speedup for the register allocator. This time, we replaceChris Lattner2004-02-091-37/+55
| | | | | | | | the Virt2PhysRegMap std::map with an std::vector. This speeds up the register allocator another (almost) 40%, from .72->.45s in a release build of LLC on 253.perlbmk. llvm-svn: 11219
* Ugh, perform an optimization that GCC should be able to do itself. ThisChris Lattner2004-02-091-6/+7
| | | | | | speeds up livevar from .48/.32s -> .45/.31s in LLC on perlbmk llvm-svn: 11217
* Only do stuff for the REAL number of physical registers we have, not 1024.Chris Lattner2004-02-091-10/+8
| | | | | | | This speeds up live variables a lot, from .60/.39s -> .47/.26s in LLC, for the first/second pass respectively. llvm-svn: 11216
* Change the PhysRegsUsed map into a dense array. Seeing that this is a mappingChris Lattner2004-02-091-34/+35
| | | | | | | | | | | | | from physical registers, and they are always dense, it makes sense to not have a ton of RBtree overhead. This change speeds up regalloclocal about ~30% on 253.perlbmk, from .35s -> .27s in the JIT (in LLC, it goes from .74 -> .55). Now live variable analysis is the slowest codegen pass. Of course it doesn't help that we have to run it twice, because regalloclocal doesn't update it, but even if it did it would be the slowest pass (now it's just the 2x slowest pass :( llvm-svn: 11215
* Increase code clarity.Alkis Evlogimenos2004-02-061-127/+100
| | | | llvm-svn: 11151
* Eliminate uneeded lookups by passing a Virt2PhysMap::iterator insteadAlkis Evlogimenos2004-02-061-23/+33
| | | | | | of the virtual register to certain functions. llvm-svn: 11143
* Change live interval representation. Machine instructions now have twoAlkis Evlogimenos2004-02-051-22/+31
| | | | | | | | | | | | | | | | | | slots each. As a concequence they get numbered as 0, 2, 4 and so on. The first slot is used for operand uses and the second for defs. Here's an example: 0: A = ... 2: B = ... 4: C = A + B ;; last use of A The live intervals should look like: A = [1, 5) B = [3, x) C = [5, y) llvm-svn: 11141
* We don't need to scan the blocks that we are live-in on everyAlkis Evlogimenos2004-02-051-12/+13
| | | | | | access. Rather we only have to do it on the creation of the interval. llvm-svn: 11135
* Added missing include.Tanya Lattner2004-02-051-0/+1
| | | | llvm-svn: 11129
* Modify the two address instruction pass to remove the duplicateAlkis Evlogimenos2004-02-043-104/+94
| | | | | | operand of the instruction and thus simplify the register allocation. llvm-svn: 11124
* When an instruction like: A += B had both A and B virtual registersAlkis Evlogimenos2004-02-032-10/+24
| | | | | | spilled, A was loaded from its stack location twice. This fixes the bug. llvm-svn: 11093
* Revert changes. Will implement this using a different set of primitivesAlkis Evlogimenos2004-02-021-9/+3
| | | | llvm-svn: 11091
* Fix debugging output.Alkis Evlogimenos2004-02-021-1/+1
| | | | llvm-svn: 11088
* Correctly update def/use information for modified machine operands.Alkis Evlogimenos2004-02-021-3/+9
| | | | llvm-svn: 11087
* Should be more careful. The previously applied change made all countsAlkis Evlogimenos2004-02-021-10/+6
| | | | | | outside of loops = 0. llvm-svn: 11085
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