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* Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.Jakob Stoklund Olesen2011-04-052-0/+14
| | | | llvm-svn: 128935
* Refactor.Devang Patel2011-04-052-15/+21
| | | | llvm-svn: 128929
* Add an assertion instead of crashing when the scavenger goes past the endBob Wilson2011-04-051-1/+2
| | | | | | of a basic block. llvm-svn: 128925
* When dead code elimination removes all but one use, try to fold the single ↵Jakob Stoklund Olesen2011-04-052-0/+55
| | | | | | | | def into the remaining use. Rematerialization can leave single-use loads behind that we might as well fold whenever possible. llvm-svn: 128918
* Do not emit empty name.Devang Patel2011-04-051-1/+2
| | | | llvm-svn: 128914
* Ensure all defs referring to a virtual register are marked dead by ↵Jakob Stoklund Olesen2011-04-051-7/+2
| | | | | | | | | | | | addRegisterDead(). There can be multiple defs for a single virtual register when they are defining sub-registers. The missing <dead> flag was stopping the inline spiller from eliminating dead code after rematerialization. llvm-svn: 128888
* Print visibility info for external variables.Rafael Espindola2011-04-051-10/+12
| | | | llvm-svn: 128887
* Use std::unique instead of a SmallPtrSet to ensure unique instructions in ↵Jakob Stoklund Olesen2011-04-052-54/+26
| | | | | | | | | | | UseSlots. This allows us to always keep the smaller slot for an instruction which is what we want when a register has early clobber defines. Drop the UsingInstrs set and the UsingBlocks map. They are no longer needed. llvm-svn: 128886
* Stop precomputing last split points, query the SplitAnalysis cache on demand.Jakob Stoklund Olesen2011-04-053-21/+17
| | | | llvm-svn: 128875
* Cache the fairly expensive last split point computation and provide a fastJakob Stoklund Olesen2011-04-052-14/+54
| | | | | | | | | inlined path for the common case. Most basic blocks don't contain a call that may throw, so the last split point os simply the first terminator. llvm-svn: 128874
* Revamp the SjLj "dispatch setup" intrinsic.Bill Wendling2011-04-052-9/+6
| | | | | | | | | | | | It needed to be moved closer to the setjmp statement, because the code directly after the setjmp needs to know about values that are on the stack. Also, the 'bitcast' of the function context was causing a dead load. This wouldn't be too horrible, except that at -O0 it wasn't optimized out, and because it wasn't using the correct base pointer (if there is a VLA), it would try to access a value from a garbage address. <rdar://problem/9130540> llvm-svn: 128873
* Revert 123704; it broke threaded LLVM.Stuart Hastings2011-04-051-9/+15
| | | | llvm-svn: 128868
* Allow coalescing with reserved physregs in certain cases:Jakob Stoklund Olesen2011-04-043-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | When a virtual register has a single value that is defined as a copy of a reserved register, permit that copy to be joined. These virtual register are usually copies of the stack pointer: %vreg75<def> = COPY %ESP; GR32:%vreg75 MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill> MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0 MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0 CALLpcrel32 ... Coalescing these virtual registers early decreases register pressure. Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after register allocation was completed. The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail because it depends on linear scan spilling a particular register. I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of instructions emitted, and its revision history shows the 'correct' count being edited many times. llvm-svn: 128845
* Extract physreg joining policy to a separate method.Jakob Stoklund Olesen2011-04-042-53/+60
| | | | llvm-svn: 128844
* Stop caching basic block index ranges now that SlotIndexes can keep up.Jakob Stoklund Olesen2011-04-043-30/+33
| | | | llvm-svn: 128821
* Delete leftover data members.Jakob Stoklund Olesen2011-04-041-4/+0
| | | | llvm-svn: 128820
* Use InterferenceCache in RegAllocGreedy.Jakob Stoklund Olesen2011-04-021-94/+46
| | | | llvm-svn: 128765
* Add an InterferenceCache class for caching per-block interference ranges.Jakob Stoklund Olesen2011-04-024-1/+300
| | | | | | | | When the greedy register allocator is splitting multiple global live ranges, it tends to look at the same interference data many times. The InterferenceCache class caches queries for unaltered LiveIntervalUnions. llvm-svn: 128764
* Use basic block numbers as indexes when mapping slot index ranges.Jakob Stoklund Olesen2011-04-021-11/+9
| | | | | | This is more compact and faster than using DenseMap. llvm-svn: 128763
* Add a RemoveFromWorklist method to DCI. This is needed to do some complicatedCameron Zwarich2011-04-021-0/+4
| | | | | | | | transformations in target-specific DAG combines without causing DAGCombiner to delete the same node twice. If you know of a better way to avoid this (see my next patch for an example), please let me know. llvm-svn: 128758
* Add comments.Evan Cheng2011-04-011-2/+4
| | | | llvm-svn: 128730
* Assign node order numbers to results of call instruction lowering. This ↵Evan Cheng2011-04-011-4/+8
| | | | | | should improve src line debug info when sdisel is used. rdar://9199118 llvm-svn: 128728
* Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.Evan Cheng2011-04-012-19/+154
| | | | | | rdar://8911343 llvm-svn: 128696
* The basic register allocator must also use the inline spiller.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | It is using a trivial rewriter that doesn't know how to insert spill code requested by the standard spiller. llvm-svn: 128688
* Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen2011-03-311-6/+12
| | | | | | | | | liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. llvm-svn: 128645
* Allow kill flags on two-address instructions. They are harmless.Jakob Stoklund Olesen2011-03-311-6/+2
| | | | llvm-svn: 128643
* Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen2011-03-313-8/+20
| | | | | | | | | | | | This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. llvm-svn: 128642
* Remove dead code.Devang Patel2011-03-311-5/+1
| | | | llvm-svn: 128639
* Fix bug found by valgrind.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | llvm-svn: 128634
* lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use ↵NAKAMURA Takumi2011-03-311-1/+3
| | | | | | | | | | std::pow(float,float) here. We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts). For consistency, std::pow(double,double) may be called instead. Or, precision issue might attack us, to see unstable regalloc and stack coloring. llvm-svn: 128629
* Pick a conservative register class when creating a small live range for remat.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | | | | | | The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
* Fix evil VirtRegRewriter bug.Jakob Stoklund Olesen2011-03-301-0/+28
| | | | | | | | | | | | | | | The rewriter can keep track of multiple stack slots in the same register if they happen to have the same value. When an instruction modifies a stack slot by defining a register that is mapped to a stack slot, other stack slots in that register are no longer valid. This is a very rare problem, and I don't have a simple test case. I get the impression that VirtRegRewriter knows it is about to be deleted, inventing a last opaque problem. <rdar://problem/9204040> llvm-svn: 128562
* Teach VirtRegRewriter about the new virtual register numbers. No functional ↵Jakob Stoklund Olesen2011-03-301-10/+11
| | | | | | change. llvm-svn: 128561
* Remove PHINode::reserveOperandSpace(). Instead, add a parameter toJay Foad2011-03-301-3/+3
| | | | | | PHINode::Create() giving the (known or expected) number of operands. llvm-svn: 128537
* (Almost) always call reserveOperandSpace() on newly created PHINodes.Jay Foad2011-03-301-0/+1
| | | | llvm-svn: 128535
* Treat clones the same as their origin.Jakob Stoklund Olesen2011-03-303-6/+29
| | | | | | | | | | | | When DCE clones a live range because it separates into connected components, make sure that the clones enter the same register allocator stage as the register they were cloned from. For instance, clones may be split even when they where created during spilling. Other registers created during spilling are not candidates for splitting or even (re-)spilling. llvm-svn: 128524
* Tidy up. 80 columns and trailing whitespace.Jim Grosbach2011-03-291-145/+146
| | | | llvm-svn: 128504
* Recompute register class and hint for registers created during spilling.Jakob Stoklund Olesen2011-03-296-60/+87
| | | | | | The spill weight is not recomputed for an unspillable register - it stays infinite. llvm-svn: 128490
* Remember to use the correct register when rematerializing for snippets.Jakob Stoklund Olesen2011-03-292-6/+7
| | | | llvm-svn: 128469
* Run dead code elimination immediately after rematerialization.Jakob Stoklund Olesen2011-03-291-9/+24
| | | | | | | This may eliminate some uses of the spilled registers, and we don't want to insert reloads for that. llvm-svn: 128468
* Inline check that's used only once.Bill Wendling2011-03-291-2/+1
| | | | llvm-svn: 128465
* Rework the logic (and removing the bad check for an unreachable block) so thatBill Wendling2011-03-291-8/+5
| | | | | | | the FailBB dominator is correctly calculated. Believe it or not, there isn't a functionality change here. llvm-svn: 128455
* Don't try to add stack protector logic to a dead basic block. It messes upBill Wendling2011-03-291-1/+2
| | | | | | dominator information. llvm-svn: 128452
* Handle the special case when all uses follow the last split point.Jakob Stoklund Olesen2011-03-291-1/+2
| | | | llvm-svn: 128450
* Properly enable rematerialization when spilling after live range splitting.Jakob Stoklund Olesen2011-03-293-71/+129
| | | | | | | | The instruction to be rematerialized may not be the one defining the register that is being spilled. The traceSiblingValue() function sees through sibling copies to find the remat candidate. llvm-svn: 128449
* In some cases, the "fail BB dominator" may be null after the BB was split (andBill Wendling2011-03-281-1/+2
| | | | | | | becomes reachable when before it wasn't). Check to make sure that it's not null before trying to use it. llvm-svn: 128434
* Integrated-As: Add support for setting the AllowTemporaryLabels flag viaDaniel Dunbar2011-03-281-0/+6
| | | | | | integrated-as. llvm-svn: 128431
* Amend debug output.Jakob Stoklund Olesen2011-03-271-2/+3
| | | | llvm-svn: 128398
* Drop interference reassignment in favor of eviction.Jakob Stoklund Olesen2011-03-271-132/+15
| | | | | | | | | The reassignment phase was able to move interference with a higher spill weight, but it didn't happen very often and it was fairly expensive. The existing interference eviction picks up the slack. llvm-svn: 128397
* Use individual register classes when spilling snippets.Jakob Stoklund Olesen2011-03-262-24/+28
| | | | | | | | | The main register class may have been inflated by live range splitting, so that register class is not necessarily valid for the snippet instructions. Use the original register class for the stack slot interval. llvm-svn: 128351
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