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* Remove dead declarationMatt Arsenault2015-09-241-1/+0
| | | | llvm-svn: 248471
* Use new TokenFactor chain when merging storesMatt Arsenault2015-09-241-5/+29
| | | | | | | | | | | | | | | | | | | | | If the stores are storing values from loads which partially alias the stores, we could end up placing the merged loads and stores on the same chain which has the potential to break. Each store may have a different chain dependency on only some of the original loads. Create a new TokenFactor to capture all of the required dependencies of the stores rather than assuming all stores can use the same chain. The testcase is a situation where this happens, although it does not have an observable change from this. The DAG nodes just happened to not be reordered before despite this missing chain dependency. This is based on an off-list report for an out of tree target which regressed due to r246307 and I haven't managed to find a case where the nodes do end up reordered with an in tree target. llvm-svn: 248468
* Android support for SafeStack.Evgeniy Stepanov2015-09-231-1/+1
| | | | | | | | | | | | | | | | | Add two new ways of accessing the unsafe stack pointer: * At a fixed offset from the thread TLS base. This is very similar to StackProtector cookies, but we plan to extend it to other backends (ARM in particular) soon. Bionic-side implementation here: https://android-review.googlesource.com/170988. * Via a function call, as a fallback for platforms that provide neither a fixed TLS slot, nor a reasonable TLS implementation (i.e. not emutls). This is a re-commit of a change in r248357 that was reverted in r248358. llvm-svn: 248405
* Revert "Android support for SafeStack."Evgeniy Stepanov2015-09-231-1/+1
| | | | | | | test/Transforms/SafeStack/abi.ll breaks when target is not supported; needs refactoring. llvm-svn: 248358
* Android support for SafeStack.Evgeniy Stepanov2015-09-231-1/+1
| | | | | | | | | | | | | | Add two new ways of accessing the unsafe stack pointer: * At a fixed offset from the thread TLS base. This is very similar to StackProtector cookies, but we plan to extend it to other backends (ARM in particular) soon. Bionic-side implementation here: https://android-review.googlesource.com/170988. * Via a function call, as a fallback for platforms that provide neither a fixed TLS slot, nor a reasonable TLS implementation (i.e. not emutls). llvm-svn: 248357
* Fixed an issue on updating profile data when lowering switch statement.Cong Hou2015-09-231-4/+4
| | | | | | Fixed the issue that when there is an edge from the jump table to the default statement, we should check it directly instead of checking if the sibling of the jump table header is a successor of the jump table header, which may not be the default statment but a successor of it. llvm-svn: 248354
* Debug Info: Emit the dwo_name only in skeleton CUs, not in DWOs.Adrian Prantl2015-09-221-3/+5
| | | | llvm-svn: 248340
* LiveIntervalAnalysis: Avoid multiple connected liveness componentsMatthias Braun2015-09-221-8/+26
| | | | | | | | | | | | | We may have subregister defs which are unused but not discovered and cleaned up prior to liveness analysis. This creates multiple connected components in the resulting live range which are forbidden in the MachineVerifier because they would unnecesarily constrain the register allocator. Rewrite those dead definitions to define a newly created virtual register. Differential Revision: http://reviews.llvm.org/D13035 llvm-svn: 248335
* LiveInterval: Distribute subregister liveranges to new intervals in ↵Matthias Braun2015-09-221-29/+65
| | | | | | | | | | | | | | | | ConnectedVNInfoEqClasses::Distribute() This improves ConnectedVNInfoEqClasses::Distribute() to distribute the segments and value numbers in the subranges instead of conservatively clearing all subregister info. No separate test here, just clearing the subrange instead of properly distributing them would however break my upcoming fix regarding dead super register definitions. Differential Revision: http://reviews.llvm.org/D13075 llvm-svn: 248334
* [AArch64] Emit clrex in the expanded cmpxchg fail block.Ahmed Bougacha2015-09-221-3/+14
| | | | | | | | | | | | | | | | | In the comparison failure block of a cmpxchg expansion, the initial ldrex/ldxr will not be followed by a matching strex/stxr. On ARM/AArch64, this unnecessarily ties up the execution monitor, which might have a negative performance impact on some uarchs. Instead, release the monitor in the failure block. The clrex instruction was designed for this: use it. Also see ARMARM v8-A B2.10.2: "Exclusive access instructions and Shareable memory locations". Differential Revision: http://reviews.llvm.org/D13033 llvm-svn: 248291
* Make helper function static. NFC.Benjamin Kramer2015-09-221-3/+3
| | | | llvm-svn: 248278
* Untabify.NAKAMURA Takumi2015-09-222-4/+4
| | | | llvm-svn: 248264
* Reformat blank lines.NAKAMURA Takumi2015-09-223-5/+0
| | | | llvm-svn: 248263
* Reformat comment lines.NAKAMURA Takumi2015-09-221-4/+4
| | | | llvm-svn: 248262
* Reformat.NAKAMURA Takumi2015-09-221-3/+2
| | | | llvm-svn: 248261
* LiveIntervalAnalysis: Factor common code into splitSeparateComponents; NFCMatthias Braun2015-09-225-58/+51
| | | | llvm-svn: 248241
* function names should start with a lower case letter; NFCSanjay Patel2015-09-211-91/+91
| | | | llvm-svn: 248224
* don't repeat function/variable names in header comments; NFCSanjay Patel2015-09-211-87/+74
| | | | llvm-svn: 248222
* [DAGCombiner] Improve FMA support for interpolation patternsSimon Pilgrim2015-09-211-0/+89
| | | | | | | | | | This patch adds support for combining patterns such as (FMUL(FADD(1.0, x), y)) and (FMUL(FSUB(x, 1.0), y)) to their FMA equivalents. This is useful in particular for linear interpolation cases such as (FADD(FMUL(x, t), FMUL(y, FSUB(1.0, t)))) Differential Revision: http://reviews.llvm.org/D13003 llvm-svn: 248210
* [DAGCombiner] Tidy up FMA combine helpers. NFCI.Simon Pilgrim2015-09-211-25/+21
| | | | | | Based on feedback for D13003. llvm-svn: 248206
* Remove roundingMode argument in APFloat::modStephen Canon2015-09-211-1/+1
| | | | | | Because mod is always exact, this function should have never taken a rounding mode argument. The actual implementation still has issues, which I'll look at resolving in a subsequent patch. llvm-svn: 248195
* Fix accidentally committed debug printingMatt Arsenault2015-09-211-14/+1
| | | | llvm-svn: 248190
* SelectionDAG: Use InsertNode for EntryNodeMatthias Braun2015-09-211-2/+2
| | | | | | This fixes problems where two nodes have persistent debug id 0 assigned. llvm-svn: 248182
* DAGCombiner: Replace store of FP constant after attemping store mergesMatt Arsenault2015-09-211-10/+10
| | | | | | | | | If storing multiple FP constants, some subset of the stores would be replaced with integers due to visit order, so MergeConsecutiveStores would only partially merge these. llvm-svn: 248169
* Factor replacement of stores of FP constants into new functionMatt Arsenault2015-09-211-72/+104
| | | | llvm-svn: 248168
* [Machine Combiner] Refactor machine reassociation code to be target-independent.Chad Rosier2015-09-211-0/+210
| | | | | | | | | | No functional change intended. Patch by Haicheng Wu <haicheng@codeaurora.org>! http://reviews.llvm.org/D12887 PR24522 llvm-svn: 248164
* Use makeArrayRef or None to avoid unnecessarily mentioning the ArrayRef type ↵Craig Topper2015-09-211-1/+1
| | | | | | extra times. NFC llvm-svn: 248140
* [PrologEpilogInserter] Minor refactoring.Maksim Panchenko2015-09-191-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D12924 llvm-svn: 248084
* Test commit. Fix comment. NFC.Maksim Panchenko2015-09-191-1/+1
| | | | llvm-svn: 248082
* Update edge weights properly when merging blocks in if-conversion.Cong Hou2015-09-181-6/+70
| | | | | | | | In if-conversion, there is a utility function MergeBlocks() that is used to merge blocks. However, when new edges are built in this function the edge weight is either not provided or not updated properly, leading to a modified CFG with incorrect edge weights. This patch corrects this issue. Differential Revision: http://reviews.llvm.org/D12513 llvm-svn: 248030
* Make MachineScheduler debug output less confusing.James Y Knight2015-09-181-5/+26
| | | | | | At least...a little bit. llvm-svn: 248020
* SelectionDAGDumper: Leave out the <multiple use> markersMatthias Braun2015-09-181-3/+0
| | | | | | | | | They mostly clutter the output while it is still possible to see which node has multiple users without them. Differential Revision: http://reviews.llvm.org/D12569 llvm-svn: 248013
* SelectionDAGDumper: Avoid unnecessary newlinesMatthias Braun2015-09-181-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before: t0 = EntryToken:ch t0: <multiple use> t0: <multiple use> t1 = CopyFromReg:v4f32,ch t0, Register:v4f32 %vreg0 t25 = IMPLICIT_DEF:v4f32 t26 = HADDPSrr:v4f32 t1, t25 t23 = CopyToReg:ch,glue t0, Register:v4f32 %XMM0, t26 t23: <multiple use> t23: <multiple use> t24 = RETQ:ch Register:v4f32 %XMM0, t23, t23:1 After: t0: <multiple use> t0: <multiple use> t1 = CopyFromReg:v4f32,ch t0, Register:v4f32 %vreg0 t26 = X86ISD::FHADD:v4f32 t1, undef:v4f32 t23 = CopyToReg:ch,glue t0, Register:v4f32 %XMM0, t26 t23: <multiple use> t21 = TargetConstant:i16<0> t23: <multiple use> t24 = X86ISD::RET_FLAG:ch t23, t21, Register:v4f32 %XMM0, t23:1 Differential Revision: http://reviews.llvm.org/D12568 llvm-svn: 248012
* SelectionDAGDumper: Hide [ID=X], [ORD=X] and source locations by default.Matthias Braun2015-09-181-16/+23
| | | | | | | | You can show them with the new -dag-dump-verbose switch. Differential Revision: http://reviews.llvm.org/D12566 llvm-svn: 248011
* SelectionDAG: Introduce PersistentID to SDNode for assert builds.Matthias Braun2015-09-182-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This gives us more human readable numbers to identify nodes in debug dumps. Before: 0x7fcbd9700160: ch = EntryToken 0x7fcbd985c7c8: i64 = Register %RAX ... 0x7fcbd9700160: <multiple use> 0x7fcbd985c578: i64,ch = MOV64rm 0x7fcbd985c6a0, 0x7fcbd985cc68, 0x7fcbd985c200, 0x7fcbd985cd90, 0x7fcbd985ceb8, 0x7fcbd9700160<Mem:LD8[@foo]> [ORD=2] 0x7fcbd985c8f0: ch,glue = CopyToReg 0x7fcbd9700160, 0x7fcbd985c7c8, 0x7fcbd985c578 [ORD=3] 0x7fcbd985c7c8: <multiple use> 0x7fcbd985c8f0: <multiple use> 0x7fcbd985c8f0: <multiple use> 0x7fcbd985ca18: ch = RETQ 0x7fcbd985c7c8, 0x7fcbd985c8f0, 0x7fcbd985c8f0:1 [ORD=3] Now: t0: ch = EntryToken t5: i64 = Register %RAX ... t0: <multiple use> t3: i64,ch = MOV64rm t10, t12, t11, t13, t14, t0<Mem:LD8[@foo]> [ORD=2] t6: ch,glue = CopyToReg t0, t5, t3 [ORD=3] t5: <multiple use> t6: <multiple use> t6: <multiple use> t7: ch = RETQ t5, t6, t6:1 [ORD=3] Differential Revision: http://reviews.llvm.org/D12564 llvm-svn: 248010
* [WinEH] Moved funclet pads should be in relative orderDavid Majnemer2015-09-181-9/+5
| | | | | | | | | | | We shifted the MachineBasicBlocks to the end of the MachineFunction in DFS order. This will not ensure that MachineBasicBlocks which fell through to one another will remain contiguous. Instead, implement a stable sort algorithm for iplist. This partially reverts commit r214150. llvm-svn: 247978
* Whitespace. Indent with spaces instead of a tab.Bob Wilson2015-09-181-1/+1
| | | | llvm-svn: 247969
* [ShrinkWrap] Refactor the handling of infinite loop in the analysis.Quentin Colombet2015-09-171-9/+11
| | | | | | | | | - Strenghten the logic to be sure we hoist the restore point out of the current loop. (The fixes a bug with infinite loop, added as part of the patch.) - Walk over the exit blocks of the current loop to conver to the desired restore point in one iteration of the update loop. llvm-svn: 247958
* Revert "(HEAD -> master, origin/master, origin/HEAD) RegisterPressure: Move ↵Matthias Braun2015-09-172-34/+36
| | | | | | | | | | LiveInRegs/LiveOutRegs from RegisterPressure to PressureTracker" This reverts commit r247943. Accidental commit, code review was not finished yet. llvm-svn: 247945
* RegisterPressure: Move LiveInRegs/LiveOutRegs from RegisterPressure to ↵Matthias Braun2015-09-172-36/+34
| | | | | | | | PressureTracker Differential Revision: http://reviews.llvm.org/D12814 llvm-svn: 247943
* MachineScheduler: Provide an option for node hiding cutoff and disable it by ↵Matthias Braun2015-09-171-1/+9
| | | | | | default llvm-svn: 247942
* [WinEH] Add a funclet layout passDavid Majnemer2015-09-174-0/+101
| | | | | | | | | Windows EH funclets need to be contiguous. The FuncletLayout pass will ensure that the funclets are together and begin with a funclet entry MBB. Differential Revision: http://reviews.llvm.org/D12943 llvm-svn: 247937
* Added MD_invariant_group to LLVMContextPiotr Padlewski2015-09-171-1/+1
| | | | | | http://reviews.llvm.org/D12926 llvm-svn: 247931
* [WinEH] Add and use hasEHPadSuccessor instead of getLandingPadSuccessorReid Kleckner2015-09-174-2/+10
| | | | | | | | | | | | getLandingPadSuccessor assumes that each invoke can have at most one EH pad successor, but WinEH invokes can have more than one. Two out of three callers of getLandingPadSuccessor don't use the returned landingpad, so we can make them use this simple predicate instead. Eventually we'll have to circle back and fix SplitKit.cpp so that register allocation works. Baby steps. llvm-svn: 247904
* Test commit.Zia Ansari2015-09-171-1/+1
| | | | llvm-svn: 247901
* Use the cached TargetInstrInfo instead of looking it up again.Eric Christopher2015-09-161-2/+1
| | | | llvm-svn: 247865
* constify the Function parameter to the TTI creation callback andEric Christopher2015-09-162-2/+2
| | | | | | propagate to all callers/users/etc. llvm-svn: 247864
* [WinEH] Rip out the landingpad-based C++ EH state numbering codeReid Kleckner2015-09-164-466/+36
| | | | | | It never really worked, and the new code is working better every day. llvm-svn: 247860
* [WinEHPrepare] Turn terminatepad into a cleanuppad + call + cleanupretDavid Majnemer2015-09-161-0/+41
| | | | | | | | The MSVC doesn't really support exception specifications so let's just turn these into cleanuppads. Later, we might use terminatepad to more efficiently encode the "noexcept"-ness of a function body. llvm-svn: 247848
* [WinEH] Pull Adjectives and CatchObj out of the catchpad arg listReid Kleckner2015-09-164-18/+41
| | | | | | | | | | Clang now passes the adjectives as an argument to catchpad. Getting the CatchObj working is simply a matter of threading another static alloca through codegen, first as an alloca, then as a frame index, and finally as a frame offset. llvm-svn: 247844
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