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* [SDAG] Fix zeroExtend assertion errorNirav Dave2017-03-231-1/+2
| | | | | | | | | | | | | | | | | Move CombineTo preventing deleted node from being returned in visitZERO_EXTEND. Fixes PR32284. Reviewers: RKSimon, bogner Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31254 llvm-svn: 298604
* Rename helper functions in DwarfExpression to be less misleading (NFC)Adrian Prantl2017-03-222-6/+6
| | | | llvm-svn: 298523
* Fix PR32298 by adding an early exit to getFrameIndexExprs().Adrian Prantl2017-03-221-0/+6
| | | | | | | | Also add an assertion for the case that there are multiple FI expressions with a DW_OP_LLVM_fragment; which should violate internal constraints in DbgVariable. llvm-svn: 298518
* [GlobalISel]: Create VREGs for ConstantInt argsAditya Nandakumar2017-03-221-4/+1
| | | | | | | | | | | | This patch changes the behavior of IRTranslating intrinsics where we now create VREG + G_CONSTANT for ConstantInt values. We already do this for FloatingPoint values. This makes it easier for the backends to select code and it won't have to de-duplicate creation+selection of constants. Reviewed by: ab llvm-svn: 298473
* Don't compose DWARF expressions with multiple subregisters.Adrian Prantl2017-03-221-0/+9
| | | | | | | | | If a register location can only be described by a complex expression (i.e., multiple subregisters) it doesn't safely compose with another complex expression. For example, it is not possible to apply a DW_OP_deref operation to multiple DW_OP_pieces. llvm-svn: 298472
* DwarfExpression: Defer emitting DWARF register operationsAdrian Prantl2017-03-222-47/+76
| | | | | | | | | | until the rest of the expression is known. This is still an NFC refactoring in preparation of a subsequent bugfix. This reapplies r298388 with a bugfix for non-physical frame registers. llvm-svn: 298471
* [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions.Ahmed Bougacha2017-03-212-3/+3
| | | | | | | | | | | | | Quentin points out that r298358 would cause us to emit different code with debug info. That's a big no-no; also erase the instructions that only live thanks to DBG_VALUE users. Adrian explained how this is an existing problem and an OK thing to do: clang has allocas for all variables so shouldn't be affected at -O0, but swift uses a bit of inlineasm to explicitly keep values live for the purpose of debug info quality. I'm not sure there is a better scheme. llvm-svn: 298460
* [GlobalISel] Don't translate br to layout successor.Ahmed Bougacha2017-03-211-2/+5
| | | | | | | | | | MI can represent fallthrough to layout successor blocks, and our post-isel representation uses that extensively. We might as well use it too, to avoid translating and carrying along unnecessary branches. llvm-svn: 298459
* GlobalISel: respect BooleanContents when extending i1.Tim Northover2017-03-211-4/+16
| | | | | | | The world isn't just x86 & ARM, some targets need to store -1 into the byte when legalizing a bool store. llvm-svn: 298453
* SplitKit: Fix subreg copy related problemsMatthias Braun2017-03-212-2/+3
| | | | | | | | | | | | Fix two problems related to r298025: - SplitKit would create duplicate VNIs in some cases leading to crashs when hoisting copies. - VirtRegMap could fail expanding copies at the beginning of a basic block. This fixes http://llvm.org/PR32353 llvm-svn: 298448
* GlobalISel: widen booleans by zero-extending to a byte.Tim Northover2017-03-211-1/+1
| | | | | | | A bool is represented by a single byte, which the ARM ABI requires to be either 0 or 1. So we cannot use G_ANYEXT when legalizing the type. llvm-svn: 298439
* Revert 298388 and 298389 because they broke some AMDGPU tests.Adrian Prantl2017-03-212-64/+23
| | | | llvm-svn: 298401
* Rename AttributeSet to AttributeListReid Kleckner2017-03-2110-41/+41
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: This class is a list of AttributeSetNodes corresponding the function prototype of a call or function declaration. This class used to be called ParamAttrListPtr, then AttrListPtr, then AttributeSet. It is typically accessed by parameter and return value index, so "AttributeList" seems like a more intuitive name. Rename AttributeSetImpl to AttributeListImpl to follow suit. It's useful to rename this class so that we can rename AttributeSetNode to AttributeSet later. AttributeSet is the set of attributes that apply to a single function, argument, or return value. Reviewers: sanjoy, javed.absar, chandlerc, pete Reviewed By: pete Subscribers: pete, jholewinski, arsenm, dschuff, mehdi_amini, jfb, nhaehnle, sbc100, void, llvm-commits Differential Revision: https://reviews.llvm.org/D31102 llvm-svn: 298393
* Don't compose DWARF expressions with multiple subregisters.Adrian Prantl2017-03-211-0/+9
| | | | | | | | | If a register location can only be described by a complex expression (i.e., multiple subregisters) it doesn't safely compose with another complex expression. For example, it is not possible to apply a DW_OP_deref operation to multiple DW_OP_pieces. llvm-svn: 298389
* DwarfExpression: Defer emitting DWARF register operationsAdrian Prantl2017-03-212-23/+55
| | | | | | | | until the rest of the expression is known. This is still an NFC refactoring in preparation of a subsequent bugfix. llvm-svn: 298388
* DAG: Fold bitcast/extract_vector_elt of undef to undefMatt Arsenault2017-03-211-0/+6
| | | | | | Fixes not eliminating store when intrinsic is lowered to undef. llvm-svn: 298385
* [GlobalISel] Move isTriviallyDead to Utils. NFC.Volkan Keles2017-03-212-23/+21
| | | | | | Make it accessible by the targets to avoid code duplication. llvm-svn: 298358
* [DAGTypeLegalizer] Handle widening truncate to vector of i1.Jonas Paulsson2017-03-211-1/+21
| | | | | | | | | | | | Previously, PromoteIntRes_TRUNCATE() did not handle the case where the operand needs widening, which resulted in llvm_unreachable(). This patch adds the needed handling, along with a test case. Review: Eli Friedman, Simon Pilgrim. https://reviews.llvm.org/D31077 llvm-svn: 298357
* [GlobalISel] Translate shufflevectorVolkan Keles2017-03-211-0/+10
| | | | | | | | | | | | Reviewers: qcolombet, aditya_nandakumar, t.p.northover, javed.absar, ab, dsanders Reviewed By: javed.absar Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30962 llvm-svn: 298347
* Add a function to MD5 a file's contents.Zachary Turner2017-03-202-10/+9
| | | | | | | | | | | | | | | In doing so, clean up the MD5 interface a little. Most existing users only care about the lower 8 bytes of an MD5, but for some users that care about the upper and lower, there wasn't a good interface. Furthermore, consumers of the MD5 checksum were required to handle endianness details on their own, so it seems reasonable to abstract this into a nicer interface that just gives you the right value. Differential Revision: https://reviews.llvm.org/D31105 llvm-svn: 298322
* Replace uses of DwarfExpression::addMachineReg* with addMachineRegExpressionAdrian Prantl2017-03-204-81/+96
| | | | | | | | | | | | | and mark the methods as protected. Besides reducing the surface area of DwarfExpression, this is in preparation for an upcoming bugfix in the DwarfExpression implementation, for which it will be necessary to defer emitting register operations until the rest of the expression is known. NFC llvm-svn: 298309
* Make implementation details in DwarfExpression protected. (NFC)Adrian Prantl2017-03-201-13/+12
| | | | llvm-svn: 298308
* [WinEH] Adjust decision to emit SEH moves for leaf functionsReid Kleckner2017-03-201-2/+2
| | | | | | | | | Move the check for "MF->hasWinCFI()" up into the calculation of the shouldEmitMoves boolean, rather than putting it in the early returning if. This ensures that endFunction doesn't try to emit .seh_* directives for leaf functions. llvm-svn: 298276
* GlobalISel: allow quad-precision values to be dumped.Tim Northover2017-03-201-0/+5
| | | | | | | Otherwise the fallback path fails with an assertion on AAPCS AArch64 targets, when "long double" is encountered. llvm-svn: 298273
* [GlobalISel] Use the correct calling conv for callsDiana Picus2017-03-203-5/+7
| | | | | | | | | | | This commit adds a parameter that lets us pass in the calling convention of the call to CallLowering::lowerCall. This allows us to handle situations where the calling convetion of the callee is different from that of the caller. Differential Revision: https://reviews.llvm.org/D31039 llvm-svn: 298254
* Fix constant folding of fp2int to large integersSimon Pilgrim2017-03-192-16/+9
| | | | | | | | | | | | We make the assumption in most of our constant folding code that a fp2int will target an integer of 128-bits or less, calling the APFloat::convertToInteger with only uint64_t[2] of raw bits for the result. Fuzz testing (PR24662) showed that we don't handle other cases at all, resulting in stack overflows and all sorts of crashes. This patch uses the APSInt version of APFloat::convertToInteger instead to better handle such cases. Differential Revision: https://reviews.llvm.org/D31074 llvm-svn: 298226
* [GlobalISel] Don't select trivially dead instructions.Ahmed Bougacha2017-03-191-0/+31
| | | | | | | | | | | | | | Folding instructions when selecting can cause them to become dead. Don't select these dead instructions (if they don't have other side effects, and don't define physical registers). Preserve existing tests by adding COPYs. In some tests, the G_CONSTANT vregs never get constrained to a class: the only use of the vreg was folded into another instruction, so the G_CONSTANT, now dead, never gets selected. llvm-svn: 298224
* [GlobalISel] Move method definition to the proper file. NFC.Ahmed Bougacha2017-03-192-19/+21
| | | | llvm-svn: 298221
* [MIR] Support Customed Register Mask and CSRsOren Ben Simhon2017-03-194-31/+90
| | | | | | | | | | | | | The MIR printer dumps a string that describe the register mask of a function. A static predefined list of register masks matches a static list of strings. However when the register mask is not from the static predefined list, there is no descriptor string and the printer fails. This patch adds support to custom register mask printing and dumping. Also the list of callee saved registers (describing the registers that must be preserved for the caller) might be dynamic. As such this data needs to be dumped and parsed back to the Machine Register Info. Differential Revision: https://reviews.llvm.org/D30971 llvm-svn: 298207
* ExecutionDepsFix: Let targets specialize the pass; NFCMatthias Braun2017-03-181-212/+2
| | | | | | | | Let targets specialize the pass with the register class so we can get a parameterless default constructor and can put the pass into the pass registry to enable testing with -run-pass=. llvm-svn: 298184
* ExecutionDepsFix: Normalize names; NFCMatthias Braun2017-03-181-32/+32
| | | | | | | Normalize ExeDepsFix, execution-fix, ExecutionDependencyFix and ExecutionDepsFix to the last one. llvm-svn: 298183
* CodeGen.cpp: Sort alphabetically; NFCMatthias Braun2017-03-181-6/+6
| | | | llvm-svn: 298182
* Make library calls sensitive to regparm module flag (Fixes PR3997).Nirav Dave2017-03-187-66/+72
| | | | | | | | | | Reviewers: mkuper, rnk Subscribers: mehdi_amini, jyknight, aemerson, llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D27050 llvm-svn: 298179
* Capitalize ArgListEntry fields. NFC.Nirav Dave2017-03-185-76/+75
| | | | llvm-svn: 298178
* Add !associated metadata.Evgeniy Stepanov2017-03-171-13/+50
| | | | | | | | | | | | | | | | This is an ELF-specific thing that adds SHF_LINK_ORDER to the global's section pointing to the metadata argument's section. The effect of that is a reverse dependency between sections for the linker GC. !associated does not change the behavior of global-dce. The global may also need to be added to llvm.compiler.used. Since SHF_LINK_ORDER is per-section, !associated effectively enables fdata-sections for the affected globals, the same as comdats do. Differential Revision: https://reviews.llvm.org/D29104 llvm-svn: 298157
* [SelectionDAG] Remove redundant stores more aggressively.Eli Friedman2017-03-171-7/+25
| | | | | | | | | | | | | | | | Handle TokenFactors more aggressively in SDValue::reachesChainWithoutSideEffects. This isn't really a very effective change anymore because of other changes to chain handling, but it's a cheap check, and the expanded comments are still useful. It might be possible to loosen the hasOneUse() requirement with a deeper analysis, but a naive implementation of that check would be expensive. Differential Revision: https://reviews.llvm.org/D29845 llvm-svn: 298156
* [CodeGenPrep]Restructure promoting Ext to form ExtLoadJun Bum Lim2017-03-171-90/+125
| | | | | | | | | | | | | | | | Summary: Instead of just looking for a load which is mergable with Ext to form ExtLoad, trying to promote Exts as long as the cost is acceptable. This change is not a NFC as it continue promoting Exts even after finding a load during promotions; the change in arm64-codegen-prepare-extload.ll described in 2.b might show the case. This change was motivated from D26524. Based on this change, I will move the transformation performed in aarch64-type-promotion into CGP. Reviewers: jmolloy, qcolombet, mcrosier, javed.absar Reviewed By: qcolombet Subscribers: rengolin, llvm-commits, aemerson Differential Revision: https://reviews.llvm.org/D27853 llvm-svn: 298114
* [SelectionDAG] Add SelectionDAG.computeKnownBits test support for ISD::ABSSimon Pilgrim2017-03-171-0/+20
| | | | llvm-svn: 298108
* SplitKit: Correctly implement partial subregister copiesMatthias Braun2017-03-173-26/+168
| | | | | | | | | | | - This fixes a bug where subregister incompatible with the vregs register class where used. - Implement the case where multiple copies are necessary to cover a given lanemask. Differential Revision: https://reviews.llvm.org/D30438 llvm-svn: 298025
* VirtRegMap: Correctly deal with bundles when deleting identity copies.Matthias Braun2017-03-172-7/+51
| | | | | | | | | | | | | | | | | | This fixes two problems when VirtRegMap encounters bundles: - When substituting a vreg subregister def with an actual register the internal read flag must be cleared. - Removing an identity COPY from a bundle needs to use removeFromBundle() and a newly introduced function to update SlotIndexes. No testcase here, because none of the in-tree targets trigger this, however an upcoming commit of mine will need this and the testcase there will trigger this. Differential Revision: https://reviews.llvm.org/D30925 llvm-svn: 298024
* Remove LessPreciseFPMADOption from TargetOptions along with all of theEric Christopher2017-03-171-8/+0
| | | | | | | associated command line options and functions - it's currently unused in all of llvm and clang other than being set and reset. llvm-svn: 298023
* Remove getArgumentList() in favor of arg_begin(), args(), etcReid Kleckner2017-03-161-1/+1
| | | | | | | | | | | | | | | | | Users often call getArgumentList().size(), which is a linear way to get the number of function arguments. arg_size(), on the other hand, is constant time. In general, the fact that arguments are stored in an iplist is an implementation detail, so I've removed it from the Function interface and moved all other users to the argument container APIs (arg_begin(), arg_end(), args(), arg_size()). Reviewed By: chandlerc Differential Revision: https://reviews.llvm.org/D31052 llvm-svn: 298010
* Remove redundant conditions (PR31753). NFCI.Simon Pilgrim2017-03-161-2/+2
| | | | llvm-svn: 297976
* Attempt to fix bot failure on Windows.Adrian Prantl2017-03-161-1/+1
| | | | | | Looks like this expression was accidentally using 32-bit arithmetic. llvm-svn: 297969
* Rearrange fields. NFC.Adrian Prantl2017-03-161-1/+1
| | | | llvm-svn: 297967
* Rename methods in DwarfExpression to adhere to the LLVM coding guidelines.Adrian Prantl2017-03-165-121/+121
| | | | | | NFC. llvm-svn: 297966
* PR32288: More efficient encoding for DWARF expr subregister access.Adrian Prantl2017-03-162-3/+35
| | | | | | | | | | | | | | | | | | | | | | | Citing http://bugs.llvm.org/show_bug.cgi?id=32288 The DWARF generated by LLVM includes this location: 0x55 0x93 0x04 DW_OP_reg5 DW_OP_piece(4) When GCC's DWARF is simply 0x55 (DW_OP_reg5) without the DW_OP_piece. I believe it's reasonable to assume the DWARF consumer knows which part of a register logically holds the value (low bytes, high bytes, how many bytes, etc) for a primitive value like an integer. This patch gets rid of the redundant DW_OP_piece when a subregister is at offset 0. It also adds previously missing subregister masking when a subregister is followed by another operation. (This reapplies r297960 with two additional testcase updates). rdar://problem/31069390 https://reviews.llvm.org/D31010 llvm-svn: 297965
* Revert "PR32288: More efficient encoding for DWARF expr subregister access."Adrian Prantl2017-03-162-35/+3
| | | | | | This reverts commit 2bf453116889a576956892ea9683db4fcd96e30e while investigating buildbot breakage. llvm-svn: 297962
* PR32288: More efficient encoding for DWARF expr subregister access.Adrian Prantl2017-03-162-3/+35
| | | | | | | | | | | | | | | | | | | | | Citing http://bugs.llvm.org/show_bug.cgi?id=32288 The DWARF generated by LLVM includes this location: 0x55 0x93 0x04 DW_OP_reg5 DW_OP_piece(4) When GCC's DWARF is simply 0x55 (DW_OP_reg5) without the DW_OP_piece. I believe it's reasonable to assume the DWARF consumer knows which part of a register logically holds the value (low bytes, high bytes, how many bytes, etc) for a primitive value like an integer. This patch gets rid of the redundant DW_OP_piece when a subregister is at offset 0. It also adds previously missing subregister masking when a subregister is followed by another operation. rdar://problem/31069390 https://reviews.llvm.org/D31010 llvm-svn: 297960
* Fixing typos.Oren Ben Simhon2017-03-161-4/+5
| | | | llvm-svn: 297932
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