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* Track live-out physical registers in MachineDCE.Jakob Stoklund Olesen2011-06-271-3/+8
| | | | | | Patch by Sanjoy Das! llvm-svn: 133910
* Distinguish early clobber output operands from clobbered registers.Jakob Stoklund Olesen2011-06-275-5/+8
| | | | | | | | | | | | | | | | | | | | | | Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we now use two different asm operand kinds. The new Kind_Clobber is treated identically to the old Kind_RegDefEarlyClobber for now, but x87 floating point stack inline assembly does care about the difference. This will pop a register off the stack: asm("fstp %st" : : "t"(x) : "st"); While this will pop the input and push an output: asm("fst %st" : "=&t"(r) : "t"(x)); We need to know if ST0 was a clobber or an output operand, and we can't depend on <dead> flags for that. llvm-svn: 133902
* Decode and pretty print inline asm operand descriptors.Jakob Stoklund Olesen2011-06-271-1/+22
| | | | | | | | | | The INLINEASM MachineInstrs have an immediate operand describing each original inline asm operand. Decode the bits in MachineInstr::print() so it is easier to read: INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def> llvm-svn: 133901
* Remove unused methods.Rafael Espindola2011-06-261-13/+0
| | | | llvm-svn: 133900
* There is only one register coalescer. Merge it into the base class andRafael Espindola2011-06-268-197/+151
| | | | | | remove the analysis group. llvm-svn: 133899
* Merge SimpleRegisterCoalescing.cpp into RegisterCoalescer.cpp.Rafael Espindola2011-06-263-1541/+1523
| | | | llvm-svn: 133897
* merge SimpleRegisterCoalescing.h into RegisterCoalescer.h.Rafael Espindola2011-06-264-156/+129
| | | | llvm-svn: 133896
* Move RegisterCoalescer.h to lib/CodeGen.Rafael Espindola2011-06-269-9/+253
| | | | llvm-svn: 133895
* Remove unnecessary wrapper.Rafael Espindola2011-06-262-27/+17
| | | | llvm-svn: 133886
* The scheduler needs to be aware on the existence of untyped nodes when it ↵Owen Anderson2011-06-241-1/+2
| | | | | | performs type propagation for EXTRACT_SUBREG. llvm-svn: 133838
* Handle debug info for i128 constants.Devang Patel2011-06-247-28/+38
| | | | llvm-svn: 133821
* SimplifyRafael Espindola2011-06-241-14/+6
| | | | llvm-svn: 133798
* Now that bb with phis are not considered simple, duplicate them even ifRafael Espindola2011-06-241-12/+18
| | | | | | we cannot duplicate to every predecessor. llvm-svn: 133797
* Simplify now that blocks with phis are not considered simple.Rafael Espindola2011-06-241-15/+0
| | | | llvm-svn: 133793
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-1/+1
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Use the presence of the __compact_unwind section to indicate that a targetBill Wendling2011-06-231-10/+7
| | | | | | supports compact unwind info instead of having a separate flag indicating this. llvm-svn: 133685
* Move more logic to shouldTailDuplicate and only duplicate regular bb beforeRafael Espindola2011-06-231-21/+45
| | | | | | | | | | register allocation if it has a indirectbr or if we can duplicate it to every predecessor. This fixes the SingleSource/Benchmarks/Shootout-C++/matrix.cpp regression but keeps the previous improvements to sunspider. llvm-svn: 133682
* Add a flag that indicates whether a target supports compact unwind info or not.Bill Wendling2011-06-221-2/+6
| | | | llvm-svn: 133662
* Reenable tail duplication of bb with just an unconditional jump, butRafael Espindola2011-06-221-4/+4
| | | | | | don't remove blocks that have their address taken. llvm-svn: 133659
* Add a __LD,__compact_unwind section.Bill Wendling2011-06-221-0/+6
| | | | | | | | If the linker supports it, this will hold the CIE and FDE information in a compact format. The implementation of the compact unwinding emission is coming soon. llvm-svn: 133658
* Revert r133607. This is causing failures in the Clang gccTestSuite.Chad Rosier2011-06-221-3/+3
| | | | | | Specifically, gcc.c-torture/compile/pr21356.c. llvm-svn: 133646
* Emit trailing padding on constant vectors when TargetData says that the vectorNick Lewycky2011-06-221-0/+7
| | | | | | is larger than the sum of the elements (including per-element padding). llvm-svn: 133631
* Replace the existing forms of ConstantArray::get() with a single formJay Foad2011-06-222-3/+3
| | | | | | that takes an ArrayRef. llvm-svn: 133615
* Reenable the optimization added in 133415, but change the definition of a ↵Rafael Espindola2011-06-221-3/+3
| | | | | | | | | "simple" bb to be one with only one unconditional branch and no phis. Duplicating the phis in this case is possible, but requeres liveness analysis or breaking edges. llvm-svn: 133607
* After register is spilled there should not be any DBG_VALUE referring the ↵Devang Patel2011-06-211-1/+3
| | | | | | same register. llvm-svn: 133569
* Fix some trailing issues from my introduction of MVT::untyped and its use ↵Owen Anderson2011-06-211-1/+11
| | | | | | for REGISTER_SEQUENCE. llvm-svn: 133567
* Add verbose EH table printing to SjLj exception tables.Bill Wendling2011-06-211-2/+19
| | | | llvm-svn: 133561
* There could be more than one DBG_VALUE instructions for variables where all ↵Devang Patel2011-06-211-4/+6
| | | | | | of them have offset based on one register. llvm-svn: 133560
* Improve the comment printing for the EH table. This gives a much more detailedBill Wendling2011-06-211-23/+69
| | | | | | explanation of what the EH table describes. llvm-svn: 133559
* Teach dag combine to match halfword byteswap patterns.Evan Cheng2011-06-211-2/+264
| | | | | | | | | | | | | | 1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8) => (bswap x) >> 16 2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8)) => (rotl (bswap x) 16) This allows us to eliminate most of the def : Pat patterns for ARM rev16 revsh instructions. It catches many more cases for ARM and x86. rdar://9609108 llvm-svn: 133503
* Disable again.Rafael Espindola2011-06-201-1/+1
| | | | llvm-svn: 133446
* Re enable 133415 with two fixesRafael Espindola2011-06-201-3/+8
| | | | | | | | * Don't introduce a duplicated bb in the CFG * When making a branch unconditional, clear the PredCond array so that it is really unconditional. llvm-svn: 133432
* Disable the logic added by rafael in commit 133415 to see if it brings theDuncan Sands2011-06-201-1/+1
| | | | | | | | dragonegg buildbots back to life. Original commit message: Teach early dup how to duplicate basic blocks with one successor and only phi instructions into more complex blocks. llvm-svn: 133430
* Fix PromoteIntRes_TRUNCATE: Add support for cases where theNadav Rotem2011-06-201-4/+28
| | | | | | | source vector type is to be split while the target vector is to be promoted. (eg: <4 x i64> -> <4 x i8> ) llvm-svn: 133424
* Fix MSVC build. next() function already exists in the MSVC headers. This ↵Francois Pichet2011-06-201-1/+1
| | | | | | create a overload conflict. Make sure we pick up the llvm one. llvm-svn: 133416
* Teach early dup how to duplicate basic blocks with one successor and only ↵Rafael Espindola2011-06-201-2/+142
| | | | | | | | phi instructions into more complex blocks. llvm-svn: 133415
* Revamp the "ConstantStruct::get" methods. Previously, these were scatteredChris Lattner2011-06-201-6/+10
| | | | | | | | | | | | | | | all over the place in different styles and variants. Standardize on two preferred entrypoints: one that takes a StructType and ArrayRef, and one that takes StructType and varargs. In cases where there isn't a struct type convenient, we now add a ConstantStruct::getAnon method (whose name will make more sense after a few more patches land). It would be "really really nice" if the ConstantStruct::get and ConstantVector::get methods didn't make temporary std::vectors. llvm-svn: 133412
* Fix a FIXME by making GlobalVariable::getInitializer() return aJay Foad2011-06-193-7/+7
| | | | | | const Constant *. llvm-svn: 133400
* Code cleanups: Remove duplicated logic in PromotInteRes_BITCAST, reserve ↵Nadav Rotem2011-06-191-7/+5
| | | | | | vector space, reuse types. llvm-svn: 133389
* Calls to AssertZext and getZeroExtendInReg must be made using scalar types.Nadav Rotem2011-06-191-3/+4
| | | | llvm-svn: 133388
* When promoting the vector elements in CopyToParts, use vector truncNadav Rotem2011-06-191-11/+3
| | | | | | instead of scalarizing, and doing an element-by-element truncat. llvm-svn: 133382
* fix the varargs version of StructType::get to not require an LLVMContext, ↵Chris Lattner2011-06-181-2/+1
| | | | | | | | making usage much cleaner. llvm-svn: 133364
* Simplify code. No change in functionality.Benjamin Kramer2011-06-181-6/+1
| | | | llvm-svn: 133350
* Don't allocate empty read-only SmallVectors during SelectionDAG deallocation.Benjamin Kramer2011-06-182-4/+4
| | | | llvm-svn: 133348
* Remove unused but set variables.Benjamin Kramer2011-06-182-19/+4
| | | | llvm-svn: 133347
* Fix UMULO support for 2x register width to allow the fullEric Christopher2011-06-181-0/+21
| | | | | | | | | range without a libcall to a new mulo<mode> libcall that we'd have to create. Finishes the rest of rdar://9090077 and rdar://9210061 llvm-svn: 133318
* Only call TRI::getRawAllocationOrder to resolve a target-dependent hint.Jakob Stoklund Olesen2011-06-171-2/+6
| | | | llvm-svn: 133313
* Fix comment.Eric Christopher2011-06-171-2/+1
| | | | llvm-svn: 133307
* Use the verbose asm flag instead of a new flag for decoding the LSDA.Bill Wendling2011-06-171-4/+1
| | | | llvm-svn: 133292
* Lower multiply with overflow checking to __mulo<mode>Eric Christopher2011-06-173-4/+71
| | | | | | | | | calls if we haven't been able to lower them any other way. Fixes rdar://9090077 and rdar://9210061 llvm-svn: 133288
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