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* Fix based on post-commit comment on D7816 & rL230177 - BUILD_VECTOR operand ↵Simon Pilgrim2015-02-231-4/+5
| | | | | | truncation was using the the BV's output scalar type instead of the input type. llvm-svn: 230278
* [X86] Teach how to custom lower double-to-half conversions under fast-math.Andrea Di Biagio2015-02-231-0/+15
| | | | | | | | | | | | | This patch teaches the backend how to expand a double-half conversion into a double-float conversion immediately followed by a float-half conversion. We do this only under fast-math, and if float-half conversions are legal for the target. Added test CodeGen/X86/fastmath-float-half-conversion.ll Differential Revision: http://reviews.llvm.org/D7832 llvm-svn: 230276
* [AsmPrinter] Access pointers to globals via pcrel GOT entriesBruno Cardoso Lopes2015-02-231-15/+209
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Front-ends could use global unnamed_addr to hold pointers to other symbols, like @gotequivalent below: @foo = global i32 42 @gotequivalent = private unnamed_addr constant i32* @foo @delta = global i32 trunc (i64 sub (i64 ptrtoint (i32** @gotequivalent to i64), i64 ptrtoint (i32* @delta to i64)) to i32) The global @delta holds a data "PC"-relative offset to @gotequivalent, an unnamed pointer to @foo. The darwin/x86-64 assembly output for this follows: .globl _foo _foo: .long 42 .globl _gotequivalent _gotequivalent: .quad _foo .globl _delta _delta: .long _gotequivalent-_delta Since unnamed_addr indicates that the address is not significant, only the content, we can optimize the case above by replacing pc-relative accesses to "GOT equivalent" globals, by a PC relative access to the GOT entry of the final symbol instead. Therefore, "delta" can contain a pc relative relocation to foo's GOT entry and we avoid the emission of "gotequivalent", yielding the assembly code below: .globl _foo _foo: .long 42 .globl _delta _delta: .long _foo@GOTPCREL+4 There are a couple of advantages of doing this: (1) Front-ends that need to emit a great deal of data to store pointers to external symbols could save space by not emitting such "got equivalent" globals and (2) IR constructs combined with this opt opens a way to represent GOT pcrel relocations by using the LLVM IR, which is something we previously had no way to express. Differential Revision: http://reviews.llvm.org/D6922 rdar://problem/18534217 llvm-svn: 230264
* Removing unused private field.Andrew Kaylor2015-02-231-3/+1
| | | | llvm-svn: 230259
* Second attempt to fix WinEHCatchDirector build failures.Andrew Kaylor2015-02-231-1/+0
| | | | llvm-svn: 230257
* Attempting to fix WinEHCatchDirector destructor related build failures.Andrew Kaylor2015-02-231-0/+1
| | | | llvm-svn: 230252
* Remap frame variables for native Windows exception handling.Andrew Kaylor2015-02-231-390/+627
| | | | | | Differential Revision: http://reviews.llvm.org/D7770 llvm-svn: 230249
* Rewrite the global merge pass to be subprogram agnostic for now.Eric Christopher2015-02-231-19/+18
| | | | | | | | | | | | | It was previously using the subtarget to get values for the global offset without actually checking each function as it was generating code. Go ahead and solidify the current behavior and make the existing FIXMEs more prominent. As a note the ARM backend previously had a thumb1 and non-thumb1 set of defaults. Only the former was tested so I've changed the behavior to only use that for now. llvm-svn: 230245
* [DagCombiner] Generalized BuildVector Vector ConcatenationSimon Pilgrim2015-02-221-23/+38
| | | | | | | | | | | | The CONCAT_VECTORS combiner pass can transform the concat of two BUILD_VECTOR nodes into a single BUILD_VECTOR node. This patch generalises this to support any number of BUILD_VECTOR nodes, and also permits UNDEF nodes to be included as well. This was noticed as AVX vec128 -> vec256 canonicalization sometimes creates a CONCAT_VECTOR with a real vec128 lower and an vec128 UNDEF upper. Differential Revision: http://reviews.llvm.org/D7816 llvm-svn: 230177
* [DAGCombine] Don't assume integer-type legailty in ↵Hal Finkel2015-02-221-0/+5
| | | | | | | | | | | | | | | | | | reduceBuildVecConvertToConvertBuildVec DAGCombine will rewrite an BUILD_VECTOR where all non-undef inputs some from [US]INT_TO_FP, as a BUILD_VECTOR of integers with the conversion applied as a vector operation. We check operation legality of the conversion, but fail to check legality of the integer vector type itself. Because targets don't normally override operation legality defaults for illegal types, we need to check this also. This came up in the context of the QPX vector entensions for PowerPC (which can have legal floating-point vector types without corresponding legal integer vector types). No in-tree test case for this yes, but one can be added once the QPX support has been committed. llvm-svn: 230176
* [SDAG] Use correct alignments on expanded vector trunc-store/ext-loadsHal Finkel2015-02-221-4/+7
| | | | | | | | | | | | | When expanding a truncating store or extending load using vector extracts or inserts and scalar stores and loads, we were giving each of these scalar stores or loads the same alignment as the original vector operation. While this will often be right (most vector operations, especially those produced by autovectorization, have the alignment of the underlying scalar type), the vector operation could certainly have a larger alignment. No test case (yet); noticed by inspection. llvm-svn: 230175
* MachineInstr: Use range-based for loops. NFC.Benjamin Kramer2015-02-211-34/+20
| | | | llvm-svn: 230142
* Calling memmove on a MachineOperand is totally safe.Benjamin Kramer2015-02-211-8/+2
| | | | | | | While it's not POD due to the user-defined constructor, it's still a trivially copyable type. No functional change. llvm-svn: 230141
* Unconditionally create a new MCInstrInfo in the asm printer forEric Christopher2015-02-211-5/+4
| | | | | | | | asm parsing since it's not subtarget dependent and we can't depend upon the one hanging off the MachineFunction's subtarget still being around. llvm-svn: 230135
* X86: Call __main using the SelectionDAGDavid Majnemer2015-02-211-1/+0
| | | | | | | | Synthesizing a call directly using the MI layer would confuse the frame lowering code. This is problematic as frame lowering is highly sensitive the particularities of calls, etc. llvm-svn: 230129
* LiveRangeCalc: Don't start liveranges of PHI instruction at the block begin.Matthias Braun2015-02-201-5/+2
| | | | | | | | | | | | | | | | | | Summary: Letting them begin at the PHI instruction slightly simplifies the code but more importantly avoids breaking the assumption that live ranges starting at the block begin are also live at the end of the predecessor blocks. The MachineVerifier checks that but was apparently never run in the few instances where liveranges are calculated for machine-SSA functions. Reviewers: qcolombet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7779 llvm-svn: 230093
* Use short names for jumptable sections.Rafael Espindola2015-02-201-29/+25
| | | | | | Also refactor code to remove some duplication. llvm-svn: 230087
* Used the cached subtarget off of the MachineFunction.Eric Christopher2015-02-202-5/+3
| | | | llvm-svn: 230078
* Add generic fmad DAG node.Matt Arsenault2015-02-204-95/+164
| | | | | | | | | | | This allows sharing of FMA forming combines to work with instructions that have the same semantics as a separate multiply and add. This is expand by default, and only formed post legalization so it shouldn't have much impact on targets that do not want it. llvm-svn: 230070
* Grab the DataLayout off of the TargetMachine since that's whereEric Christopher2015-02-201-2/+2
| | | | | | it's stored. llvm-svn: 230059
* Get the function specific subtarget.Eric Christopher2015-02-201-1/+2
| | | | llvm-svn: 230038
* Get the cached subtarget off the MachineFunction rather thanEric Christopher2015-02-201-4/+2
| | | | | | inquiring for a new one from the TargetMachine. llvm-svn: 230037
* Generalize statepoint lowering to use ImmutableStatepoint. Move statepoint ↵Igor Laevsky2015-02-202-40/+41
| | | | | | | | lowering into a separate function 'LowerStatepoint' which uses ImmutableStatepoint instead of a CallInst. Also related utility functions are changed to receive ImmutableCallSite. Differential Revision: http://reviews.llvm.org/D7756 llvm-svn: 230017
* Fix build with gcc. This has a -Wsequence-point error on 'MII', which is a ↵Nick Lewycky2015-02-201-5/+3
| | | | | | good point. llvm-svn: 229979
* Remove more uses of TargetMachine::getSubtargetImpl from theEric Christopher2015-02-201-9/+8
| | | | | | | | | | AsmPrinter. getSubtargetInfo now asserts that the MachineFunction exists. Debug printing of register naming now uses the register info from MCAsmInfo as that's unchanging. llvm-svn: 229978
* AsmPrinter::doFinalization is at the module level and so doesn'tEric Christopher2015-02-201-2/+7
| | | | | | | have access to a target specific subtarget info. Grab the module level MCSubtargetInfo for the JumpInstrTable output stubs. llvm-svn: 229974
* Remove the MCInstrInfo cached variable as it was only used in aEric Christopher2015-02-202-15/+13
| | | | | | | single place and replace calls to getSubtargetImpl with calls to get the subtarget from the MachineFunction where valid. llvm-svn: 229971
* Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH ↵Chandler Carruth2015-02-203-111/+22
| | | | | | | | | preparation This doesn't pass 'ninja check-llvm' for me. Lots of tests, including the ones updated, fail with crashes and other explosions. llvm-svn: 229952
* EH: Prune unreachable resume instructions during Dwarf EH preparationReid Kleckner2015-02-203-22/+111
| | | | | | | | | | | | | | | | | Today a simple function that only catches exceptions and doesn't run destructor cleanups ends up containing a dead call to _Unwind_Resume (PR20300). We can't remove these dead resume instructions during normal optimization because inlining might introduce additional landingpads that do have cleanups to run. Instead we can do this during EH preparation, which is guaranteed to run after inlining. Fixes PR20300. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D7744 llvm-svn: 229944
* This needs to be a const variable so the two sides of the ternaryEric Christopher2015-02-201-1/+2
| | | | | | operator agree on type. llvm-svn: 229938
* Only use the initialized MCInstrInfo if it's been initialized alreadyEric Christopher2015-02-191-1/+5
| | | | | | | | during SetupMachineFunction. This is also the single use of MII and it'll be changing to TargetInstrInfo (which is MachineFunction based) in the next commit here. llvm-svn: 229931
* Migrate away a use of the subtarget (and TargetMachine) fromEric Christopher2015-02-191-5/+4
| | | | | | | AsmPrinterDwarf since the information is on the MCRegisterInfo via the MCContext and MMI that we already have on the AsmPrinter. llvm-svn: 229928
* [CodeGen] Use ArrayRef instead of std::vector&. NFC.Ahmed Bougacha2015-02-191-1/+1
| | | | | | The former lets us use SmallVectors. Do so in ARM and AArch64. llvm-svn: 229925
* MCTargetOptions reside on the TargetMachine that we always have viaEric Christopher2015-02-191-5/+2
| | | | | | TargetOptions. llvm-svn: 229917
* Remove a call to TargetMachine::getSubtarget from the inlineEric Christopher2015-02-191-1/+11
| | | | | | | | | asm support in the asm printer. If we can get a subtarget from the machine function then we should do so, otherwise we can go ahead and create a default one since we're at the module level. llvm-svn: 229916
* Remove unused argument from emitInlineAsmStart.Eric Christopher2015-02-191-3/+3
| | | | llvm-svn: 229907
* Update and remove a few calls to TargetMachine::getSubtargetImplEric Christopher2015-02-191-9/+12
| | | | | | out of the asm printer. llvm-svn: 229883
* Demote vectors to arrays. No functionality change.Benjamin Kramer2015-02-191-7/+3
| | | | llvm-svn: 229861
* [x86,sdag] Two interrelated changes to the x86 and sdag code.Chandler Carruth2015-02-191-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First, don't combine bit masking into vector shuffles (even ones the target can handle) once operation legalization has taken place. Custom legalization of vector shuffles may exist for these patterns (making the predicate return true) but that custom legalization may in some cases produce the exact bit math this matches. We only really want to handle this prior to operation legalization. However, the x86 backend, in a fit of awesome, relied on this. What it would do is mark VSELECTs as expand, which would turn them into arithmetic, which this would then match back into vector shuffles, which we would then lower properly. Amazing. Instead, the second change is to teach the x86 backend to directly form vector shuffles from VSELECT nodes with constant conditions, and to mark all of the vector types we support lowering blends as shuffles as custom VSELECT lowering. We still mark the forms which actually support variable blends as *legal* so that the custom lowering is bypassed, and the legal lowering can even be used by the vector shuffle legalization (yes, i know, this is confusing. but that's how the patterns are written). This makes the VSELECT lowering much more sensible, and in fact should fix a bunch of bugs with it. However, as you'll see in the test cases, right now what it does is point out the *hilarious* deficiency of the new vector shuffle lowering when it comes to blends. Fortunately, my very next patch fixes that. I can't submit it yet, because that patch, somewhat obviously, forms the exact and/or pattern that the DAG combine is matching here! Without this patch, teaching the vector shuffle lowering to produce the right code infloops in the DAG combiner. With this patch alone, we produce terrible code but at least lower through the right paths. With both patches, all the regressions here should be fixed, and a bunch of the improvements (like using 2 shufps with no memory loads instead of 2 andps with memory loads and an orps) will stay. Win! There is one other change worth noting here. We had hilariously wrong vectorization cost estimates for vselect because we fell through to the code path that assumed all "expand" vector operations are scalarized. However, the "expand" lowering of VSELECT is vector bit math, most definitely not scalarized. So now we go back to the correct if horribly naive cost of "1" for "not scalarized". If anyone wants to add actual modeling of shuffle costs, that would be cool, but this seems an improvement on its own. Note the removal of 16 and 32 "costs" for doing a blend. Even in SSE2 we can blend in fewer than 16 instructions. ;] Of course, we don't right now because of OMG bad code, but I'm going to fix that. Next patch. I promise. llvm-svn: 229835
* Add an IR-to-IR test for dwarf EH preparation using optReid Kleckner2015-02-181-0/+8
| | | | | | | This tests the simple resume instruction elimination logic that we have before making some changes to it. llvm-svn: 229768
* Style and formatting fixes for r229715Andrew Kaylor2015-02-181-1/+0
| | | | llvm-svn: 229758
* dos2unix the WinEH file and testsReid Kleckner2015-02-181-391/+391
| | | | llvm-svn: 229735
* Remove unused member variables (-Wunused-private-field)David Blaikie2015-02-181-7/+3
| | | | llvm-svn: 229722
* Adding implementation to outline C++ catch handlers for native Windows 64 ↵Andrew Kaylor2015-02-181-102/+395
| | | | | | | | exception handling. Differential Revision: http://reviews.llvm.org/D7363 llvm-svn: 229715
* Fixes two issue in SimplifyDemandedBits of sext_in_reg:Michael Kuperstein2015-02-181-11/+18
| | | | | | | | | | | 1) We should not try to simplify if the sext has multiple uses 2) There is no need to simplify is the source value is already sign-extended. Patch by Gil Rapaport <gil.rapaport@intel.com> Differential Revision: http://reviews.llvm.org/D6949 llvm-svn: 229659
* NFC: Use range-based for loops and more consistent naming.Daniel Jasper2015-02-181-19/+15
| | | | | | | | | No functional changes intended. (I plan on doing some modifications to this function and would like to have as few unrelated changes as possible in the patch) llvm-svn: 229649
* Remove experimental options to control machine block placement.Daniel Jasper2015-02-181-35/+20
| | | | | | | This reverts r226034. Benchmarking with those flags has not revealed anything interesting. llvm-svn: 229648
* LiveRangeCalc: Rename some parameters from kill to use, NFC.Matthias Braun2015-02-183-36/+35
| | | | | | Those parameters did not necessarily describe kill points but just uses. llvm-svn: 229601
* Twines should be passed by const ref.Rafael Espindola2015-02-171-2/+2
| | | | llvm-svn: 229590
* Add r228939 back with a fix.Rafael Espindola2015-02-172-11/+11
| | | | | | | | | | | | | The problem in the original patch was not switching back to .text after printing an eh table. Original message: On ELF, put PIC jump tables in a non executable section. Fixes PR22558. llvm-svn: 229586
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